Skip to content
Snippets Groups Projects
Commit 83aabeee authored by Yann Roberge's avatar Yann Roberge
Browse files

Temp: refactoring du decode

parent 222a9eff
No related branches found
No related tags found
No related merge requests found
Hide whitespace changes
Inline Side-by-side
sources/riscv_decode.vhd
+ 211
− 1
View file @ 83aabeee
......@@ -67,7 +67,9 @@ architecture beh of riscv_decode is
signal jump : std_logic;
signal branch : std_logic;
signal alu_opcode : std_logic_vector(ALUOP_WIDTH-1 downto 0);
signal sign : std_logic;
signal arith : std_logic;
signal shamt : std_logic_vector(SHAMT_WIDTH-1 downto 0);
signal sign : std_logic;
signal imm : std_logic_vector(XLEN-1 downto 0);
alias instruction is i_fetch_reg.instruction;
......@@ -233,6 +235,214 @@ begin
);
-- Decode
--signal jump : std_logic;
--signal branch : std_logic;
decode_jump_decode:
process (funct7, funct3, opcode) is
begin
case opcode is
-- R-TYPE
when OPCODE_JALR =>
jump <= '1';
branch <= '0';
alu_opcode <= (others => '0');
arith <= '0';
shamt <= (others => '0');
sign <= SIGN_UNSIGNED;
when OPCODE_ALU_R_TYPE =>
jump <= '0';
branch <= '0';
case funct3 is
when FUNCT3_ADD =>
-- FUNCT7 distingue la soustraction de l'addition
-- toutes les opérations sont signées
case funct7 is =>
when FUNCT7_SUB_ARITH_SH =>
arith <= ARITH_SUBTRACT;
when others =>
arith <= ARITH_ADD;
end case;
shamt <= (others => '0');
alu_opcode <= ALUOP_ADD;
sign <= SIGN_SIGNED;
when FUNCT3_SL =>
jump <= '0';
branch <= '0';
alu_opcode <= ALUOP_SH_LEFT;
arith <= '0'; -- le shift gauche est toujours logique
shamt <= (others => '0');
sign <= SIGN_UNSIGNED;
when FUNCT3_SLT =>
when FUNCT3_SLTU =>
when FUNCT3_XOR =>
when FUNCT3_SR =>
when FUNCT3_OR =>
when FUNCT3_AND =>
when others =>
-- on n'arrive jamais ici parce que toutes les
-- possibilités de FUNCT3 sont couvertes par le code plus haut
alu_opcode <= (others => '0');
arith <= '0';
shamt <= (others => '0');
sign <= SIGN_UNSIGNED;
end case;
alu_opcode <= (others => '0');
sign <= SIGN_UNSIGNED;
-- I-TYPE
when OPCODE_LW =>
jump <= '0';
branch <= '0';
alu_opcode <= (others => '0');
sign <= SIGN_UNSIGNED;
when OPCODE_ALU_I_TYPE =>
-- S-TYPE
when OPCODE_SW =>
jump <= '0';
branch <= '0';
alu_opcode <= (others => '0');
sign <= SIGN_UNSIGNED;
-- B-TYPE
when OPCODE_BEQ =>
jump <= '0';
branch <= '1';
alu_opcode <= (others => '0');
sign <= SIGN_UNSIGNED;
-- U-TYPE
when OPCODE_LUI =>
jump <= '0';
branch <= '0';
alu_opcode <= (others => '0');
sign <= SIGN_UNSIGNED;
-- J-TYPE
when OPCODE_JAL =>
jump <= '1';
branch <= '0';
alu_opcode <= (others => '0');
sign <= SIGN_UNSIGNED;
-- R-TYPE
-- Unsupported instructions
when others =>
end case;
end process decode_jump_decode;
--signal alu_opcode : std_logic_vector(ALUOP_WIDTH-1 downto 0);
--signal arith : std_logic;
--signal shamt : std_logic_vector(SHAMT_WIDTH-1 downto 0);
--signal sign : std_logic;
decode_calc:
process (funct7, funct3, opcode) is
begin
case opcode is
-- R-TYPE
when OPCODE_JALR =>
jump <= '1';
branch <= '0';
alu_opcode <= (others => '0');
arith <= '0';
shamt <= (others => '0');
sign <= SIGN_UNSIGNED;
when OPCODE_ALU_R_TYPE =>
jump <= '0';
branch <= '0';
case funct3 is
when FUNCT3_ADD =>
-- FUNCT7 distingue la soustraction de l'addition
-- toutes les opérations sont signées
case funct7 is =>
when FUNCT7_SUB_ARITH_SH =>
arith <= ARITH_SUBTRACT;
when others =>
arith <= ARITH_ADD;
end case;
shamt <= (others => '0');
alu_opcode <= ALUOP_ADD;
sign <= SIGN_SIGNED;
when FUNCT3_SL =>
jump <= '0';
branch <= '0';
alu_opcode <= ALUOP_SH_LEFT;
arith <= '0'; -- le shift gauche est toujours logique
shamt <= (others => '0');
sign <= SIGN_UNSIGNED;
when FUNCT3_SLT =>
when FUNCT3_SLTU =>
when FUNCT3_XOR =>
when FUNCT3_SR =>
when FUNCT3_OR =>
when FUNCT3_AND =>
when others =>
-- on n'arrive jamais ici parce que toutes les
-- possibilités de FUNCT3 sont couvertes par le code plus haut
alu_opcode <= (others => '0');
arith <= '0';
shamt <= (others => '0');
sign <= SIGN_UNSIGNED;
end case;
alu_opcode <= (others => '0');
sign <= SIGN_UNSIGNED;
-- I-TYPE
when OPCODE_LW =>
jump <= '0';
branch <= '0';
alu_opcode <= (others => '0');
sign <= SIGN_UNSIGNED;
when OPCODE_ALU_I_TYPE =>
-- S-TYPE
when OPCODE_SW =>
jump <= '0';
branch <= '0';
alu_opcode <= (others => '0');
sign <= SIGN_UNSIGNED;
-- B-TYPE
when OPCODE_BEQ =>
jump <= '0';
branch <= '1';
alu_opcode <= (others => '0');
sign <= SIGN_UNSIGNED;
-- U-TYPE
when OPCODE_LUI =>
jump <= '0';
branch <= '0';
alu_opcode <= (others => '0');
sign <= SIGN_UNSIGNED;
-- J-TYPE
when OPCODE_JAL =>
jump <= '1';
branch <= '0';
alu_opcode <= (others => '0');
sign <= SIGN_UNSIGNED;
-- R-TYPE
-- Unsupported instructions
when others =>
end case;
end process decode_jump_decode;
-- Écrire le registre ID/EX
......
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment