Commit 6bb551ab authored 4 years ago by Erika Miller-Jolicoeur

Mise à jour des résultats d'implémentation pour les différents flots.

parent 8c7fb26a

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implementation/.gitignore 2 additions, 2 deletions

implementation/.gitignore
implementation/atpg/pnr/testresults/verilog/FULLSCAN_PARALLEL/VER.FULLSCAN.data.IDDq.ex1.ts5.verilog 21 additions, 32 deletions

.../FULLSCAN_PARALLEL/VER.FULLSCAN.data.IDDq.ex1.ts5.verilog
implementation/atpg/pnr/testresults/verilog/FULLSCAN_PARALLEL/VER.FULLSCAN.data.logic.ex1.ts2.verilog 66 additions, 54 deletions

...FULLSCAN_PARALLEL/VER.FULLSCAN.data.logic.ex1.ts2.verilog
implementation/atpg/pnr/testresults/verilog/FULLSCAN_PARALLEL/VER.FULLSCAN.data.logic.ex1.ts3.verilog 11 additions, 11 deletions

...FULLSCAN_PARALLEL/VER.FULLSCAN.data.logic.ex1.ts3.verilog
implementation/atpg/pnr/testresults/verilog/FULLSCAN_PARALLEL/VER.FULLSCAN.data.logic.ex1.ts4.verilog 22 additions, 42 deletions

...FULLSCAN_PARALLEL/VER.FULLSCAN.data.logic.ex1.ts4.verilog
implementation/atpg/pnr/testresults/verilog/FULLSCAN_PARALLEL/VER.FULLSCAN.data.scan.ex1.ts1.verilog 1 addition, 1 deletion

.../FULLSCAN_PARALLEL/VER.FULLSCAN.data.scan.ex1.ts1.verilog
implementation/atpg/pnr/testresults/verilog/FULLSCAN_PARALLEL/VER.FULLSCAN.mainsim.v 13 additions, 13 deletions

...tresults/verilog/FULLSCAN_PARALLEL/VER.FULLSCAN.mainsim.v
implementation/atpg/pnr/testresults/verilog/FULLSCAN_PARALLEL/cycleMap.FULLSCAN 97 additions, 100 deletions

...r/testresults/verilog/FULLSCAN_PARALLEL/cycleMap.FULLSCAN
implementation/atpg/syn/compteur.FULLSCAN.pinassign 6 additions, 0 deletions

implementation/atpg/syn/compteur.FULLSCAN.pinassign
implementation/atpg/syn/compteur.test_netlist.v 17 additions, 17 deletions

implementation/atpg/syn/compteur.test_netlist.v
implementation/atpg/syn/run_fullscan_sim 2 additions, 2 deletions

implementation/atpg/syn/run_fullscan_sim
implementation/atpg/syn/run_fullscan_sim_sdf 2 additions, 2 deletions

implementation/atpg/syn/run_fullscan_sim_sdf
implementation/atpg/syn/runmodus.atpg.tcl 1 addition, 1 deletion

implementation/atpg/syn/runmodus.atpg.tcl
implementation/atpg/syn/testresults/verilog/FULLSCAN_PARALLEL/VER.FULLSCAN.data.IDDq.ex1.ts5.verilog 25 additions, 25 deletions

.../FULLSCAN_PARALLEL/VER.FULLSCAN.data.IDDq.ex1.ts5.verilog
implementation/atpg/syn/testresults/verilog/FULLSCAN_PARALLEL/VER.FULLSCAN.data.logic.ex1.ts2.verilog 86 additions, 70 deletions

...FULLSCAN_PARALLEL/VER.FULLSCAN.data.logic.ex1.ts2.verilog
implementation/atpg/syn/testresults/verilog/FULLSCAN_PARALLEL/VER.FULLSCAN.data.logic.ex1.ts3.verilog 5 additions, 5 deletions

...FULLSCAN_PARALLEL/VER.FULLSCAN.data.logic.ex1.ts3.verilog
implementation/atpg/syn/testresults/verilog/FULLSCAN_PARALLEL/VER.FULLSCAN.data.logic.ex1.ts4.verilog 44 additions, 24 deletions

...FULLSCAN_PARALLEL/VER.FULLSCAN.data.logic.ex1.ts4.verilog
implementation/atpg/syn/testresults/verilog/FULLSCAN_PARALLEL/VER.FULLSCAN.data.scan.ex1.ts1.verilog 1 addition, 1 deletion

.../FULLSCAN_PARALLEL/VER.FULLSCAN.data.scan.ex1.ts1.verilog
implementation/atpg/syn/testresults/verilog/FULLSCAN_PARALLEL/VER.FULLSCAN.mainsim.v 7 additions, 7 deletions

...tresults/verilog/FULLSCAN_PARALLEL/VER.FULLSCAN.mainsim.v
implementation/atpg/syn/testresults/verilog/FULLSCAN_PARALLEL/cycleMap.FULLSCAN 97 additions, 90 deletions

...n/testresults/verilog/FULLSCAN_PARALLEL/cycleMap.FULLSCAN

with 526 additions and 499 deletions

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