From e5cbe9fa0edd8f5502955c5c9b47c40991300f8d Mon Sep 17 00:00:00 2001
From: "mamadou-aliou.cisse" <mamadou-aliou.cisse@polymtl.ca>
Date: Sat, 22 Feb 2020 19:04:11 -0500
Subject: [PATCH] ajout du code de base manette dans standard robot
---
Standard_robot/.mxproject | 14 +-
.../Device/ST/STM32F4xx/Include/stm32f427xx.h | 8 +-
.../Inc/stm32f4xx_hal_can.h | 848 ++++++
.../Inc/stm32f4xx_hal_spi.h | 2 +-
.../Inc/stm32f4xx_hal_uart.h | 2 +-
.../Src/stm32f4xx_hal_can.c | 2464 +++++++++++++++++
.../Src/stm32f4xx_hal_spi.c | 62 +-
.../Src/stm32f4xx_hal_uart.c | 58 +-
Standard_robot/Inc/Remote_Control.h | 70 +
Standard_robot/Inc/can.h | 37 +-
Standard_robot/Inc/gpio.h | 1 -
Standard_robot/Inc/main.h | 8 +-
Standard_robot/Inc/stm32f4xx_hal_conf.h | 11 +-
Standard_robot/Inc/stm32f4xx_it.h | 2 -
Standard_robot/Inc/tim.h | 37 +-
Standard_robot/Inc/usart.h | 4 +-
.../MDK-ARM/Standard_robot.uvguix.cisse | 1887 +++++++++++++
Standard_robot/MDK-ARM/Standard_robot.uvoptx | 283 +-
Standard_robot/MDK-ARM/Standard_robot.uvprojx | 226 +-
Standard_robot/Src/Remote_Control.c | 10 +-
Standard_robot/Src/can.c | 78 +-
Standard_robot/Src/dma.c | 3 +
Standard_robot/Src/gpio.c | 49 +-
Standard_robot/Src/main.c | 33 +-
Standard_robot/Src/stm32f4xx_hal_msp.c | 22 +-
.../Src/stm32f4xx_hal_timebase_tim.c | 114 +
Standard_robot/Src/stm32f4xx_it.c | 44 +-
Standard_robot/Src/tim.c | 75 +-
Standard_robot/Src/usart.c | 14 +-
Standard_robot/Standard_robot.ioc | 130 +-
demo610/Src/Remote_Control.c | 3 +-
demo610/demo.ioc | 46 +-
32 files changed, 6021 insertions(+), 624 deletions(-)
create mode 100644 Standard_robot/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_can.h
create mode 100644 Standard_robot/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_can.c
create mode 100644 Standard_robot/Inc/Remote_Control.h
create mode 100644 Standard_robot/MDK-ARM/Standard_robot.uvguix.cisse
create mode 100644 Standard_robot/Src/stm32f4xx_hal_timebase_tim.c
diff --git a/Standard_robot/.mxproject b/Standard_robot/.mxproject
index 4270762..03ef7e6 100644
--- a/Standard_robot/.mxproject
+++ b/Standard_robot/.mxproject
@@ -1,14 +1,14 @@
[PreviousGenFiles]
-HeaderPath=D:/charl/Documents/Git/RM-Controle/Standard_robot/Inc
-HeaderFiles=gpio.h;stm32f4xx_it.h;stm32f4xx_hal_conf.h;main.h;dma.h;usart.h;adc.h;spi.h;
-SourcePath=D:/charl/Documents/Git/RM-Controle/Standard_robot/Src
-SourceFiles=gpio.c;stm32f4xx_it.c;stm32f4xx_hal_msp.c;main.c;dma.c;usart.c;adc.c;spi.c;
+HeaderPath=C:/Users/cisse/Desktop/RoboMaster/controle-et-systeme/Standard_robot/Inc
+HeaderFiles=gpio.h;stm32f4xx_it.h;stm32f4xx_hal_conf.h;main.h;dma.h;usart.h;adc.h;spi.h;can.h;tim.h;
+SourcePath=C:/Users/cisse/Desktop/RoboMaster/controle-et-systeme/Standard_robot/Src
+SourceFiles=gpio.c;stm32f4xx_it.c;stm32f4xx_hal_msp.c;main.c;dma.c;usart.c;adc.c;spi.c;can.c;tim.c;stm32f4xx_hal_timebase_tim.c;
[PreviousLibFiles]
-LibFiles=Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h;Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_adc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_adc_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h;Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h;Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f427xx.h;Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h;Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h;Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/system_stm32f4xx.c;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/tz_context.h;
+LibFiles=Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h;Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_can.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_adc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_adc_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_can.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h;Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_can.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h;Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f427xx.h;Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h;Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h;Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/system_stm32f4xx.c;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/tz_context.h;
[PreviousUsedKeilFiles]
-SourceFiles=..\Src\main.c;..\Src\gpio.c;..\Src\adc.c;..\Src\dma.c;..\Src\spi.c;..\Src\usart.c;..\Src\stm32f4xx_it.c;..\Src\stm32f4xx_hal_msp.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_adc.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_adc_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c;../\Src/system_stm32f4xx.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_adc.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_adc_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c;../\Src/system_stm32f4xx.c;../Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/system_stm32f4xx.c;null;
+SourceFiles=..\Src\main.c;..\Src\gpio.c;..\Src\adc.c;..\Src\can.c;..\Src\dma.c;..\Src\spi.c;..\Src\tim.c;..\Src\usart.c;..\Src\stm32f4xx_it.c;..\Src\stm32f4xx_hal_msp.c;..\Src\stm32f4xx_hal_timebase_tim.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_adc.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_adc_ex.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_can.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c;..\\Src/system_stm32f4xx.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_adc.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_adc_ex.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_can.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c;..\\Src/system_stm32f4xx.c;..\Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/system_stm32f4xx.c;;
HeaderPath=..\Drivers\STM32F4xx_HAL_Driver\Inc;..\Drivers\STM32F4xx_HAL_Driver\Inc\Legacy;..\Drivers\CMSIS\Device\ST\STM32F4xx\Include;..\Drivers\CMSIS\Include;..\Inc;
-CDefines=USE_HAL_DRIVER;STM32F427xx;USE_HAL_DRIVER;STM32F427xx;
+CDefines=USE_HAL_DRIVER;STM32F427xx;USE_HAL_DRIVER;USE_HAL_DRIVER;
diff --git a/Standard_robot/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f427xx.h b/Standard_robot/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f427xx.h
index 8dd0806..53dc64d 100644
--- a/Standard_robot/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f427xx.h
+++ b/Standard_robot/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f427xx.h
@@ -161,7 +161,7 @@ typedef enum
OTG_FS_IRQn = 67, /*!< USB OTG FS global Interrupt */
DMA2_Stream5_IRQn = 68, /*!< DMA2 Stream 5 global interrupt */
DMA2_Stream6_IRQn = 69, /*!< DMA2 Stream 6 global interrupt */
- DMA2_Stream2_IRQn = 70, /*!< DMA2 Stream 7 global interrupt */
+ DMA2_Stream7_IRQn = 70, /*!< DMA2 Stream 7 global interrupt */
USART6_IRQn = 71, /*!< USART6 global interrupt */
I2C3_EV_IRQn = 72, /*!< I2C3 event interrupt */
I2C3_ER_IRQn = 73, /*!< I2C3 error interrupt */
@@ -1104,7 +1104,7 @@ typedef struct
#define DMA2_Stream4_BASE (DMA2_BASE + 0x070UL)
#define DMA2_Stream5_BASE (DMA2_BASE + 0x088UL)
#define DMA2_Stream6_BASE (DMA2_BASE + 0x0A0UL)
-#define DMA2_Stream2_BASE (DMA2_BASE + 0x0B8UL)
+#define DMA2_Stream7_BASE (DMA2_BASE + 0x0B8UL)
#define ETH_BASE (AHB1PERIPH_BASE + 0x8000UL)
#define ETH_MAC_BASE (ETH_BASE)
#define ETH_MMC_BASE (ETH_BASE + 0x0100UL)
@@ -1237,7 +1237,7 @@ typedef struct
#define DMA2_Stream4 ((DMA_Stream_TypeDef *) DMA2_Stream4_BASE)
#define DMA2_Stream5 ((DMA_Stream_TypeDef *) DMA2_Stream5_BASE)
#define DMA2_Stream6 ((DMA_Stream_TypeDef *) DMA2_Stream6_BASE)
-#define DMA2_Stream2 ((DMA_Stream_TypeDef *) DMA2_Stream2_BASE)
+#define DMA2_Stream7 ((DMA_Stream_TypeDef *) DMA2_Stream7_BASE)
#define ETH ((ETH_TypeDef *) ETH_BASE)
#define DMA2D ((DMA2D_TypeDef *)DMA2D_BASE)
#define DCMI ((DCMI_TypeDef *) DCMI_BASE)
@@ -16328,7 +16328,7 @@ typedef struct
((INSTANCE) == DMA2_Stream4) || \
((INSTANCE) == DMA2_Stream5) || \
((INSTANCE) == DMA2_Stream6) || \
- ((INSTANCE) == DMA2_Stream2))
+ ((INSTANCE) == DMA2_Stream7))
/******************************* GPIO Instances *******************************/
#define IS_GPIO_ALL_INSTANCE(INSTANCE) (((INSTANCE) == GPIOA) || \
diff --git a/Standard_robot/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_can.h b/Standard_robot/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_can.h
new file mode 100644
index 0000000..0611a65
--- /dev/null
+++ b/Standard_robot/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_can.h
@@ -0,0 +1,848 @@
+/**
+ ******************************************************************************
+ * @file stm32f4xx_hal_can.h
+ * @author MCD Application Team
+ * @brief Header file of CAN HAL module.
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>© Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32F4xx_HAL_CAN_H
+#define STM32F4xx_HAL_CAN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f4xx_hal_def.h"
+
+/** @addtogroup STM32F4xx_HAL_Driver
+ * @{
+ */
+
+#if defined (CAN1)
+/** @addtogroup CAN
+ * @{
+ */
+
+/* Exported types ------------------------------------------------------------*/
+/** @defgroup CAN_Exported_Types CAN Exported Types
+ * @{
+ */
+/**
+ * @brief HAL State structures definition
+ */
+typedef enum
+{
+ HAL_CAN_STATE_RESET = 0x00U, /*!< CAN not yet initialized or disabled */
+ HAL_CAN_STATE_READY = 0x01U, /*!< CAN initialized and ready for use */
+ HAL_CAN_STATE_LISTENING = 0x02U, /*!< CAN receive process is ongoing */
+ HAL_CAN_STATE_SLEEP_PENDING = 0x03U, /*!< CAN sleep request is pending */
+ HAL_CAN_STATE_SLEEP_ACTIVE = 0x04U, /*!< CAN sleep mode is active */
+ HAL_CAN_STATE_ERROR = 0x05U /*!< CAN error state */
+
+} HAL_CAN_StateTypeDef;
+
+/**
+ * @brief CAN init structure definition
+ */
+typedef struct
+{
+ uint32_t Prescaler; /*!< Specifies the length of a time quantum.
+ This parameter must be a number between Min_Data = 1 and Max_Data = 1024. */
+
+ uint32_t Mode; /*!< Specifies the CAN operating mode.
+ This parameter can be a value of @ref CAN_operating_mode */
+
+ uint32_t SyncJumpWidth; /*!< Specifies the maximum number of time quanta the CAN hardware
+ is allowed to lengthen or shorten a bit to perform resynchronization.
+ This parameter can be a value of @ref CAN_synchronisation_jump_width */
+
+ uint32_t TimeSeg1; /*!< Specifies the number of time quanta in Bit Segment 1.
+ This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_1 */
+
+ uint32_t TimeSeg2; /*!< Specifies the number of time quanta in Bit Segment 2.
+ This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_2 */
+
+ FunctionalState TimeTriggeredMode; /*!< Enable or disable the time triggered communication mode.
+ This parameter can be set to ENABLE or DISABLE. */
+
+ FunctionalState AutoBusOff; /*!< Enable or disable the automatic bus-off management.
+ This parameter can be set to ENABLE or DISABLE. */
+
+ FunctionalState AutoWakeUp; /*!< Enable or disable the automatic wake-up mode.
+ This parameter can be set to ENABLE or DISABLE. */
+
+ FunctionalState AutoRetransmission; /*!< Enable or disable the non-automatic retransmission mode.
+ This parameter can be set to ENABLE or DISABLE. */
+
+ FunctionalState ReceiveFifoLocked; /*!< Enable or disable the Receive FIFO Locked mode.
+ This parameter can be set to ENABLE or DISABLE. */
+
+ FunctionalState TransmitFifoPriority;/*!< Enable or disable the transmit FIFO priority.
+ This parameter can be set to ENABLE or DISABLE. */
+
+} CAN_InitTypeDef;
+
+/**
+ * @brief CAN filter configuration structure definition
+ */
+typedef struct
+{
+ uint32_t FilterIdHigh; /*!< Specifies the filter identification number (MSBs for a 32-bit
+ configuration, first one for a 16-bit configuration).
+ This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */
+
+ uint32_t FilterIdLow; /*!< Specifies the filter identification number (LSBs for a 32-bit
+ configuration, second one for a 16-bit configuration).
+ This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */
+
+ uint32_t FilterMaskIdHigh; /*!< Specifies the filter mask number or identification number,
+ according to the mode (MSBs for a 32-bit configuration,
+ first one for a 16-bit configuration).
+ This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */
+
+ uint32_t FilterMaskIdLow; /*!< Specifies the filter mask number or identification number,
+ according to the mode (LSBs for a 32-bit configuration,
+ second one for a 16-bit configuration).
+ This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */
+
+ uint32_t FilterFIFOAssignment; /*!< Specifies the FIFO (0 or 1U) which will be assigned to the filter.
+ This parameter can be a value of @ref CAN_filter_FIFO */
+
+ uint32_t FilterBank; /*!< Specifies the filter bank which will be initialized.
+ For single CAN instance(14 dedicated filter banks),
+ this parameter must be a number between Min_Data = 0 and Max_Data = 13.
+ For dual CAN instances(28 filter banks shared),
+ this parameter must be a number between Min_Data = 0 and Max_Data = 27. */
+
+ uint32_t FilterMode; /*!< Specifies the filter mode to be initialized.
+ This parameter can be a value of @ref CAN_filter_mode */
+
+ uint32_t FilterScale; /*!< Specifies the filter scale.
+ This parameter can be a value of @ref CAN_filter_scale */
+
+ uint32_t FilterActivation; /*!< Enable or disable the filter.
+ This parameter can be a value of @ref CAN_filter_activation */
+
+ uint32_t SlaveStartFilterBank; /*!< Select the start filter bank for the slave CAN instance.
+ For single CAN instances, this parameter is meaningless.
+ For dual CAN instances, all filter banks with lower index are assigned to master
+ CAN instance, whereas all filter banks with greater index are assigned to slave
+ CAN instance.
+ This parameter must be a number between Min_Data = 0 and Max_Data = 27. */
+
+} CAN_FilterTypeDef;
+
+/**
+ * @brief CAN Tx message header structure definition
+ */
+typedef struct
+{
+ uint32_t StdId; /*!< Specifies the standard identifier.
+ This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF. */
+
+ uint32_t ExtId; /*!< Specifies the extended identifier.
+ This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF. */
+
+ uint32_t IDE; /*!< Specifies the type of identifier for the message that will be transmitted.
+ This parameter can be a value of @ref CAN_identifier_type */
+
+ uint32_t RTR; /*!< Specifies the type of frame for the message that will be transmitted.
+ This parameter can be a value of @ref CAN_remote_transmission_request */
+
+ uint32_t DLC; /*!< Specifies the length of the frame that will be transmitted.
+ This parameter must be a number between Min_Data = 0 and Max_Data = 8. */
+
+ FunctionalState TransmitGlobalTime; /*!< Specifies whether the timestamp counter value captured on start
+ of frame transmission, is sent in DATA6 and DATA7 replacing pData[6] and pData[7].
+ @note: Time Triggered Communication Mode must be enabled.
+ @note: DLC must be programmed as 8 bytes, in order these 2 bytes are sent.
+ This parameter can be set to ENABLE or DISABLE. */
+
+} CAN_TxHeaderTypeDef;
+
+/**
+ * @brief CAN Rx message header structure definition
+ */
+typedef struct
+{
+ uint32_t StdId; /*!< Specifies the standard identifier.
+ This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF. */
+
+ uint32_t ExtId; /*!< Specifies the extended identifier.
+ This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF. */
+
+ uint32_t IDE; /*!< Specifies the type of identifier for the message that will be transmitted.
+ This parameter can be a value of @ref CAN_identifier_type */
+
+ uint32_t RTR; /*!< Specifies the type of frame for the message that will be transmitted.
+ This parameter can be a value of @ref CAN_remote_transmission_request */
+
+ uint32_t DLC; /*!< Specifies the length of the frame that will be transmitted.
+ This parameter must be a number between Min_Data = 0 and Max_Data = 8. */
+
+ uint32_t Timestamp; /*!< Specifies the timestamp counter value captured on start of frame reception.
+ @note: Time Triggered Communication Mode must be enabled.
+ This parameter must be a number between Min_Data = 0 and Max_Data = 0xFFFF. */
+
+ uint32_t FilterMatchIndex; /*!< Specifies the index of matching acceptance filter element.
+ This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF. */
+
+} CAN_RxHeaderTypeDef;
+
+/**
+ * @brief CAN handle Structure definition
+ */
+typedef struct __CAN_HandleTypeDef
+{
+ CAN_TypeDef *Instance; /*!< Register base address */
+
+ CAN_InitTypeDef Init; /*!< CAN required parameters */
+
+ __IO HAL_CAN_StateTypeDef State; /*!< CAN communication state */
+
+ __IO uint32_t ErrorCode; /*!< CAN Error code.
+ This parameter can be a value of @ref CAN_Error_Code */
+
+#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
+ void (* TxMailbox0CompleteCallback)(struct __CAN_HandleTypeDef *hcan);/*!< CAN Tx Mailbox 0 complete callback */
+ void (* TxMailbox1CompleteCallback)(struct __CAN_HandleTypeDef *hcan);/*!< CAN Tx Mailbox 1 complete callback */
+ void (* TxMailbox2CompleteCallback)(struct __CAN_HandleTypeDef *hcan);/*!< CAN Tx Mailbox 2 complete callback */
+ void (* TxMailbox0AbortCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Tx Mailbox 0 abort callback */
+ void (* TxMailbox1AbortCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Tx Mailbox 1 abort callback */
+ void (* TxMailbox2AbortCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Tx Mailbox 2 abort callback */
+ void (* RxFifo0MsgPendingCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Rx FIFO 0 msg pending callback */
+ void (* RxFifo0FullCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Rx FIFO 0 full callback */
+ void (* RxFifo1MsgPendingCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Rx FIFO 1 msg pending callback */
+ void (* RxFifo1FullCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Rx FIFO 1 full callback */
+ void (* SleepCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Sleep callback */
+ void (* WakeUpFromRxMsgCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Wake Up from Rx msg callback */
+ void (* ErrorCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Error callback */
+
+ void (* MspInitCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Msp Init callback */
+ void (* MspDeInitCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Msp DeInit callback */
+
+#endif /* (USE_HAL_CAN_REGISTER_CALLBACKS) */
+} CAN_HandleTypeDef;
+
+#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
+/**
+ * @brief HAL CAN common Callback ID enumeration definition
+ */
+typedef enum
+{
+ HAL_CAN_TX_MAILBOX0_COMPLETE_CB_ID = 0x00U, /*!< CAN Tx Mailbox 0 complete callback ID */
+ HAL_CAN_TX_MAILBOX1_COMPLETE_CB_ID = 0x01U, /*!< CAN Tx Mailbox 1 complete callback ID */
+ HAL_CAN_TX_MAILBOX2_COMPLETE_CB_ID = 0x02U, /*!< CAN Tx Mailbox 2 complete callback ID */
+ HAL_CAN_TX_MAILBOX0_ABORT_CB_ID = 0x03U, /*!< CAN Tx Mailbox 0 abort callback ID */
+ HAL_CAN_TX_MAILBOX1_ABORT_CB_ID = 0x04U, /*!< CAN Tx Mailbox 1 abort callback ID */
+ HAL_CAN_TX_MAILBOX2_ABORT_CB_ID = 0x05U, /*!< CAN Tx Mailbox 2 abort callback ID */
+ HAL_CAN_RX_FIFO0_MSG_PENDING_CB_ID = 0x06U, /*!< CAN Rx FIFO 0 message pending callback ID */
+ HAL_CAN_RX_FIFO0_FULL_CB_ID = 0x07U, /*!< CAN Rx FIFO 0 full callback ID */
+ HAL_CAN_RX_FIFO1_MSG_PENDING_CB_ID = 0x08U, /*!< CAN Rx FIFO 1 message pending callback ID */
+ HAL_CAN_RX_FIFO1_FULL_CB_ID = 0x09U, /*!< CAN Rx FIFO 1 full callback ID */
+ HAL_CAN_SLEEP_CB_ID = 0x0AU, /*!< CAN Sleep callback ID */
+ HAL_CAN_WAKEUP_FROM_RX_MSG_CB_ID = 0x0BU, /*!< CAN Wake Up fropm Rx msg callback ID */
+ HAL_CAN_ERROR_CB_ID = 0x0CU, /*!< CAN Error callback ID */
+
+ HAL_CAN_MSPINIT_CB_ID = 0x0DU, /*!< CAN MspInit callback ID */
+ HAL_CAN_MSPDEINIT_CB_ID = 0x0EU, /*!< CAN MspDeInit callback ID */
+
+} HAL_CAN_CallbackIDTypeDef;
+
+/**
+ * @brief HAL CAN Callback pointer definition
+ */
+typedef void (*pCAN_CallbackTypeDef)(CAN_HandleTypeDef *hcan); /*!< pointer to a CAN callback function */
+
+#endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
+/**
+ * @}
+ */
+
+/* Exported constants --------------------------------------------------------*/
+
+/** @defgroup CAN_Exported_Constants CAN Exported Constants
+ * @{
+ */
+
+/** @defgroup CAN_Error_Code CAN Error Code
+ * @{
+ */
+#define HAL_CAN_ERROR_NONE (0x00000000U) /*!< No error */
+#define HAL_CAN_ERROR_EWG (0x00000001U) /*!< Protocol Error Warning */
+#define HAL_CAN_ERROR_EPV (0x00000002U) /*!< Error Passive */
+#define HAL_CAN_ERROR_BOF (0x00000004U) /*!< Bus-off error */
+#define HAL_CAN_ERROR_STF (0x00000008U) /*!< Stuff error */
+#define HAL_CAN_ERROR_FOR (0x00000010U) /*!< Form error */
+#define HAL_CAN_ERROR_ACK (0x00000020U) /*!< Acknowledgment error */
+#define HAL_CAN_ERROR_BR (0x00000040U) /*!< Bit recessive error */
+#define HAL_CAN_ERROR_BD (0x00000080U) /*!< Bit dominant error */
+#define HAL_CAN_ERROR_CRC (0x00000100U) /*!< CRC error */
+#define HAL_CAN_ERROR_RX_FOV0 (0x00000200U) /*!< Rx FIFO0 overrun error */
+#define HAL_CAN_ERROR_RX_FOV1 (0x00000400U) /*!< Rx FIFO1 overrun error */
+#define HAL_CAN_ERROR_TX_ALST0 (0x00000800U) /*!< TxMailbox 0 transmit failure due to arbitration lost */
+#define HAL_CAN_ERROR_TX_TERR0 (0x00001000U) /*!< TxMailbox 1 transmit failure due to tranmit error */
+#define HAL_CAN_ERROR_TX_ALST1 (0x00002000U) /*!< TxMailbox 0 transmit failure due to arbitration lost */
+#define HAL_CAN_ERROR_TX_TERR1 (0x00004000U) /*!< TxMailbox 1 transmit failure due to tranmit error */
+#define HAL_CAN_ERROR_TX_ALST2 (0x00008000U) /*!< TxMailbox 0 transmit failure due to arbitration lost */
+#define HAL_CAN_ERROR_TX_TERR2 (0x00010000U) /*!< TxMailbox 1 transmit failure due to tranmit error */
+#define HAL_CAN_ERROR_TIMEOUT (0x00020000U) /*!< Timeout error */
+#define HAL_CAN_ERROR_NOT_INITIALIZED (0x00040000U) /*!< Peripheral not initialized */
+#define HAL_CAN_ERROR_NOT_READY (0x00080000U) /*!< Peripheral not ready */
+#define HAL_CAN_ERROR_NOT_STARTED (0x00100000U) /*!< Peripheral not started */
+#define HAL_CAN_ERROR_PARAM (0x00200000U) /*!< Parameter error */
+
+#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
+#define HAL_CAN_ERROR_INVALID_CALLBACK (0x00400000U) /*!< Invalid Callback error */
+#endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
+#define HAL_CAN_ERROR_INTERNAL (0x00800000U) /*!< Internal error */
+
+/**
+ * @}
+ */
+
+/** @defgroup CAN_InitStatus CAN InitStatus
+ * @{
+ */
+#define CAN_INITSTATUS_FAILED (0x00000000U) /*!< CAN initialization failed */
+#define CAN_INITSTATUS_SUCCESS (0x00000001U) /*!< CAN initialization OK */
+/**
+ * @}
+ */
+
+/** @defgroup CAN_operating_mode CAN Operating Mode
+ * @{
+ */
+#define CAN_MODE_NORMAL (0x00000000U) /*!< Normal mode */
+#define CAN_MODE_LOOPBACK ((uint32_t)CAN_BTR_LBKM) /*!< Loopback mode */
+#define CAN_MODE_SILENT ((uint32_t)CAN_BTR_SILM) /*!< Silent mode */
+#define CAN_MODE_SILENT_LOOPBACK ((uint32_t)(CAN_BTR_LBKM | CAN_BTR_SILM)) /*!< Loopback combined with silent mode */
+/**
+ * @}
+ */
+
+
+/** @defgroup CAN_synchronisation_jump_width CAN Synchronization Jump Width
+ * @{
+ */
+#define CAN_SJW_1TQ (0x00000000U) /*!< 1 time quantum */
+#define CAN_SJW_2TQ ((uint32_t)CAN_BTR_SJW_0) /*!< 2 time quantum */
+#define CAN_SJW_3TQ ((uint32_t)CAN_BTR_SJW_1) /*!< 3 time quantum */
+#define CAN_SJW_4TQ ((uint32_t)CAN_BTR_SJW) /*!< 4 time quantum */
+/**
+ * @}
+ */
+
+/** @defgroup CAN_time_quantum_in_bit_segment_1 CAN Time Quantum in Bit Segment 1
+ * @{
+ */
+#define CAN_BS1_1TQ (0x00000000U) /*!< 1 time quantum */
+#define CAN_BS1_2TQ ((uint32_t)CAN_BTR_TS1_0) /*!< 2 time quantum */
+#define CAN_BS1_3TQ ((uint32_t)CAN_BTR_TS1_1) /*!< 3 time quantum */
+#define CAN_BS1_4TQ ((uint32_t)(CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 4 time quantum */
+#define CAN_BS1_5TQ ((uint32_t)CAN_BTR_TS1_2) /*!< 5 time quantum */
+#define CAN_BS1_6TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_0)) /*!< 6 time quantum */
+#define CAN_BS1_7TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1)) /*!< 7 time quantum */
+#define CAN_BS1_8TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 8 time quantum */
+#define CAN_BS1_9TQ ((uint32_t)CAN_BTR_TS1_3) /*!< 9 time quantum */
+#define CAN_BS1_10TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_0)) /*!< 10 time quantum */
+#define CAN_BS1_11TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1)) /*!< 11 time quantum */
+#define CAN_BS1_12TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 12 time quantum */
+#define CAN_BS1_13TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2)) /*!< 13 time quantum */
+#define CAN_BS1_14TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_0)) /*!< 14 time quantum */
+#define CAN_BS1_15TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_1)) /*!< 15 time quantum */
+#define CAN_BS1_16TQ ((uint32_t)CAN_BTR_TS1) /*!< 16 time quantum */
+/**
+ * @}
+ */
+
+/** @defgroup CAN_time_quantum_in_bit_segment_2 CAN Time Quantum in Bit Segment 2
+ * @{
+ */
+#define CAN_BS2_1TQ (0x00000000U) /*!< 1 time quantum */
+#define CAN_BS2_2TQ ((uint32_t)CAN_BTR_TS2_0) /*!< 2 time quantum */
+#define CAN_BS2_3TQ ((uint32_t)CAN_BTR_TS2_1) /*!< 3 time quantum */
+#define CAN_BS2_4TQ ((uint32_t)(CAN_BTR_TS2_1 | CAN_BTR_TS2_0)) /*!< 4 time quantum */
+#define CAN_BS2_5TQ ((uint32_t)CAN_BTR_TS2_2) /*!< 5 time quantum */
+#define CAN_BS2_6TQ ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_0)) /*!< 6 time quantum */
+#define CAN_BS2_7TQ ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_1)) /*!< 7 time quantum */
+#define CAN_BS2_8TQ ((uint32_t)CAN_BTR_TS2) /*!< 8 time quantum */
+/**
+ * @}
+ */
+
+/** @defgroup CAN_filter_mode CAN Filter Mode
+ * @{
+ */
+#define CAN_FILTERMODE_IDMASK (0x00000000U) /*!< Identifier mask mode */
+#define CAN_FILTERMODE_IDLIST (0x00000001U) /*!< Identifier list mode */
+/**
+ * @}
+ */
+
+/** @defgroup CAN_filter_scale CAN Filter Scale
+ * @{
+ */
+#define CAN_FILTERSCALE_16BIT (0x00000000U) /*!< Two 16-bit filters */
+#define CAN_FILTERSCALE_32BIT (0x00000001U) /*!< One 32-bit filter */
+/**
+ * @}
+ */
+
+/** @defgroup CAN_filter_activation CAN Filter Activation
+ * @{
+ */
+#define CAN_FILTER_DISABLE (0x00000000U) /*!< Disable filter */
+#define CAN_FILTER_ENABLE (0x00000001U) /*!< Enable filter */
+/**
+ * @}
+ */
+
+/** @defgroup CAN_filter_FIFO CAN Filter FIFO
+ * @{
+ */
+#define CAN_FILTER_FIFO0 (0x00000000U) /*!< Filter FIFO 0 assignment for filter x */
+#define CAN_FILTER_FIFO1 (0x00000001U) /*!< Filter FIFO 1 assignment for filter x */
+/**
+ * @}
+ */
+
+/** @defgroup CAN_identifier_type CAN Identifier Type
+ * @{
+ */
+#define CAN_ID_STD (0x00000000U) /*!< Standard Id */
+#define CAN_ID_EXT (0x00000004U) /*!< Extended Id */
+/**
+ * @}
+ */
+
+/** @defgroup CAN_remote_transmission_request CAN Remote Transmission Request
+ * @{
+ */
+#define CAN_RTR_DATA (0x00000000U) /*!< Data frame */
+#define CAN_RTR_REMOTE (0x00000002U) /*!< Remote frame */
+/**
+ * @}
+ */
+
+/** @defgroup CAN_receive_FIFO_number CAN Receive FIFO Number
+ * @{
+ */
+#define CAN_RX_FIFO0 (0x00000000U) /*!< CAN receive FIFO 0 */
+#define CAN_RX_FIFO1 (0x00000001U) /*!< CAN receive FIFO 1 */
+/**
+ * @}
+ */
+
+/** @defgroup CAN_Tx_Mailboxes CAN Tx Mailboxes
+ * @{
+ */
+#define CAN_TX_MAILBOX0 (0x00000001U) /*!< Tx Mailbox 0 */
+#define CAN_TX_MAILBOX1 (0x00000002U) /*!< Tx Mailbox 1 */
+#define CAN_TX_MAILBOX2 (0x00000004U) /*!< Tx Mailbox 2 */
+/**
+ * @}
+ */
+
+/** @defgroup CAN_flags CAN Flags
+ * @{
+ */
+/* Transmit Flags */
+#define CAN_FLAG_RQCP0 (0x00000500U) /*!< Request complete MailBox 0 flag */
+#define CAN_FLAG_TXOK0 (0x00000501U) /*!< Transmission OK MailBox 0 flag */
+#define CAN_FLAG_ALST0 (0x00000502U) /*!< Arbitration Lost MailBox 0 flag */
+#define CAN_FLAG_TERR0 (0x00000503U) /*!< Transmission error MailBox 0 flag */
+#define CAN_FLAG_RQCP1 (0x00000508U) /*!< Request complete MailBox1 flag */
+#define CAN_FLAG_TXOK1 (0x00000509U) /*!< Transmission OK MailBox 1 flag */
+#define CAN_FLAG_ALST1 (0x0000050AU) /*!< Arbitration Lost MailBox 1 flag */
+#define CAN_FLAG_TERR1 (0x0000050BU) /*!< Transmission error MailBox 1 flag */
+#define CAN_FLAG_RQCP2 (0x00000510U) /*!< Request complete MailBox2 flag */
+#define CAN_FLAG_TXOK2 (0x00000511U) /*!< Transmission OK MailBox 2 flag */
+#define CAN_FLAG_ALST2 (0x00000512U) /*!< Arbitration Lost MailBox 2 flag */
+#define CAN_FLAG_TERR2 (0x00000513U) /*!< Transmission error MailBox 2 flag */
+#define CAN_FLAG_TME0 (0x0000051AU) /*!< Transmit mailbox 0 empty flag */
+#define CAN_FLAG_TME1 (0x0000051BU) /*!< Transmit mailbox 1 empty flag */
+#define CAN_FLAG_TME2 (0x0000051CU) /*!< Transmit mailbox 2 empty flag */
+#define CAN_FLAG_LOW0 (0x0000051DU) /*!< Lowest priority mailbox 0 flag */
+#define CAN_FLAG_LOW1 (0x0000051EU) /*!< Lowest priority mailbox 1 flag */
+#define CAN_FLAG_LOW2 (0x0000051FU) /*!< Lowest priority mailbox 2 flag */
+
+/* Receive Flags */
+#define CAN_FLAG_FF0 (0x00000203U) /*!< RX FIFO 0 Full flag */
+#define CAN_FLAG_FOV0 (0x00000204U) /*!< RX FIFO 0 Overrun flag */
+#define CAN_FLAG_FF1 (0x00000403U) /*!< RX FIFO 1 Full flag */
+#define CAN_FLAG_FOV1 (0x00000404U) /*!< RX FIFO 1 Overrun flag */
+
+/* Operating Mode Flags */
+#define CAN_FLAG_INAK (0x00000100U) /*!< Initialization acknowledge flag */
+#define CAN_FLAG_SLAK (0x00000101U) /*!< Sleep acknowledge flag */
+#define CAN_FLAG_ERRI (0x00000102U) /*!< Error flag */
+#define CAN_FLAG_WKU (0x00000103U) /*!< Wake up interrupt flag */
+#define CAN_FLAG_SLAKI (0x00000104U) /*!< Sleep acknowledge interrupt flag */
+
+/* Error Flags */
+#define CAN_FLAG_EWG (0x00000300U) /*!< Error warning flag */
+#define CAN_FLAG_EPV (0x00000301U) /*!< Error passive flag */
+#define CAN_FLAG_BOF (0x00000302U) /*!< Bus-Off flag */
+/**
+ * @}
+ */
+
+
+/** @defgroup CAN_Interrupts CAN Interrupts
+ * @{
+ */
+/* Transmit Interrupt */
+#define CAN_IT_TX_MAILBOX_EMPTY ((uint32_t)CAN_IER_TMEIE) /*!< Transmit mailbox empty interrupt */
+
+/* Receive Interrupts */
+#define CAN_IT_RX_FIFO0_MSG_PENDING ((uint32_t)CAN_IER_FMPIE0) /*!< FIFO 0 message pending interrupt */
+#define CAN_IT_RX_FIFO0_FULL ((uint32_t)CAN_IER_FFIE0) /*!< FIFO 0 full interrupt */
+#define CAN_IT_RX_FIFO0_OVERRUN ((uint32_t)CAN_IER_FOVIE0) /*!< FIFO 0 overrun interrupt */
+#define CAN_IT_RX_FIFO1_MSG_PENDING ((uint32_t)CAN_IER_FMPIE1) /*!< FIFO 1 message pending interrupt */
+#define CAN_IT_RX_FIFO1_FULL ((uint32_t)CAN_IER_FFIE1) /*!< FIFO 1 full interrupt */
+#define CAN_IT_RX_FIFO1_OVERRUN ((uint32_t)CAN_IER_FOVIE1) /*!< FIFO 1 overrun interrupt */
+
+/* Operating Mode Interrupts */
+#define CAN_IT_WAKEUP ((uint32_t)CAN_IER_WKUIE) /*!< Wake-up interrupt */
+#define CAN_IT_SLEEP_ACK ((uint32_t)CAN_IER_SLKIE) /*!< Sleep acknowledge interrupt */
+
+/* Error Interrupts */
+#define CAN_IT_ERROR_WARNING ((uint32_t)CAN_IER_EWGIE) /*!< Error warning interrupt */
+#define CAN_IT_ERROR_PASSIVE ((uint32_t)CAN_IER_EPVIE) /*!< Error passive interrupt */
+#define CAN_IT_BUSOFF ((uint32_t)CAN_IER_BOFIE) /*!< Bus-off interrupt */
+#define CAN_IT_LAST_ERROR_CODE ((uint32_t)CAN_IER_LECIE) /*!< Last error code interrupt */
+#define CAN_IT_ERROR ((uint32_t)CAN_IER_ERRIE) /*!< Error Interrupt */
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/* Exported macros -----------------------------------------------------------*/
+/** @defgroup CAN_Exported_Macros CAN Exported Macros
+ * @{
+ */
+
+/** @brief Reset CAN handle state
+ * @param __HANDLE__ CAN handle.
+ * @retval None
+ */
+#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
+#define __HAL_CAN_RESET_HANDLE_STATE(__HANDLE__) do{ \
+ (__HANDLE__)->State = HAL_CAN_STATE_RESET; \
+ (__HANDLE__)->MspInitCallback = NULL; \
+ (__HANDLE__)->MspDeInitCallback = NULL; \
+ } while(0)
+#else
+#define __HAL_CAN_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CAN_STATE_RESET)
+#endif /*USE_HAL_CAN_REGISTER_CALLBACKS */
+
+/**
+ * @brief Enable the specified CAN interrupts.
+ * @param __HANDLE__ CAN handle.
+ * @param __INTERRUPT__ CAN Interrupt sources to enable.
+ * This parameter can be any combination of @arg CAN_Interrupts
+ * @retval None
+ */
+#define __HAL_CAN_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) |= (__INTERRUPT__))
+
+/**
+ * @brief Disable the specified CAN interrupts.
+ * @param __HANDLE__ CAN handle.
+ * @param __INTERRUPT__ CAN Interrupt sources to disable.
+ * This parameter can be any combination of @arg CAN_Interrupts
+ * @retval None
+ */
+#define __HAL_CAN_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) &= ~(__INTERRUPT__))
+
+/** @brief Check if the specified CAN interrupt source is enabled or disabled.
+ * @param __HANDLE__ specifies the CAN Handle.
+ * @param __INTERRUPT__ specifies the CAN interrupt source to check.
+ * This parameter can be a value of @arg CAN_Interrupts
+ * @retval The state of __IT__ (TRUE or FALSE).
+ */
+#define __HAL_CAN_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) & (__INTERRUPT__))
+
+/** @brief Check whether the specified CAN flag is set or not.
+ * @param __HANDLE__ specifies the CAN Handle.
+ * @param __FLAG__ specifies the flag to check.
+ * This parameter can be one of @arg CAN_flags
+ * @retval The state of __FLAG__ (TRUE or FALSE).
+ */
+#define __HAL_CAN_GET_FLAG(__HANDLE__, __FLAG__) \
+ ((((__FLAG__) >> 8U) == 5U)? ((((__HANDLE__)->Instance->TSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
+ (((__FLAG__) >> 8U) == 2U)? ((((__HANDLE__)->Instance->RF0R) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
+ (((__FLAG__) >> 8U) == 4U)? ((((__HANDLE__)->Instance->RF1R) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
+ (((__FLAG__) >> 8U) == 1U)? ((((__HANDLE__)->Instance->MSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
+ (((__FLAG__) >> 8U) == 3U)? ((((__HANDLE__)->Instance->ESR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): 0U)
+
+/** @brief Clear the specified CAN pending flag.
+ * @param __HANDLE__ specifies the CAN Handle.
+ * @param __FLAG__ specifies the flag to check.
+ * This parameter can be one of the following values:
+ * @arg CAN_FLAG_RQCP0: Request complete MailBox 0 Flag
+ * @arg CAN_FLAG_TXOK0: Transmission OK MailBox 0 Flag
+ * @arg CAN_FLAG_ALST0: Arbitration Lost MailBox 0 Flag
+ * @arg CAN_FLAG_TERR0: Transmission error MailBox 0 Flag
+ * @arg CAN_FLAG_RQCP1: Request complete MailBox 1 Flag
+ * @arg CAN_FLAG_TXOK1: Transmission OK MailBox 1 Flag
+ * @arg CAN_FLAG_ALST1: Arbitration Lost MailBox 1 Flag
+ * @arg CAN_FLAG_TERR1: Transmission error MailBox 1 Flag
+ * @arg CAN_FLAG_RQCP2: Request complete MailBox 2 Flag
+ * @arg CAN_FLAG_TXOK2: Transmission OK MailBox 2 Flag
+ * @arg CAN_FLAG_ALST2: Arbitration Lost MailBox 2 Flag
+ * @arg CAN_FLAG_TERR2: Transmission error MailBox 2 Flag
+ * @arg CAN_FLAG_FF0: RX FIFO 0 Full Flag
+ * @arg CAN_FLAG_FOV0: RX FIFO 0 Overrun Flag
+ * @arg CAN_FLAG_FF1: RX FIFO 1 Full Flag
+ * @arg CAN_FLAG_FOV1: RX FIFO 1 Overrun Flag
+ * @arg CAN_FLAG_WKUI: Wake up Interrupt Flag
+ * @arg CAN_FLAG_SLAKI: Sleep acknowledge Interrupt Flag
+ * @retval None
+ */
+#define __HAL_CAN_CLEAR_FLAG(__HANDLE__, __FLAG__) \
+ ((((__FLAG__) >> 8U) == 5U)? (((__HANDLE__)->Instance->TSR) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
+ (((__FLAG__) >> 8U) == 2U)? (((__HANDLE__)->Instance->RF0R) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
+ (((__FLAG__) >> 8U) == 4U)? (((__HANDLE__)->Instance->RF1R) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
+ (((__FLAG__) >> 8U) == 1U)? (((__HANDLE__)->Instance->MSR) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): 0U)
+
+/**
+ * @}
+ */
+
+/* Exported functions --------------------------------------------------------*/
+/** @addtogroup CAN_Exported_Functions CAN Exported Functions
+ * @{
+ */
+
+/** @addtogroup CAN_Exported_Functions_Group1 Initialization and de-initialization functions
+ * @brief Initialization and Configuration functions
+ * @{
+ */
+
+/* Initialization and de-initialization functions *****************************/
+HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef *hcan);
+HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef *hcan);
+void HAL_CAN_MspInit(CAN_HandleTypeDef *hcan);
+void HAL_CAN_MspDeInit(CAN_HandleTypeDef *hcan);
+
+#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
+/* Callbacks Register/UnRegister functions ***********************************/
+HAL_StatusTypeDef HAL_CAN_RegisterCallback(CAN_HandleTypeDef *hcan, HAL_CAN_CallbackIDTypeDef CallbackID, void (* pCallback)(CAN_HandleTypeDef *_hcan));
+HAL_StatusTypeDef HAL_CAN_UnRegisterCallback(CAN_HandleTypeDef *hcan, HAL_CAN_CallbackIDTypeDef CallbackID);
+
+#endif /* (USE_HAL_CAN_REGISTER_CALLBACKS) */
+/**
+ * @}
+ */
+
+/** @addtogroup CAN_Exported_Functions_Group2 Configuration functions
+ * @brief Configuration functions
+ * @{
+ */
+
+/* Configuration functions ****************************************************/
+HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef *hcan, CAN_FilterTypeDef *sFilterConfig);
+
+/**
+ * @}
+ */
+
+/** @addtogroup CAN_Exported_Functions_Group3 Control functions
+ * @brief Control functions
+ * @{
+ */
+
+/* Control functions **********************************************************/
+HAL_StatusTypeDef HAL_CAN_Start(CAN_HandleTypeDef *hcan);
+HAL_StatusTypeDef HAL_CAN_Stop(CAN_HandleTypeDef *hcan);
+HAL_StatusTypeDef HAL_CAN_RequestSleep(CAN_HandleTypeDef *hcan);
+HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef *hcan);
+uint32_t HAL_CAN_IsSleepActive(CAN_HandleTypeDef *hcan);
+HAL_StatusTypeDef HAL_CAN_AddTxMessage(CAN_HandleTypeDef *hcan, CAN_TxHeaderTypeDef *pHeader, uint8_t aData[], uint32_t *pTxMailbox);
+HAL_StatusTypeDef HAL_CAN_AbortTxRequest(CAN_HandleTypeDef *hcan, uint32_t TxMailboxes);
+uint32_t HAL_CAN_GetTxMailboxesFreeLevel(CAN_HandleTypeDef *hcan);
+uint32_t HAL_CAN_IsTxMessagePending(CAN_HandleTypeDef *hcan, uint32_t TxMailboxes);
+uint32_t HAL_CAN_GetTxTimestamp(CAN_HandleTypeDef *hcan, uint32_t TxMailbox);
+HAL_StatusTypeDef HAL_CAN_GetRxMessage(CAN_HandleTypeDef *hcan, uint32_t RxFifo, CAN_RxHeaderTypeDef *pHeader, uint8_t aData[]);
+uint32_t HAL_CAN_GetRxFifoFillLevel(CAN_HandleTypeDef *hcan, uint32_t RxFifo);
+
+/**
+ * @}
+ */
+
+/** @addtogroup CAN_Exported_Functions_Group4 Interrupts management
+ * @brief Interrupts management
+ * @{
+ */
+/* Interrupts management ******************************************************/
+HAL_StatusTypeDef HAL_CAN_ActivateNotification(CAN_HandleTypeDef *hcan, uint32_t ActiveITs);
+HAL_StatusTypeDef HAL_CAN_DeactivateNotification(CAN_HandleTypeDef *hcan, uint32_t InactiveITs);
+void HAL_CAN_IRQHandler(CAN_HandleTypeDef *hcan);
+
+/**
+ * @}
+ */
+
+/** @addtogroup CAN_Exported_Functions_Group5 Callback functions
+ * @brief Callback functions
+ * @{
+ */
+/* Callbacks functions ********************************************************/
+
+void HAL_CAN_TxMailbox0CompleteCallback(CAN_HandleTypeDef *hcan);
+void HAL_CAN_TxMailbox1CompleteCallback(CAN_HandleTypeDef *hcan);
+void HAL_CAN_TxMailbox2CompleteCallback(CAN_HandleTypeDef *hcan);
+void HAL_CAN_TxMailbox0AbortCallback(CAN_HandleTypeDef *hcan);
+void HAL_CAN_TxMailbox1AbortCallback(CAN_HandleTypeDef *hcan);
+void HAL_CAN_TxMailbox2AbortCallback(CAN_HandleTypeDef *hcan);
+void HAL_CAN_RxFifo0MsgPendingCallback(CAN_HandleTypeDef *hcan);
+void HAL_CAN_RxFifo0FullCallback(CAN_HandleTypeDef *hcan);
+void HAL_CAN_RxFifo1MsgPendingCallback(CAN_HandleTypeDef *hcan);
+void HAL_CAN_RxFifo1FullCallback(CAN_HandleTypeDef *hcan);
+void HAL_CAN_SleepCallback(CAN_HandleTypeDef *hcan);
+void HAL_CAN_WakeUpFromRxMsgCallback(CAN_HandleTypeDef *hcan);
+void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan);
+
+/**
+ * @}
+ */
+
+/** @addtogroup CAN_Exported_Functions_Group6 Peripheral State and Error functions
+ * @brief CAN Peripheral State functions
+ * @{
+ */
+/* Peripheral State and Error functions ***************************************/
+HAL_CAN_StateTypeDef HAL_CAN_GetState(CAN_HandleTypeDef *hcan);
+uint32_t HAL_CAN_GetError(CAN_HandleTypeDef *hcan);
+HAL_StatusTypeDef HAL_CAN_ResetError(CAN_HandleTypeDef *hcan);
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/* Private types -------------------------------------------------------------*/
+/** @defgroup CAN_Private_Types CAN Private Types
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/* Private variables ---------------------------------------------------------*/
+/** @defgroup CAN_Private_Variables CAN Private Variables
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/* Private constants ---------------------------------------------------------*/
+/** @defgroup CAN_Private_Constants CAN Private Constants
+ * @{
+ */
+#define CAN_FLAG_MASK (0x000000FFU)
+/**
+ * @}
+ */
+
+/* Private Macros -----------------------------------------------------------*/
+/** @defgroup CAN_Private_Macros CAN Private Macros
+ * @{
+ */
+
+#define IS_CAN_MODE(MODE) (((MODE) == CAN_MODE_NORMAL) || \
+ ((MODE) == CAN_MODE_LOOPBACK)|| \
+ ((MODE) == CAN_MODE_SILENT) || \
+ ((MODE) == CAN_MODE_SILENT_LOOPBACK))
+#define IS_CAN_SJW(SJW) (((SJW) == CAN_SJW_1TQ) || ((SJW) == CAN_SJW_2TQ) || \
+ ((SJW) == CAN_SJW_3TQ) || ((SJW) == CAN_SJW_4TQ))
+#define IS_CAN_BS1(BS1) (((BS1) == CAN_BS1_1TQ) || ((BS1) == CAN_BS1_2TQ) || \
+ ((BS1) == CAN_BS1_3TQ) || ((BS1) == CAN_BS1_4TQ) || \
+ ((BS1) == CAN_BS1_5TQ) || ((BS1) == CAN_BS1_6TQ) || \
+ ((BS1) == CAN_BS1_7TQ) || ((BS1) == CAN_BS1_8TQ) || \
+ ((BS1) == CAN_BS1_9TQ) || ((BS1) == CAN_BS1_10TQ)|| \
+ ((BS1) == CAN_BS1_11TQ)|| ((BS1) == CAN_BS1_12TQ)|| \
+ ((BS1) == CAN_BS1_13TQ)|| ((BS1) == CAN_BS1_14TQ)|| \
+ ((BS1) == CAN_BS1_15TQ)|| ((BS1) == CAN_BS1_16TQ))
+#define IS_CAN_BS2(BS2) (((BS2) == CAN_BS2_1TQ) || ((BS2) == CAN_BS2_2TQ) || \
+ ((BS2) == CAN_BS2_3TQ) || ((BS2) == CAN_BS2_4TQ) || \
+ ((BS2) == CAN_BS2_5TQ) || ((BS2) == CAN_BS2_6TQ) || \
+ ((BS2) == CAN_BS2_7TQ) || ((BS2) == CAN_BS2_8TQ))
+#define IS_CAN_PRESCALER(PRESCALER) (((PRESCALER) >= 1U) && ((PRESCALER) <= 1024U))
+#define IS_CAN_FILTER_ID_HALFWORD(HALFWORD) ((HALFWORD) <= 0xFFFFU)
+#define IS_CAN_FILTER_BANK_DUAL(BANK) ((BANK) <= 27U)
+#define IS_CAN_FILTER_BANK_SINGLE(BANK) ((BANK) <= 13U)
+#define IS_CAN_FILTER_MODE(MODE) (((MODE) == CAN_FILTERMODE_IDMASK) || \
+ ((MODE) == CAN_FILTERMODE_IDLIST))
+#define IS_CAN_FILTER_SCALE(SCALE) (((SCALE) == CAN_FILTERSCALE_16BIT) || \
+ ((SCALE) == CAN_FILTERSCALE_32BIT))
+#define IS_CAN_FILTER_ACTIVATION(ACTIVATION) (((ACTIVATION) == CAN_FILTER_DISABLE) || \
+ ((ACTIVATION) == CAN_FILTER_ENABLE))
+#define IS_CAN_FILTER_FIFO(FIFO) (((FIFO) == CAN_FILTER_FIFO0) || \
+ ((FIFO) == CAN_FILTER_FIFO1))
+#define IS_CAN_TX_MAILBOX(TRANSMITMAILBOX) (((TRANSMITMAILBOX) == CAN_TX_MAILBOX0 ) || \
+ ((TRANSMITMAILBOX) == CAN_TX_MAILBOX1 ) || \
+ ((TRANSMITMAILBOX) == CAN_TX_MAILBOX2 ))
+#define IS_CAN_TX_MAILBOX_LIST(TRANSMITMAILBOX) ((TRANSMITMAILBOX) <= (CAN_TX_MAILBOX0 | CAN_TX_MAILBOX1 | CAN_TX_MAILBOX2))
+#define IS_CAN_STDID(STDID) ((STDID) <= 0x7FFU)
+#define IS_CAN_EXTID(EXTID) ((EXTID) <= 0x1FFFFFFFU)
+#define IS_CAN_DLC(DLC) ((DLC) <= 8U)
+#define IS_CAN_IDTYPE(IDTYPE) (((IDTYPE) == CAN_ID_STD) || \
+ ((IDTYPE) == CAN_ID_EXT))
+#define IS_CAN_RTR(RTR) (((RTR) == CAN_RTR_DATA) || ((RTR) == CAN_RTR_REMOTE))
+#define IS_CAN_RX_FIFO(FIFO) (((FIFO) == CAN_RX_FIFO0) || ((FIFO) == CAN_RX_FIFO1))
+#define IS_CAN_IT(IT) ((IT) <= (CAN_IT_TX_MAILBOX_EMPTY | CAN_IT_RX_FIFO0_MSG_PENDING | \
+ CAN_IT_RX_FIFO0_FULL | CAN_IT_RX_FIFO0_OVERRUN | \
+ CAN_IT_RX_FIFO1_MSG_PENDING | CAN_IT_RX_FIFO1_FULL | \
+ CAN_IT_RX_FIFO1_OVERRUN | CAN_IT_WAKEUP | \
+ CAN_IT_SLEEP_ACK | CAN_IT_ERROR_WARNING | \
+ CAN_IT_ERROR_PASSIVE | CAN_IT_BUSOFF | \
+ CAN_IT_LAST_ERROR_CODE | CAN_IT_ERROR))
+
+/**
+ * @}
+ */
+/* End of private macros -----------------------------------------------------*/
+
+/**
+ * @}
+ */
+
+
+#endif /* CAN1 */
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32F4xx_HAL_CAN_H */
+
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Standard_robot/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h b/Standard_robot/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h
index 6ccf250..41903da 100644
--- a/Standard_robot/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h
+++ b/Standard_robot/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h
@@ -124,7 +124,7 @@ typedef struct __SPI_HandleTypeDef
void (*TxISR)(struct __SPI_HandleTypeDef *hspi); /*!< function pointer on Tx ISR */
- DMA_HandleTypeDef *hdmarx; /*!< SPI Tx DMA Handle parameters */
+ DMA_HandleTypeDef *hdmatx; /*!< SPI Tx DMA Handle parameters */
DMA_HandleTypeDef *hdmarx; /*!< SPI Rx DMA Handle parameters */
diff --git a/Standard_robot/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h b/Standard_robot/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h
index b167534..2154a02 100644
--- a/Standard_robot/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h
+++ b/Standard_robot/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h
@@ -156,7 +156,7 @@ typedef struct __UART_HandleTypeDef
__IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */
- DMA_HandleTypeDef *hdmarx; /*!< UART Tx DMA Handle parameters */
+ DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */
DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */
diff --git a/Standard_robot/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_can.c b/Standard_robot/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_can.c
new file mode 100644
index 0000000..009a447
--- /dev/null
+++ b/Standard_robot/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_can.c
@@ -0,0 +1,2464 @@
+/**
+ ******************************************************************************
+ * @file stm32f4xx_hal_can.c
+ * @author MCD Application Team
+ * @brief CAN HAL module driver.
+ * This file provides firmware functions to manage the following
+ * functionalities of the Controller Area Network (CAN) peripheral:
+ * + Initialization and de-initialization functions
+ * + Configuration functions
+ * + Control functions
+ * + Interrupts management
+ * + Callbacks functions
+ * + Peripheral State and Error functions
+ *
+ @verbatim
+ ==============================================================================
+ ##### How to use this driver #####
+ ==============================================================================
+ [..]
+ (#) Initialize the CAN low level resources by implementing the
+ HAL_CAN_MspInit():
+ (++) Enable the CAN interface clock using __HAL_RCC_CANx_CLK_ENABLE()
+ (++) Configure CAN pins
+ (+++) Enable the clock for the CAN GPIOs
+ (+++) Configure CAN pins as alternate function open-drain
+ (++) In case of using interrupts (e.g. HAL_CAN_ActivateNotification())
+ (+++) Configure the CAN interrupt priority using
+ HAL_NVIC_SetPriority()
+ (+++) Enable the CAN IRQ handler using HAL_NVIC_EnableIRQ()
+ (+++) In CAN IRQ handler, call HAL_CAN_IRQHandler()
+
+ (#) Initialize the CAN peripheral using HAL_CAN_Init() function. This
+ function resorts to HAL_CAN_MspInit() for low-level initialization.
+
+ (#) Configure the reception filters using the following configuration
+ functions:
+ (++) HAL_CAN_ConfigFilter()
+
+ (#) Start the CAN module using HAL_CAN_Start() function. At this level
+ the node is active on the bus: it receive messages, and can send
+ messages.
+
+ (#) To manage messages transmission, the following Tx control functions
+ can be used:
+ (++) HAL_CAN_AddTxMessage() to request transmission of a new
+ message.
+ (++) HAL_CAN_AbortTxRequest() to abort transmission of a pending
+ message.
+ (++) HAL_CAN_GetTxMailboxesFreeLevel() to get the number of free Tx
+ mailboxes.
+ (++) HAL_CAN_IsTxMessagePending() to check if a message is pending
+ in a Tx mailbox.
+ (++) HAL_CAN_GetTxTimestamp() to get the timestamp of Tx message
+ sent, if time triggered communication mode is enabled.
+
+ (#) When a message is received into the CAN Rx FIFOs, it can be retrieved
+ using the HAL_CAN_GetRxMessage() function. The function
+ HAL_CAN_GetRxFifoFillLevel() allows to know how many Rx message are
+ stored in the Rx Fifo.
+
+ (#) Calling the HAL_CAN_Stop() function stops the CAN module.
+
+ (#) The deinitialization is achieved with HAL_CAN_DeInit() function.
+
+
+ *** Polling mode operation ***
+ ==============================
+ [..]
+ (#) Reception:
+ (++) Monitor reception of message using HAL_CAN_GetRxFifoFillLevel()
+ until at least one message is received.
+ (++) Then get the message using HAL_CAN_GetRxMessage().
+
+ (#) Transmission:
+ (++) Monitor the Tx mailboxes availability until at least one Tx
+ mailbox is free, using HAL_CAN_GetTxMailboxesFreeLevel().
+ (++) Then request transmission of a message using
+ HAL_CAN_AddTxMessage().
+
+
+ *** Interrupt mode operation ***
+ ================================
+ [..]
+ (#) Notifications are activated using HAL_CAN_ActivateNotification()
+ function. Then, the process can be controlled through the
+ available user callbacks: HAL_CAN_xxxCallback(), using same APIs
+ HAL_CAN_GetRxMessage() and HAL_CAN_AddTxMessage().
+
+ (#) Notifications can be deactivated using
+ HAL_CAN_DeactivateNotification() function.
+
+ (#) Special care should be taken for CAN_IT_RX_FIFO0_MSG_PENDING and
+ CAN_IT_RX_FIFO1_MSG_PENDING notifications. These notifications trig
+ the callbacks HAL_CAN_RxFIFO0MsgPendingCallback() and
+ HAL_CAN_RxFIFO1MsgPendingCallback(). User has two possible options
+ here.
+ (++) Directly get the Rx message in the callback, using
+ HAL_CAN_GetRxMessage().
+ (++) Or deactivate the notification in the callback without
+ getting the Rx message. The Rx message can then be got later
+ using HAL_CAN_GetRxMessage(). Once the Rx message have been
+ read, the notification can be activated again.
+
+
+ *** Sleep mode ***
+ ==================
+ [..]
+ (#) The CAN peripheral can be put in sleep mode (low power), using
+ HAL_CAN_RequestSleep(). The sleep mode will be entered as soon as the
+ current CAN activity (transmission or reception of a CAN frame) will
+ be completed.
+
+ (#) A notification can be activated to be informed when the sleep mode
+ will be entered.
+
+ (#) It can be checked if the sleep mode is entered using
+ HAL_CAN_IsSleepActive().
+ Note that the CAN state (accessible from the API HAL_CAN_GetState())
+ is HAL_CAN_STATE_SLEEP_PENDING as soon as the sleep mode request is
+ submitted (the sleep mode is not yet entered), and become
+ HAL_CAN_STATE_SLEEP_ACTIVE when the sleep mode is effective.
+
+ (#) The wake-up from sleep mode can be trigged by two ways:
+ (++) Using HAL_CAN_WakeUp(). When returning from this function,
+ the sleep mode is exited (if return status is HAL_OK).
+ (++) When a start of Rx CAN frame is detected by the CAN peripheral,
+ if automatic wake up mode is enabled.
+
+ *** Callback registration ***
+ =============================================
+
+ The compilation define USE_HAL_CAN_REGISTER_CALLBACKS when set to 1
+ allows the user to configure dynamically the driver callbacks.
+ Use Function @ref HAL_CAN_RegisterCallback() to register an interrupt callback.
+
+ Function @ref HAL_CAN_RegisterCallback() allows to register following callbacks:
+ (+) TxMailbox0CompleteCallback : Tx Mailbox 0 Complete Callback.
+ (+) TxMailbox1CompleteCallback : Tx Mailbox 1 Complete Callback.
+ (+) TxMailbox2CompleteCallback : Tx Mailbox 2 Complete Callback.
+ (+) TxMailbox0AbortCallback : Tx Mailbox 0 Abort Callback.
+ (+) TxMailbox1AbortCallback : Tx Mailbox 1 Abort Callback.
+ (+) TxMailbox2AbortCallback : Tx Mailbox 2 Abort Callback.
+ (+) RxFifo0MsgPendingCallback : Rx Fifo 0 Message Pending Callback.
+ (+) RxFifo0FullCallback : Rx Fifo 0 Full Callback.
+ (+) RxFifo1MsgPendingCallback : Rx Fifo 1 Message Pending Callback.
+ (+) RxFifo1FullCallback : Rx Fifo 1 Full Callback.
+ (+) SleepCallback : Sleep Callback.
+ (+) WakeUpFromRxMsgCallback : Wake Up From Rx Message Callback.
+ (+) ErrorCallback : Error Callback.
+ (+) MspInitCallback : CAN MspInit.
+ (+) MspDeInitCallback : CAN MspDeInit.
+ This function takes as parameters the HAL peripheral handle, the Callback ID
+ and a pointer to the user callback function.
+
+ Use function @ref HAL_CAN_UnRegisterCallback() to reset a callback to the default
+ weak function.
+ @ref HAL_CAN_UnRegisterCallback takes as parameters the HAL peripheral handle,
+ and the Callback ID.
+ This function allows to reset following callbacks:
+ (+) TxMailbox0CompleteCallback : Tx Mailbox 0 Complete Callback.
+ (+) TxMailbox1CompleteCallback : Tx Mailbox 1 Complete Callback.
+ (+) TxMailbox2CompleteCallback : Tx Mailbox 2 Complete Callback.
+ (+) TxMailbox0AbortCallback : Tx Mailbox 0 Abort Callback.
+ (+) TxMailbox1AbortCallback : Tx Mailbox 1 Abort Callback.
+ (+) TxMailbox2AbortCallback : Tx Mailbox 2 Abort Callback.
+ (+) RxFifo0MsgPendingCallback : Rx Fifo 0 Message Pending Callback.
+ (+) RxFifo0FullCallback : Rx Fifo 0 Full Callback.
+ (+) RxFifo1MsgPendingCallback : Rx Fifo 1 Message Pending Callback.
+ (+) RxFifo1FullCallback : Rx Fifo 1 Full Callback.
+ (+) SleepCallback : Sleep Callback.
+ (+) WakeUpFromRxMsgCallback : Wake Up From Rx Message Callback.
+ (+) ErrorCallback : Error Callback.
+ (+) MspInitCallback : CAN MspInit.
+ (+) MspDeInitCallback : CAN MspDeInit.
+
+ By default, after the @ref HAL_CAN_Init() and when the state is HAL_CAN_STATE_RESET,
+ all callbacks are set to the corresponding weak functions:
+ example @ref HAL_CAN_ErrorCallback().
+ Exception done for MspInit and MspDeInit functions that are
+ reset to the legacy weak function in the @ref HAL_CAN_Init()/ @ref HAL_CAN_DeInit() only when
+ these callbacks are null (not registered beforehand).
+ if not, MspInit or MspDeInit are not null, the @ref HAL_CAN_Init()/ @ref HAL_CAN_DeInit()
+ keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
+
+ Callbacks can be registered/unregistered in HAL_CAN_STATE_READY state only.
+ Exception done MspInit/MspDeInit that can be registered/unregistered
+ in HAL_CAN_STATE_READY or HAL_CAN_STATE_RESET state,
+ thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
+ In that case first register the MspInit/MspDeInit user callbacks
+ using @ref HAL_CAN_RegisterCallback() before calling @ref HAL_CAN_DeInit()
+ or @ref HAL_CAN_Init() function.
+
+ When The compilation define USE_HAL_CAN_REGISTER_CALLBACKS is set to 0 or
+ not defined, the callback registration feature is not available and all callbacks
+ are set to the corresponding weak functions.
+
+ @endverbatim
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>© Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f4xx_hal.h"
+
+/** @addtogroup STM32F4xx_HAL_Driver
+ * @{
+ */
+
+#if defined(CAN1)
+
+/** @defgroup CAN CAN
+ * @brief CAN driver modules
+ * @{
+ */
+
+#ifdef HAL_CAN_MODULE_ENABLED
+
+#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
+ #error "The CAN driver cannot be used with its legacy, Please enable only one CAN module at once"
+#endif
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/** @defgroup CAN_Private_Constants CAN Private Constants
+ * @{
+ */
+#define CAN_TIMEOUT_VALUE 10U
+/**
+ * @}
+ */
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+/* Exported functions --------------------------------------------------------*/
+
+/** @defgroup CAN_Exported_Functions CAN Exported Functions
+ * @{
+ */
+
+/** @defgroup CAN_Exported_Functions_Group1 Initialization and de-initialization functions
+ * @brief Initialization and Configuration functions
+ *
+@verbatim
+ ==============================================================================
+ ##### Initialization and de-initialization functions #####
+ ==============================================================================
+ [..] This section provides functions allowing to:
+ (+) HAL_CAN_Init : Initialize and configure the CAN.
+ (+) HAL_CAN_DeInit : De-initialize the CAN.
+ (+) HAL_CAN_MspInit : Initialize the CAN MSP.
+ (+) HAL_CAN_MspDeInit : DeInitialize the CAN MSP.
+
+@endverbatim
+ * @{
+ */
+
+/**
+ * @brief Initializes the CAN peripheral according to the specified
+ * parameters in the CAN_InitStruct.
+ * @param hcan pointer to a CAN_HandleTypeDef structure that contains
+ * the configuration information for the specified CAN.
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef *hcan)
+{
+ uint32_t tickstart;
+
+ /* Check CAN handle */
+ if (hcan == NULL)
+ {
+ return HAL_ERROR;
+ }
+
+ /* Check the parameters */
+ assert_param(IS_CAN_ALL_INSTANCE(hcan->Instance));
+ assert_param(IS_FUNCTIONAL_STATE(hcan->Init.TimeTriggeredMode));
+ assert_param(IS_FUNCTIONAL_STATE(hcan->Init.AutoBusOff));
+ assert_param(IS_FUNCTIONAL_STATE(hcan->Init.AutoWakeUp));
+ assert_param(IS_FUNCTIONAL_STATE(hcan->Init.AutoRetransmission));
+ assert_param(IS_FUNCTIONAL_STATE(hcan->Init.ReceiveFifoLocked));
+ assert_param(IS_FUNCTIONAL_STATE(hcan->Init.TransmitFifoPriority));
+ assert_param(IS_CAN_MODE(hcan->Init.Mode));
+ assert_param(IS_CAN_SJW(hcan->Init.SyncJumpWidth));
+ assert_param(IS_CAN_BS1(hcan->Init.TimeSeg1));
+ assert_param(IS_CAN_BS2(hcan->Init.TimeSeg2));
+ assert_param(IS_CAN_PRESCALER(hcan->Init.Prescaler));
+
+#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
+ if (hcan->State == HAL_CAN_STATE_RESET)
+ {
+ /* Reset callbacks to legacy functions */
+ hcan->RxFifo0MsgPendingCallback = HAL_CAN_RxFifo0MsgPendingCallback; /* Legacy weak RxFifo0MsgPendingCallback */
+ hcan->RxFifo0FullCallback = HAL_CAN_RxFifo0FullCallback; /* Legacy weak RxFifo0FullCallback */
+ hcan->RxFifo1MsgPendingCallback = HAL_CAN_RxFifo1MsgPendingCallback; /* Legacy weak RxFifo1MsgPendingCallback */
+ hcan->RxFifo1FullCallback = HAL_CAN_RxFifo1FullCallback; /* Legacy weak RxFifo1FullCallback */
+ hcan->TxMailbox0CompleteCallback = HAL_CAN_TxMailbox0CompleteCallback; /* Legacy weak TxMailbox0CompleteCallback */
+ hcan->TxMailbox1CompleteCallback = HAL_CAN_TxMailbox1CompleteCallback; /* Legacy weak TxMailbox1CompleteCallback */
+ hcan->TxMailbox2CompleteCallback = HAL_CAN_TxMailbox2CompleteCallback; /* Legacy weak TxMailbox2CompleteCallback */
+ hcan->TxMailbox0AbortCallback = HAL_CAN_TxMailbox0AbortCallback; /* Legacy weak TxMailbox0AbortCallback */
+ hcan->TxMailbox1AbortCallback = HAL_CAN_TxMailbox1AbortCallback; /* Legacy weak TxMailbox1AbortCallback */
+ hcan->TxMailbox2AbortCallback = HAL_CAN_TxMailbox2AbortCallback; /* Legacy weak TxMailbox2AbortCallback */
+ hcan->SleepCallback = HAL_CAN_SleepCallback; /* Legacy weak SleepCallback */
+ hcan->WakeUpFromRxMsgCallback = HAL_CAN_WakeUpFromRxMsgCallback; /* Legacy weak WakeUpFromRxMsgCallback */
+ hcan->ErrorCallback = HAL_CAN_ErrorCallback; /* Legacy weak ErrorCallback */
+
+ if (hcan->MspInitCallback == NULL)
+ {
+ hcan->MspInitCallback = HAL_CAN_MspInit; /* Legacy weak MspInit */
+ }
+
+ /* Init the low level hardware: CLOCK, NVIC */
+ hcan->MspInitCallback(hcan);
+ }
+
+#else
+ if (hcan->State == HAL_CAN_STATE_RESET)
+ {
+ /* Init the low level hardware: CLOCK, NVIC */
+ HAL_CAN_MspInit(hcan);
+ }
+#endif /* (USE_HAL_CAN_REGISTER_CALLBACKS) */
+
+ /* Exit from sleep mode */
+ CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP);
+
+ /* Get tick */
+ tickstart = HAL_GetTick();
+
+ /* Check Sleep mode leave acknowledge */
+ while ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U)
+ {
+ if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE)
+ {
+ /* Update error code */
+ hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT;
+
+ /* Change CAN state */
+ hcan->State = HAL_CAN_STATE_ERROR;
+
+ return HAL_ERROR;
+ }
+ }
+
+ /* Request initialisation */
+ SET_BIT(hcan->Instance->MCR, CAN_MCR_INRQ);
+
+ /* Get tick */
+ tickstart = HAL_GetTick();
+
+ /* Wait initialisation acknowledge */
+ while ((hcan->Instance->MSR & CAN_MSR_INAK) == 0U)
+ {
+ if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE)
+ {
+ /* Update error code */
+ hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT;
+
+ /* Change CAN state */
+ hcan->State = HAL_CAN_STATE_ERROR;
+
+ return HAL_ERROR;
+ }
+ }
+
+ /* Set the time triggered communication mode */
+ if (hcan->Init.TimeTriggeredMode == ENABLE)
+ {
+ SET_BIT(hcan->Instance->MCR, CAN_MCR_TTCM);
+ }
+ else
+ {
+ CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_TTCM);
+ }
+
+ /* Set the automatic bus-off management */
+ if (hcan->Init.AutoBusOff == ENABLE)
+ {
+ SET_BIT(hcan->Instance->MCR, CAN_MCR_ABOM);
+ }
+ else
+ {
+ CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_ABOM);
+ }
+
+ /* Set the automatic wake-up mode */
+ if (hcan->Init.AutoWakeUp == ENABLE)
+ {
+ SET_BIT(hcan->Instance->MCR, CAN_MCR_AWUM);
+ }
+ else
+ {
+ CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_AWUM);
+ }
+
+ /* Set the automatic retransmission */
+ if (hcan->Init.AutoRetransmission == ENABLE)
+ {
+ CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_NART);
+ }
+ else
+ {
+ SET_BIT(hcan->Instance->MCR, CAN_MCR_NART);
+ }
+
+ /* Set the receive FIFO locked mode */
+ if (hcan->Init.ReceiveFifoLocked == ENABLE)
+ {
+ SET_BIT(hcan->Instance->MCR, CAN_MCR_RFLM);
+ }
+ else
+ {
+ CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_RFLM);
+ }
+
+ /* Set the transmit FIFO priority */
+ if (hcan->Init.TransmitFifoPriority == ENABLE)
+ {
+ SET_BIT(hcan->Instance->MCR, CAN_MCR_TXFP);
+ }
+ else
+ {
+ CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_TXFP);
+ }
+
+ /* Set the bit timing register */
+ WRITE_REG(hcan->Instance->BTR, (uint32_t)(hcan->Init.Mode |
+ hcan->Init.SyncJumpWidth |
+ hcan->Init.TimeSeg1 |
+ hcan->Init.TimeSeg2 |
+ (hcan->Init.Prescaler - 1U)));
+
+ /* Initialize the error code */
+ hcan->ErrorCode = HAL_CAN_ERROR_NONE;
+
+ /* Initialize the CAN state */
+ hcan->State = HAL_CAN_STATE_READY;
+
+ /* Return function status */
+ return HAL_OK;
+}
+
+/**
+ * @brief Deinitializes the CAN peripheral registers to their default
+ * reset values.
+ * @param hcan pointer to a CAN_HandleTypeDef structure that contains
+ * the configuration information for the specified CAN.
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef *hcan)
+{
+ /* Check CAN handle */
+ if (hcan == NULL)
+ {
+ return HAL_ERROR;
+ }
+
+ /* Check the parameters */
+ assert_param(IS_CAN_ALL_INSTANCE(hcan->Instance));
+
+ /* Stop the CAN module */
+ (void)HAL_CAN_Stop(hcan);
+
+#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
+ if (hcan->MspDeInitCallback == NULL)
+ {
+ hcan->MspDeInitCallback = HAL_CAN_MspDeInit; /* Legacy weak MspDeInit */
+ }
+
+ /* DeInit the low level hardware: CLOCK, NVIC */
+ hcan->MspDeInitCallback(hcan);
+
+#else
+ /* DeInit the low level hardware: CLOCK, NVIC */
+ HAL_CAN_MspDeInit(hcan);
+#endif /* (USE_HAL_CAN_REGISTER_CALLBACKS) */
+
+ /* Reset the CAN peripheral */
+ SET_BIT(hcan->Instance->MCR, CAN_MCR_RESET);
+
+ /* Reset the CAN ErrorCode */
+ hcan->ErrorCode = HAL_CAN_ERROR_NONE;
+
+ /* Change CAN state */
+ hcan->State = HAL_CAN_STATE_RESET;
+
+ /* Return function status */
+ return HAL_OK;
+}
+
+/**
+ * @brief Initializes the CAN MSP.
+ * @param hcan pointer to a CAN_HandleTypeDef structure that contains
+ * the configuration information for the specified CAN.
+ * @retval None
+ */
+__weak void HAL_CAN_MspInit(CAN_HandleTypeDef *hcan)
+{
+ /* Prevent unused argument(s) compilation warning */
+ UNUSED(hcan);
+
+ /* NOTE : This function Should not be modified, when the callback is needed,
+ the HAL_CAN_MspInit could be implemented in the user file
+ */
+}
+
+/**
+ * @brief DeInitializes the CAN MSP.
+ * @param hcan pointer to a CAN_HandleTypeDef structure that contains
+ * the configuration information for the specified CAN.
+ * @retval None
+ */
+__weak void HAL_CAN_MspDeInit(CAN_HandleTypeDef *hcan)
+{
+ /* Prevent unused argument(s) compilation warning */
+ UNUSED(hcan);
+
+ /* NOTE : This function Should not be modified, when the callback is needed,
+ the HAL_CAN_MspDeInit could be implemented in the user file
+ */
+}
+
+#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
+/**
+ * @brief Register a CAN CallBack.
+ * To be used instead of the weak predefined callback
+ * @param hcan pointer to a CAN_HandleTypeDef structure that contains
+ * the configuration information for CAN module
+ * @param CallbackID ID of the callback to be registered
+ * This parameter can be one of the following values:
+ * @arg @ref HAL_CAN_TX_MAILBOX0_COMPLETE_CALLBACK_CB_ID Tx Mailbox 0 Complete callback ID
+ * @arg @ref HAL_CAN_TX_MAILBOX1_COMPLETE_CALLBACK_CB_ID Tx Mailbox 1 Complete callback ID
+ * @arg @ref HAL_CAN_TX_MAILBOX2_COMPLETE_CALLBACK_CB_ID Tx Mailbox 2 Complete callback ID
+ * @arg @ref HAL_CAN_TX_MAILBOX0_ABORT_CALLBACK_CB_ID Tx Mailbox 0 Abort callback ID
+ * @arg @ref HAL_CAN_TX_MAILBOX1_ABORT_CALLBACK_CB_ID Tx Mailbox 1 Abort callback ID
+ * @arg @ref HAL_CAN_TX_MAILBOX2_ABORT_CALLBACK_CB_ID Tx Mailbox 2 Abort callback ID
+ * @arg @ref HAL_CAN_RX_FIFO0_MSG_PENDING_CALLBACK_CB_ID Rx Fifo 0 message pending callback ID
+ * @arg @ref HAL_CAN_RX_FIFO0_FULL_CALLBACK_CB_ID Rx Fifo 0 full callback ID
+ * @arg @ref HAL_CAN_RX_FIFO1_MSGPENDING_CALLBACK_CB_ID Rx Fifo 1 message pending callback ID
+ * @arg @ref HAL_CAN_RX_FIFO1_FULL_CALLBACK_CB_ID Rx Fifo 1 full callback ID
+ * @arg @ref HAL_CAN_SLEEP_CALLBACK_CB_ID Sleep callback ID
+ * @arg @ref HAL_CAN_WAKEUP_FROM_RX_MSG_CALLBACK_CB_ID Wake Up from Rx message callback ID
+ * @arg @ref HAL_CAN_ERROR_CALLBACK_CB_ID Error callback ID
+ * @arg @ref HAL_CAN_MSPINIT_CB_ID MspInit callback ID
+ * @arg @ref HAL_CAN_MSPDEINIT_CB_ID MspDeInit callback ID
+ * @param pCallback pointer to the Callback function
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_CAN_RegisterCallback(CAN_HandleTypeDef *hcan, HAL_CAN_CallbackIDTypeDef CallbackID, void (* pCallback)(CAN_HandleTypeDef *_hcan))
+{
+ HAL_StatusTypeDef status = HAL_OK;
+
+ if (pCallback == NULL)
+ {
+ /* Update the error code */
+ hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK;
+
+ return HAL_ERROR;
+ }
+
+ if (hcan->State == HAL_CAN_STATE_READY)
+ {
+ switch (CallbackID)
+ {
+ case HAL_CAN_TX_MAILBOX0_COMPLETE_CB_ID :
+ hcan->TxMailbox0CompleteCallback = pCallback;
+ break;
+
+ case HAL_CAN_TX_MAILBOX1_COMPLETE_CB_ID :
+ hcan->TxMailbox1CompleteCallback = pCallback;
+ break;
+
+ case HAL_CAN_TX_MAILBOX2_COMPLETE_CB_ID :
+ hcan->TxMailbox2CompleteCallback = pCallback;
+ break;
+
+ case HAL_CAN_TX_MAILBOX0_ABORT_CB_ID :
+ hcan->TxMailbox0AbortCallback = pCallback;
+ break;
+
+ case HAL_CAN_TX_MAILBOX1_ABORT_CB_ID :
+ hcan->TxMailbox1AbortCallback = pCallback;
+ break;
+
+ case HAL_CAN_TX_MAILBOX2_ABORT_CB_ID :
+ hcan->TxMailbox2AbortCallback = pCallback;
+ break;
+
+ case HAL_CAN_RX_FIFO0_MSG_PENDING_CB_ID :
+ hcan->RxFifo0MsgPendingCallback = pCallback;
+ break;
+
+ case HAL_CAN_RX_FIFO0_FULL_CB_ID :
+ hcan->RxFifo0FullCallback = pCallback;
+ break;
+
+ case HAL_CAN_RX_FIFO1_MSG_PENDING_CB_ID :
+ hcan->RxFifo1MsgPendingCallback = pCallback;
+ break;
+
+ case HAL_CAN_RX_FIFO1_FULL_CB_ID :
+ hcan->RxFifo1FullCallback = pCallback;
+ break;
+
+ case HAL_CAN_SLEEP_CB_ID :
+ hcan->SleepCallback = pCallback;
+ break;
+
+ case HAL_CAN_WAKEUP_FROM_RX_MSG_CB_ID :
+ hcan->WakeUpFromRxMsgCallback = pCallback;
+ break;
+
+ case HAL_CAN_ERROR_CB_ID :
+ hcan->ErrorCallback = pCallback;
+ break;
+
+ case HAL_CAN_MSPINIT_CB_ID :
+ hcan->MspInitCallback = pCallback;
+ break;
+
+ case HAL_CAN_MSPDEINIT_CB_ID :
+ hcan->MspDeInitCallback = pCallback;
+ break;
+
+ default :
+ /* Update the error code */
+ hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK;
+
+ /* Return error status */
+ status = HAL_ERROR;
+ break;
+ }
+ }
+ else if (hcan->State == HAL_CAN_STATE_RESET)
+ {
+ switch (CallbackID)
+ {
+ case HAL_CAN_MSPINIT_CB_ID :
+ hcan->MspInitCallback = pCallback;
+ break;
+
+ case HAL_CAN_MSPDEINIT_CB_ID :
+ hcan->MspDeInitCallback = pCallback;
+ break;
+
+ default :
+ /* Update the error code */
+ hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK;
+
+ /* Return error status */
+ status = HAL_ERROR;
+ break;
+ }
+ }
+ else
+ {
+ /* Update the error code */
+ hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK;
+
+ /* Return error status */
+ status = HAL_ERROR;
+ }
+
+ return status;
+}
+
+/**
+ * @brief Unregister a CAN CallBack.
+ * CAN callabck is redirected to the weak predefined callback
+ * @param hcan pointer to a CAN_HandleTypeDef structure that contains
+ * the configuration information for CAN module
+ * @param CallbackID ID of the callback to be unregistered
+ * This parameter can be one of the following values:
+ * @arg @ref HAL_CAN_TX_MAILBOX0_COMPLETE_CALLBACK_CB_ID Tx Mailbox 0 Complete callback ID
+ * @arg @ref HAL_CAN_TX_MAILBOX1_COMPLETE_CALLBACK_CB_ID Tx Mailbox 1 Complete callback ID
+ * @arg @ref HAL_CAN_TX_MAILBOX2_COMPLETE_CALLBACK_CB_ID Tx Mailbox 2 Complete callback ID
+ * @arg @ref HAL_CAN_TX_MAILBOX0_ABORT_CALLBACK_CB_ID Tx Mailbox 0 Abort callback ID
+ * @arg @ref HAL_CAN_TX_MAILBOX1_ABORT_CALLBACK_CB_ID Tx Mailbox 1 Abort callback ID
+ * @arg @ref HAL_CAN_TX_MAILBOX2_ABORT_CALLBACK_CB_ID Tx Mailbox 2 Abort callback ID
+ * @arg @ref HAL_CAN_RX_FIFO0_MSG_PENDING_CALLBACK_CB_ID Rx Fifo 0 message pending callback ID
+ * @arg @ref HAL_CAN_RX_FIFO0_FULL_CALLBACK_CB_ID Rx Fifo 0 full callback ID
+ * @arg @ref HAL_CAN_RX_FIFO1_MSGPENDING_CALLBACK_CB_ID Rx Fifo 1 message pending callback ID
+ * @arg @ref HAL_CAN_RX_FIFO1_FULL_CALLBACK_CB_ID Rx Fifo 1 full callback ID
+ * @arg @ref HAL_CAN_SLEEP_CALLBACK_CB_ID Sleep callback ID
+ * @arg @ref HAL_CAN_WAKEUP_FROM_RX_MSG_CALLBACK_CB_ID Wake Up from Rx message callback ID
+ * @arg @ref HAL_CAN_ERROR_CALLBACK_CB_ID Error callback ID
+ * @arg @ref HAL_CAN_MSPINIT_CB_ID MspInit callback ID
+ * @arg @ref HAL_CAN_MSPDEINIT_CB_ID MspDeInit callback ID
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_CAN_UnRegisterCallback(CAN_HandleTypeDef *hcan, HAL_CAN_CallbackIDTypeDef CallbackID)
+{
+ HAL_StatusTypeDef status = HAL_OK;
+
+ if (hcan->State == HAL_CAN_STATE_READY)
+ {
+ switch (CallbackID)
+ {
+ case HAL_CAN_TX_MAILBOX0_COMPLETE_CB_ID :
+ hcan->TxMailbox0CompleteCallback = HAL_CAN_TxMailbox0CompleteCallback;
+ break;
+
+ case HAL_CAN_TX_MAILBOX1_COMPLETE_CB_ID :
+ hcan->TxMailbox1CompleteCallback = HAL_CAN_TxMailbox1CompleteCallback;
+ break;
+
+ case HAL_CAN_TX_MAILBOX2_COMPLETE_CB_ID :
+ hcan->TxMailbox2CompleteCallback = HAL_CAN_TxMailbox2CompleteCallback;
+ break;
+
+ case HAL_CAN_TX_MAILBOX0_ABORT_CB_ID :
+ hcan->TxMailbox0AbortCallback = HAL_CAN_TxMailbox0AbortCallback;
+ break;
+
+ case HAL_CAN_TX_MAILBOX1_ABORT_CB_ID :
+ hcan->TxMailbox1AbortCallback = HAL_CAN_TxMailbox1AbortCallback;
+ break;
+
+ case HAL_CAN_TX_MAILBOX2_ABORT_CB_ID :
+ hcan->TxMailbox2AbortCallback = HAL_CAN_TxMailbox2AbortCallback;
+ break;
+
+ case HAL_CAN_RX_FIFO0_MSG_PENDING_CB_ID :
+ hcan->RxFifo0MsgPendingCallback = HAL_CAN_RxFifo0MsgPendingCallback;
+ break;
+
+ case HAL_CAN_RX_FIFO0_FULL_CB_ID :
+ hcan->RxFifo0FullCallback = HAL_CAN_RxFifo0FullCallback;
+ break;
+
+ case HAL_CAN_RX_FIFO1_MSG_PENDING_CB_ID :
+ hcan->RxFifo1MsgPendingCallback = HAL_CAN_RxFifo1MsgPendingCallback;
+ break;
+
+ case HAL_CAN_RX_FIFO1_FULL_CB_ID :
+ hcan->RxFifo1FullCallback = HAL_CAN_RxFifo1FullCallback;
+ break;
+
+ case HAL_CAN_SLEEP_CB_ID :
+ hcan->SleepCallback = HAL_CAN_SleepCallback;
+ break;
+
+ case HAL_CAN_WAKEUP_FROM_RX_MSG_CB_ID :
+ hcan->WakeUpFromRxMsgCallback = HAL_CAN_WakeUpFromRxMsgCallback;
+ break;
+
+ case HAL_CAN_ERROR_CB_ID :
+ hcan->ErrorCallback = HAL_CAN_ErrorCallback;
+ break;
+
+ case HAL_CAN_MSPINIT_CB_ID :
+ hcan->MspInitCallback = HAL_CAN_MspInit;
+ break;
+
+ case HAL_CAN_MSPDEINIT_CB_ID :
+ hcan->MspDeInitCallback = HAL_CAN_MspDeInit;
+ break;
+
+ default :
+ /* Update the error code */
+ hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK;
+
+ /* Return error status */
+ status = HAL_ERROR;
+ break;
+ }
+ }
+ else if (hcan->State == HAL_CAN_STATE_RESET)
+ {
+ switch (CallbackID)
+ {
+ case HAL_CAN_MSPINIT_CB_ID :
+ hcan->MspInitCallback = HAL_CAN_MspInit;
+ break;
+
+ case HAL_CAN_MSPDEINIT_CB_ID :
+ hcan->MspDeInitCallback = HAL_CAN_MspDeInit;
+ break;
+
+ default :
+ /* Update the error code */
+ hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK;
+
+ /* Return error status */
+ status = HAL_ERROR;
+ break;
+ }
+ }
+ else
+ {
+ /* Update the error code */
+ hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK;
+
+ /* Return error status */
+ status = HAL_ERROR;
+ }
+
+ return status;
+}
+#endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
+
+/**
+ * @}
+ */
+
+/** @defgroup CAN_Exported_Functions_Group2 Configuration functions
+ * @brief Configuration functions.
+ *
+@verbatim
+ ==============================================================================
+ ##### Configuration functions #####
+ ==============================================================================
+ [..] This section provides functions allowing to:
+ (+) HAL_CAN_ConfigFilter : Configure the CAN reception filters
+
+@endverbatim
+ * @{
+ */
+
+/**
+ * @brief Configures the CAN reception filter according to the specified
+ * parameters in the CAN_FilterInitStruct.
+ * @param hcan pointer to a CAN_HandleTypeDef structure that contains
+ * the configuration information for the specified CAN.
+ * @param sFilterConfig pointer to a CAN_FilterTypeDef structure that
+ * contains the filter configuration information.
+ * @retval None
+ */
+HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef *hcan, CAN_FilterTypeDef *sFilterConfig)
+{
+ uint32_t filternbrbitpos;
+ CAN_TypeDef *can_ip = hcan->Instance;
+ HAL_CAN_StateTypeDef state = hcan->State;
+
+ if ((state == HAL_CAN_STATE_READY) ||
+ (state == HAL_CAN_STATE_LISTENING))
+ {
+ /* Check the parameters */
+ assert_param(IS_CAN_FILTER_ID_HALFWORD(sFilterConfig->FilterIdHigh));
+ assert_param(IS_CAN_FILTER_ID_HALFWORD(sFilterConfig->FilterIdLow));
+ assert_param(IS_CAN_FILTER_ID_HALFWORD(sFilterConfig->FilterMaskIdHigh));
+ assert_param(IS_CAN_FILTER_ID_HALFWORD(sFilterConfig->FilterMaskIdLow));
+ assert_param(IS_CAN_FILTER_MODE(sFilterConfig->FilterMode));
+ assert_param(IS_CAN_FILTER_SCALE(sFilterConfig->FilterScale));
+ assert_param(IS_CAN_FILTER_FIFO(sFilterConfig->FilterFIFOAssignment));
+ assert_param(IS_CAN_FILTER_ACTIVATION(sFilterConfig->FilterActivation));
+
+#if defined(CAN3)
+ /* Check the CAN instance */
+ if (hcan->Instance == CAN3)
+ {
+ /* CAN3 is single instance with 14 dedicated filters banks */
+
+ /* Check the parameters */
+ assert_param(IS_CAN_FILTER_BANK_SINGLE(sFilterConfig->FilterBank));
+ }
+ else
+ {
+ /* CAN1 and CAN2 are dual instances with 28 common filters banks */
+ /* Select master instance to access the filter banks */
+ can_ip = CAN1;
+
+ /* Check the parameters */
+ assert_param(IS_CAN_FILTER_BANK_DUAL(sFilterConfig->FilterBank));
+ assert_param(IS_CAN_FILTER_BANK_DUAL(sFilterConfig->SlaveStartFilterBank));
+ }
+#elif defined(CAN2)
+ /* CAN1 and CAN2 are dual instances with 28 common filters banks */
+ /* Select master instance to access the filter banks */
+ can_ip = CAN1;
+
+ /* Check the parameters */
+ assert_param(IS_CAN_FILTER_BANK_DUAL(sFilterConfig->FilterBank));
+ assert_param(IS_CAN_FILTER_BANK_DUAL(sFilterConfig->SlaveStartFilterBank));
+#else
+ /* CAN1 is single instance with 14 dedicated filters banks */
+
+ /* Check the parameters */
+ assert_param(IS_CAN_FILTER_BANK_SINGLE(sFilterConfig->FilterBank));
+#endif
+
+ /* Initialisation mode for the filter */
+ SET_BIT(can_ip->FMR, CAN_FMR_FINIT);
+
+#if defined(CAN3)
+ /* Check the CAN instance */
+ if (can_ip == CAN1)
+ {
+ /* Select the start filter number of CAN2 slave instance */
+ CLEAR_BIT(can_ip->FMR, CAN_FMR_CAN2SB);
+ SET_BIT(can_ip->FMR, sFilterConfig->SlaveStartFilterBank << CAN_FMR_CAN2SB_Pos);
+ }
+
+#elif defined(CAN2)
+ /* Select the start filter number of CAN2 slave instance */
+ CLEAR_BIT(can_ip->FMR, CAN_FMR_CAN2SB);
+ SET_BIT(can_ip->FMR, sFilterConfig->SlaveStartFilterBank << CAN_FMR_CAN2SB_Pos);
+
+#endif
+ /* Convert filter number into bit position */
+ filternbrbitpos = (uint32_t)1 << (sFilterConfig->FilterBank & 0x1FU);
+
+ /* Filter Deactivation */
+ CLEAR_BIT(can_ip->FA1R, filternbrbitpos);
+
+ /* Filter Scale */
+ if (sFilterConfig->FilterScale == CAN_FILTERSCALE_16BIT)
+ {
+ /* 16-bit scale for the filter */
+ CLEAR_BIT(can_ip->FS1R, filternbrbitpos);
+
+ /* First 16-bit identifier and First 16-bit mask */
+ /* Or First 16-bit identifier and Second 16-bit identifier */
+ can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 =
+ ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow) << 16U) |
+ (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdLow);
+
+ /* Second 16-bit identifier and Second 16-bit mask */
+ /* Or Third 16-bit identifier and Fourth 16-bit identifier */
+ can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 =
+ ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) |
+ (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh);
+ }
+
+ if (sFilterConfig->FilterScale == CAN_FILTERSCALE_32BIT)
+ {
+ /* 32-bit scale for the filter */
+ SET_BIT(can_ip->FS1R, filternbrbitpos);
+
+ /* 32-bit identifier or First 32-bit identifier */
+ can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 =
+ ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh) << 16U) |
+ (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdLow);
+
+ /* 32-bit mask or Second 32-bit identifier */
+ can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 =
+ ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) |
+ (0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow);
+ }
+
+ /* Filter Mode */
+ if (sFilterConfig->FilterMode == CAN_FILTERMODE_IDMASK)
+ {
+ /* Id/Mask mode for the filter*/
+ CLEAR_BIT(can_ip->FM1R, filternbrbitpos);
+ }
+ else /* CAN_FilterInitStruct->CAN_FilterMode == CAN_FilterMode_IdList */
+ {
+ /* Identifier list mode for the filter*/
+ SET_BIT(can_ip->FM1R, filternbrbitpos);
+ }
+
+ /* Filter FIFO assignment */
+ if (sFilterConfig->FilterFIFOAssignment == CAN_FILTER_FIFO0)
+ {
+ /* FIFO 0 assignation for the filter */
+ CLEAR_BIT(can_ip->FFA1R, filternbrbitpos);
+ }
+ else
+ {
+ /* FIFO 1 assignation for the filter */
+ SET_BIT(can_ip->FFA1R, filternbrbitpos);
+ }
+
+ /* Filter activation */
+ if (sFilterConfig->FilterActivation == CAN_FILTER_ENABLE)
+ {
+ SET_BIT(can_ip->FA1R, filternbrbitpos);
+ }
+
+ /* Leave the initialisation mode for the filter */
+ CLEAR_BIT(can_ip->FMR, CAN_FMR_FINIT);
+
+ /* Return function status */
+ return HAL_OK;
+ }
+ else
+ {
+ /* Update error code */
+ hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED;
+
+ return HAL_ERROR;
+ }
+}
+
+/**
+ * @}
+ */
+
+/** @defgroup CAN_Exported_Functions_Group3 Control functions
+ * @brief Control functions
+ *
+@verbatim
+ ==============================================================================
+ ##### Control functions #####
+ ==============================================================================
+ [..] This section provides functions allowing to:
+ (+) HAL_CAN_Start : Start the CAN module
+ (+) HAL_CAN_Stop : Stop the CAN module
+ (+) HAL_CAN_RequestSleep : Request sleep mode entry.
+ (+) HAL_CAN_WakeUp : Wake up from sleep mode.
+ (+) HAL_CAN_IsSleepActive : Check is sleep mode is active.
+ (+) HAL_CAN_AddTxMessage : Add a message to the Tx mailboxes
+ and activate the corresponding
+ transmission request
+ (+) HAL_CAN_AbortTxRequest : Abort transmission request
+ (+) HAL_CAN_GetTxMailboxesFreeLevel : Return Tx mailboxes free level
+ (+) HAL_CAN_IsTxMessagePending : Check if a transmission request is
+ pending on the selected Tx mailbox
+ (+) HAL_CAN_GetRxMessage : Get a CAN frame from the Rx FIFO
+ (+) HAL_CAN_GetRxFifoFillLevel : Return Rx FIFO fill level
+
+@endverbatim
+ * @{
+ */
+
+/**
+ * @brief Start the CAN module.
+ * @param hcan pointer to an CAN_HandleTypeDef structure that contains
+ * the configuration information for the specified CAN.
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_CAN_Start(CAN_HandleTypeDef *hcan)
+{
+ uint32_t tickstart;
+
+ if (hcan->State == HAL_CAN_STATE_READY)
+ {
+ /* Change CAN peripheral state */
+ hcan->State = HAL_CAN_STATE_LISTENING;
+
+ /* Request leave initialisation */
+ CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_INRQ);
+
+ /* Get tick */
+ tickstart = HAL_GetTick();
+
+ /* Wait the acknowledge */
+ while ((hcan->Instance->MSR & CAN_MSR_INAK) != 0U)
+ {
+ /* Check for the Timeout */
+ if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE)
+ {
+ /* Update error code */
+ hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT;
+
+ /* Change CAN state */
+ hcan->State = HAL_CAN_STATE_ERROR;
+
+ return HAL_ERROR;
+ }
+ }
+
+ /* Reset the CAN ErrorCode */
+ hcan->ErrorCode = HAL_CAN_ERROR_NONE;
+
+ /* Return function status */
+ return HAL_OK;
+ }
+ else
+ {
+ /* Update error code */
+ hcan->ErrorCode |= HAL_CAN_ERROR_NOT_READY;
+
+ return HAL_ERROR;
+ }
+}
+
+/**
+ * @brief Stop the CAN module and enable access to configuration registers.
+ * @param hcan pointer to an CAN_HandleTypeDef structure that contains
+ * the configuration information for the specified CAN.
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_CAN_Stop(CAN_HandleTypeDef *hcan)
+{
+ uint32_t tickstart;
+
+ if (hcan->State == HAL_CAN_STATE_LISTENING)
+ {
+ /* Request initialisation */
+ SET_BIT(hcan->Instance->MCR, CAN_MCR_INRQ);
+
+ /* Get tick */
+ tickstart = HAL_GetTick();
+
+ /* Wait the acknowledge */
+ while ((hcan->Instance->MSR & CAN_MSR_INAK) == 0U)
+ {
+ /* Check for the Timeout */
+ if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE)
+ {
+ /* Update error code */
+ hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT;
+
+ /* Change CAN state */
+ hcan->State = HAL_CAN_STATE_ERROR;
+
+ return HAL_ERROR;
+ }
+ }
+
+ /* Exit from sleep mode */
+ CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP);
+
+ /* Change CAN peripheral state */
+ hcan->State = HAL_CAN_STATE_READY;
+
+ /* Return function status */
+ return HAL_OK;
+ }
+ else
+ {
+ /* Update error code */
+ hcan->ErrorCode |= HAL_CAN_ERROR_NOT_STARTED;
+
+ return HAL_ERROR;
+ }
+}
+
+/**
+ * @brief Request the sleep mode (low power) entry.
+ * When returning from this function, Sleep mode will be entered
+ * as soon as the current CAN activity (transmission or reception
+ * of a CAN frame) has been completed.
+ * @param hcan pointer to a CAN_HandleTypeDef structure that contains
+ * the configuration information for the specified CAN.
+ * @retval HAL status.
+ */
+HAL_StatusTypeDef HAL_CAN_RequestSleep(CAN_HandleTypeDef *hcan)
+{
+ HAL_CAN_StateTypeDef state = hcan->State;
+
+ if ((state == HAL_CAN_STATE_READY) ||
+ (state == HAL_CAN_STATE_LISTENING))
+ {
+ /* Request Sleep mode */
+ SET_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP);
+
+ /* Return function status */
+ return HAL_OK;
+ }
+ else
+ {
+ /* Update error code */
+ hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED;
+
+ /* Return function status */
+ return HAL_ERROR;
+ }
+}
+
+/**
+ * @brief Wake up from sleep mode.
+ * When returning with HAL_OK status from this function, Sleep mode
+ * is exited.
+ * @param hcan pointer to a CAN_HandleTypeDef structure that contains
+ * the configuration information for the specified CAN.
+ * @retval HAL status.
+ */
+HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef *hcan)
+{
+ __IO uint32_t count = 0;
+ uint32_t timeout = 1000000U;
+ HAL_CAN_StateTypeDef state = hcan->State;
+
+ if ((state == HAL_CAN_STATE_READY) ||
+ (state == HAL_CAN_STATE_LISTENING))
+ {
+ /* Wake up request */
+ CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP);
+
+ /* Wait sleep mode is exited */
+ do
+ {
+ /* Increment counter */
+ count++;
+
+ /* Check if timeout is reached */
+ if (count > timeout)
+ {
+ /* Update error code */
+ hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT;
+
+ return HAL_ERROR;
+ }
+ }
+ while ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U);
+
+ /* Return function status */
+ return HAL_OK;
+ }
+ else
+ {
+ /* Update error code */
+ hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED;
+
+ return HAL_ERROR;
+ }
+}
+
+/**
+ * @brief Check is sleep mode is active.
+ * @param hcan pointer to a CAN_HandleTypeDef structure that contains
+ * the configuration information for the specified CAN.
+ * @retval Status
+ * - 0 : Sleep mode is not active.
+ * - 1 : Sleep mode is active.
+ */
+uint32_t HAL_CAN_IsSleepActive(CAN_HandleTypeDef *hcan)
+{
+ uint32_t status = 0U;
+ HAL_CAN_StateTypeDef state = hcan->State;
+
+ if ((state == HAL_CAN_STATE_READY) ||
+ (state == HAL_CAN_STATE_LISTENING))
+ {
+ /* Check Sleep mode */
+ if ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U)
+ {
+ status = 1U;
+ }
+ }
+
+ /* Return function status */
+ return status;
+}
+
+/**
+ * @brief Add a message to the first free Tx mailbox and activate the
+ * corresponding transmission request.
+ * @param hcan pointer to a CAN_HandleTypeDef structure that contains
+ * the configuration information for the specified CAN.
+ * @param pHeader pointer to a CAN_TxHeaderTypeDef structure.
+ * @param aData array containing the payload of the Tx frame.
+ * @param pTxMailbox pointer to a variable where the function will return
+ * the TxMailbox used to store the Tx message.
+ * This parameter can be a value of @arg CAN_Tx_Mailboxes.
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_CAN_AddTxMessage(CAN_HandleTypeDef *hcan, CAN_TxHeaderTypeDef *pHeader, uint8_t aData[], uint32_t *pTxMailbox)
+{
+ uint32_t transmitmailbox;
+ HAL_CAN_StateTypeDef state = hcan->State;
+ uint32_t tsr = READ_REG(hcan->Instance->TSR);
+
+ /* Check the parameters */
+ assert_param(IS_CAN_IDTYPE(pHeader->IDE));
+ assert_param(IS_CAN_RTR(pHeader->RTR));
+ assert_param(IS_CAN_DLC(pHeader->DLC));
+ if (pHeader->IDE == CAN_ID_STD)
+ {
+ assert_param(IS_CAN_STDID(pHeader->StdId));
+ }
+ else
+ {
+ assert_param(IS_CAN_EXTID(pHeader->ExtId));
+ }
+ assert_param(IS_FUNCTIONAL_STATE(pHeader->TransmitGlobalTime));
+
+ if ((state == HAL_CAN_STATE_READY) ||
+ (state == HAL_CAN_STATE_LISTENING))
+ {
+ /* Check that all the Tx mailboxes are not full */
+ if (((tsr & CAN_TSR_TME0) != 0U) ||
+ ((tsr & CAN_TSR_TME1) != 0U) ||
+ ((tsr & CAN_TSR_TME2) != 0U))
+ {
+ /* Select an empty transmit mailbox */
+ transmitmailbox = (tsr & CAN_TSR_CODE) >> CAN_TSR_CODE_Pos;
+
+ /* Check transmit mailbox value */
+ if (transmitmailbox > 2U)
+ {
+ /* Update error code */
+ hcan->ErrorCode |= HAL_CAN_ERROR_INTERNAL;
+
+ return HAL_ERROR;
+ }
+
+ /* Store the Tx mailbox */
+ *pTxMailbox = (uint32_t)1 << transmitmailbox;
+
+ /* Set up the Id */
+ if (pHeader->IDE == CAN_ID_STD)
+ {
+ hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->StdId << CAN_TI0R_STID_Pos) |
+ pHeader->RTR);
+ }
+ else
+ {
+ hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->ExtId << CAN_TI0R_EXID_Pos) |
+ pHeader->IDE |
+ pHeader->RTR);
+ }
+
+ /* Set up the DLC */
+ hcan->Instance->sTxMailBox[transmitmailbox].TDTR = (pHeader->DLC);
+
+ /* Set up the Transmit Global Time mode */
+ if (pHeader->TransmitGlobalTime == ENABLE)
+ {
+ SET_BIT(hcan->Instance->sTxMailBox[transmitmailbox].TDTR, CAN_TDT0R_TGT);
+ }
+
+ /* Set up the data field */
+ WRITE_REG(hcan->Instance->sTxMailBox[transmitmailbox].TDHR,
+ ((uint32_t)aData[7] << CAN_TDH0R_DATA7_Pos) |
+ ((uint32_t)aData[6] << CAN_TDH0R_DATA6_Pos) |
+ ((uint32_t)aData[5] << CAN_TDH0R_DATA5_Pos) |
+ ((uint32_t)aData[4] << CAN_TDH0R_DATA4_Pos));
+ WRITE_REG(hcan->Instance->sTxMailBox[transmitmailbox].TDLR,
+ ((uint32_t)aData[3] << CAN_TDL0R_DATA3_Pos) |
+ ((uint32_t)aData[2] << CAN_TDL0R_DATA2_Pos) |
+ ((uint32_t)aData[1] << CAN_TDL0R_DATA1_Pos) |
+ ((uint32_t)aData[0] << CAN_TDL0R_DATA0_Pos));
+
+ /* Request transmission */
+ SET_BIT(hcan->Instance->sTxMailBox[transmitmailbox].TIR, CAN_TI0R_TXRQ);
+
+ /* Return function status */
+ return HAL_OK;
+ }
+ else
+ {
+ /* Update error code */
+ hcan->ErrorCode |= HAL_CAN_ERROR_PARAM;
+
+ return HAL_ERROR;
+ }
+ }
+ else
+ {
+ /* Update error code */
+ hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED;
+
+ return HAL_ERROR;
+ }
+}
+
+/**
+ * @brief Abort transmission requests
+ * @param hcan pointer to an CAN_HandleTypeDef structure that contains
+ * the configuration information for the specified CAN.
+ * @param TxMailboxes List of the Tx Mailboxes to abort.
+ * This parameter can be any combination of @arg CAN_Tx_Mailboxes.
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_CAN_AbortTxRequest(CAN_HandleTypeDef *hcan, uint32_t TxMailboxes)
+{
+ HAL_CAN_StateTypeDef state = hcan->State;
+
+ /* Check function parameters */
+ assert_param(IS_CAN_TX_MAILBOX_LIST(TxMailboxes));
+
+ if ((state == HAL_CAN_STATE_READY) ||
+ (state == HAL_CAN_STATE_LISTENING))
+ {
+ /* Check Tx Mailbox 0 */
+ if ((TxMailboxes & CAN_TX_MAILBOX0) != 0U)
+ {
+ /* Add cancellation request for Tx Mailbox 0 */
+ SET_BIT(hcan->Instance->TSR, CAN_TSR_ABRQ0);
+ }
+
+ /* Check Tx Mailbox 1 */
+ if ((TxMailboxes & CAN_TX_MAILBOX1) != 0U)
+ {
+ /* Add cancellation request for Tx Mailbox 1 */
+ SET_BIT(hcan->Instance->TSR, CAN_TSR_ABRQ1);
+ }
+
+ /* Check Tx Mailbox 2 */
+ if ((TxMailboxes & CAN_TX_MAILBOX2) != 0U)
+ {
+ /* Add cancellation request for Tx Mailbox 2 */
+ SET_BIT(hcan->Instance->TSR, CAN_TSR_ABRQ2);
+ }
+
+ /* Return function status */
+ return HAL_OK;
+ }
+ else
+ {
+ /* Update error code */
+ hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED;
+
+ return HAL_ERROR;
+ }
+}
+
+/**
+ * @brief Return Tx Mailboxes free level: number of free Tx Mailboxes.
+ * @param hcan pointer to a CAN_HandleTypeDef structure that contains
+ * the configuration information for the specified CAN.
+ * @retval Number of free Tx Mailboxes.
+ */
+uint32_t HAL_CAN_GetTxMailboxesFreeLevel(CAN_HandleTypeDef *hcan)
+{
+ uint32_t freelevel = 0U;
+ HAL_CAN_StateTypeDef state = hcan->State;
+
+ if ((state == HAL_CAN_STATE_READY) ||
+ (state == HAL_CAN_STATE_LISTENING))
+ {
+ /* Check Tx Mailbox 0 status */
+ if ((hcan->Instance->TSR & CAN_TSR_TME0) != 0U)
+ {
+ freelevel++;
+ }
+
+ /* Check Tx Mailbox 1 status */
+ if ((hcan->Instance->TSR & CAN_TSR_TME1) != 0U)
+ {
+ freelevel++;
+ }
+
+ /* Check Tx Mailbox 2 status */
+ if ((hcan->Instance->TSR & CAN_TSR_TME2) != 0U)
+ {
+ freelevel++;
+ }
+ }
+
+ /* Return Tx Mailboxes free level */
+ return freelevel;
+}
+
+/**
+ * @brief Check if a transmission request is pending on the selected Tx
+ * Mailboxes.
+ * @param hcan pointer to an CAN_HandleTypeDef structure that contains
+ * the configuration information for the specified CAN.
+ * @param TxMailboxes List of Tx Mailboxes to check.
+ * This parameter can be any combination of @arg CAN_Tx_Mailboxes.
+ * @retval Status
+ * - 0 : No pending transmission request on any selected Tx Mailboxes.
+ * - 1 : Pending transmission request on at least one of the selected
+ * Tx Mailbox.
+ */
+uint32_t HAL_CAN_IsTxMessagePending(CAN_HandleTypeDef *hcan, uint32_t TxMailboxes)
+{
+ uint32_t status = 0U;
+ HAL_CAN_StateTypeDef state = hcan->State;
+
+ /* Check function parameters */
+ assert_param(IS_CAN_TX_MAILBOX_LIST(TxMailboxes));
+
+ if ((state == HAL_CAN_STATE_READY) ||
+ (state == HAL_CAN_STATE_LISTENING))
+ {
+ /* Check pending transmission request on the selected Tx Mailboxes */
+ if ((hcan->Instance->TSR & (TxMailboxes << CAN_TSR_TME0_Pos)) != (TxMailboxes << CAN_TSR_TME0_Pos))
+ {
+ status = 1U;
+ }
+ }
+
+ /* Return status */
+ return status;
+}
+
+/**
+ * @brief Return timestamp of Tx message sent, if time triggered communication
+ mode is enabled.
+ * @param hcan pointer to a CAN_HandleTypeDef structure that contains
+ * the configuration information for the specified CAN.
+ * @param TxMailbox Tx Mailbox where the timestamp of message sent will be
+ * read.
+ * This parameter can be one value of @arg CAN_Tx_Mailboxes.
+ * @retval Timestamp of message sent from Tx Mailbox.
+ */
+uint32_t HAL_CAN_GetTxTimestamp(CAN_HandleTypeDef *hcan, uint32_t TxMailbox)
+{
+ uint32_t timestamp = 0U;
+ uint32_t transmitmailbox;
+ HAL_CAN_StateTypeDef state = hcan->State;
+
+ /* Check function parameters */
+ assert_param(IS_CAN_TX_MAILBOX(TxMailbox));
+
+ if ((state == HAL_CAN_STATE_READY) ||
+ (state == HAL_CAN_STATE_LISTENING))
+ {
+ /* Select the Tx mailbox */
+ transmitmailbox = POSITION_VAL(TxMailbox);
+
+ /* Get timestamp */
+ timestamp = (hcan->Instance->sTxMailBox[transmitmailbox].TDTR & CAN_TDT0R_TIME) >> CAN_TDT0R_TIME_Pos;
+ }
+
+ /* Return the timestamp */
+ return timestamp;
+}
+
+/**
+ * @brief Get an CAN frame from the Rx FIFO zone into the message RAM.
+ * @param hcan pointer to an CAN_HandleTypeDef structure that contains
+ * the configuration information for the specified CAN.
+ * @param RxFifo Fifo number of the received message to be read.
+ * This parameter can be a value of @arg CAN_receive_FIFO_number.
+ * @param pHeader pointer to a CAN_RxHeaderTypeDef structure where the header
+ * of the Rx frame will be stored.
+ * @param aData array where the payload of the Rx frame will be stored.
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_CAN_GetRxMessage(CAN_HandleTypeDef *hcan, uint32_t RxFifo, CAN_RxHeaderTypeDef *pHeader, uint8_t aData[])
+{
+ HAL_CAN_StateTypeDef state = hcan->State;
+
+ assert_param(IS_CAN_RX_FIFO(RxFifo));
+
+ if ((state == HAL_CAN_STATE_READY) ||
+ (state == HAL_CAN_STATE_LISTENING))
+ {
+ /* Check the Rx FIFO */
+ if (RxFifo == CAN_RX_FIFO0) /* Rx element is assigned to Rx FIFO 0 */
+ {
+ /* Check that the Rx FIFO 0 is not empty */
+ if ((hcan->Instance->RF0R & CAN_RF0R_FMP0) == 0U)
+ {
+ /* Update error code */
+ hcan->ErrorCode |= HAL_CAN_ERROR_PARAM;
+
+ return HAL_ERROR;
+ }
+ }
+ else /* Rx element is assigned to Rx FIFO 1 */
+ {
+ /* Check that the Rx FIFO 1 is not empty */
+ if ((hcan->Instance->RF1R & CAN_RF1R_FMP1) == 0U)
+ {
+ /* Update error code */
+ hcan->ErrorCode |= HAL_CAN_ERROR_PARAM;
+
+ return HAL_ERROR;
+ }
+ }
+
+ /* Get the header */
+ pHeader->IDE = CAN_RI0R_IDE & hcan->Instance->sFIFOMailBox[RxFifo].RIR;
+ if (pHeader->IDE == CAN_ID_STD)
+ {
+ pHeader->StdId = (CAN_RI0R_STID & hcan->Instance->sFIFOMailBox[RxFifo].RIR) >> CAN_TI0R_STID_Pos;
+ }
+ else
+ {
+ pHeader->ExtId = ((CAN_RI0R_EXID | CAN_RI0R_STID) & hcan->Instance->sFIFOMailBox[RxFifo].RIR) >> CAN_RI0R_EXID_Pos;
+ }
+ pHeader->RTR = (CAN_RI0R_RTR & hcan->Instance->sFIFOMailBox[RxFifo].RIR);
+ pHeader->DLC = (CAN_RDT0R_DLC & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_DLC_Pos;
+ pHeader->FilterMatchIndex = (CAN_RDT0R_FMI & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_FMI_Pos;
+ pHeader->Timestamp = (CAN_RDT0R_TIME & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_TIME_Pos;
+
+ /* Get the data */
+ aData[0] = (uint8_t)((CAN_RDL0R_DATA0 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R_DATA0_Pos);
+ aData[1] = (uint8_t)((CAN_RDL0R_DATA1 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R_DATA1_Pos);
+ aData[2] = (uint8_t)((CAN_RDL0R_DATA2 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R_DATA2_Pos);
+ aData[3] = (uint8_t)((CAN_RDL0R_DATA3 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R_DATA3_Pos);
+ aData[4] = (uint8_t)((CAN_RDH0R_DATA4 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R_DATA4_Pos);
+ aData[5] = (uint8_t)((CAN_RDH0R_DATA5 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R_DATA5_Pos);
+ aData[6] = (uint8_t)((CAN_RDH0R_DATA6 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R_DATA6_Pos);
+ aData[7] = (uint8_t)((CAN_RDH0R_DATA7 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R_DATA7_Pos);
+
+ /* Release the FIFO */
+ if (RxFifo == CAN_RX_FIFO0) /* Rx element is assigned to Rx FIFO 0 */
+ {
+ /* Release RX FIFO 0 */
+ SET_BIT(hcan->Instance->RF0R, CAN_RF0R_RFOM0);
+ }
+ else /* Rx element is assigned to Rx FIFO 1 */
+ {
+ /* Release RX FIFO 1 */
+ SET_BIT(hcan->Instance->RF1R, CAN_RF1R_RFOM1);
+ }
+
+ /* Return function status */
+ return HAL_OK;
+ }
+ else
+ {
+ /* Update error code */
+ hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED;
+
+ return HAL_ERROR;
+ }
+}
+
+/**
+ * @brief Return Rx FIFO fill level.
+ * @param hcan pointer to an CAN_HandleTypeDef structure that contains
+ * the configuration information for the specified CAN.
+ * @param RxFifo Rx FIFO.
+ * This parameter can be a value of @arg CAN_receive_FIFO_number.
+ * @retval Number of messages available in Rx FIFO.
+ */
+uint32_t HAL_CAN_GetRxFifoFillLevel(CAN_HandleTypeDef *hcan, uint32_t RxFifo)
+{
+ uint32_t filllevel = 0U;
+ HAL_CAN_StateTypeDef state = hcan->State;
+
+ /* Check function parameters */
+ assert_param(IS_CAN_RX_FIFO(RxFifo));
+
+ if ((state == HAL_CAN_STATE_READY) ||
+ (state == HAL_CAN_STATE_LISTENING))
+ {
+ if (RxFifo == CAN_RX_FIFO0)
+ {
+ filllevel = hcan->Instance->RF0R & CAN_RF0R_FMP0;
+ }
+ else /* RxFifo == CAN_RX_FIFO1 */
+ {
+ filllevel = hcan->Instance->RF1R & CAN_RF1R_FMP1;
+ }
+ }
+
+ /* Return Rx FIFO fill level */
+ return filllevel;
+}
+
+/**
+ * @}
+ */
+
+/** @defgroup CAN_Exported_Functions_Group4 Interrupts management
+ * @brief Interrupts management
+ *
+@verbatim
+ ==============================================================================
+ ##### Interrupts management #####
+ ==============================================================================
+ [..] This section provides functions allowing to:
+ (+) HAL_CAN_ActivateNotification : Enable interrupts
+ (+) HAL_CAN_DeactivateNotification : Disable interrupts
+ (+) HAL_CAN_IRQHandler : Handles CAN interrupt request
+
+@endverbatim
+ * @{
+ */
+
+/**
+ * @brief Enable interrupts.
+ * @param hcan pointer to an CAN_HandleTypeDef structure that contains
+ * the configuration information for the specified CAN.
+ * @param ActiveITs indicates which interrupts will be enabled.
+ * This parameter can be any combination of @arg CAN_Interrupts.
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_CAN_ActivateNotification(CAN_HandleTypeDef *hcan, uint32_t ActiveITs)
+{
+ HAL_CAN_StateTypeDef state = hcan->State;
+
+ /* Check function parameters */
+ assert_param(IS_CAN_IT(ActiveITs));
+
+ if ((state == HAL_CAN_STATE_READY) ||
+ (state == HAL_CAN_STATE_LISTENING))
+ {
+ /* Enable the selected interrupts */
+ __HAL_CAN_ENABLE_IT(hcan, ActiveITs);
+
+ /* Return function status */
+ return HAL_OK;
+ }
+ else
+ {
+ /* Update error code */
+ hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED;
+
+ return HAL_ERROR;
+ }
+}
+
+/**
+ * @brief Disable interrupts.
+ * @param hcan pointer to an CAN_HandleTypeDef structure that contains
+ * the configuration information for the specified CAN.
+ * @param InactiveITs indicates which interrupts will be disabled.
+ * This parameter can be any combination of @arg CAN_Interrupts.
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_CAN_DeactivateNotification(CAN_HandleTypeDef *hcan, uint32_t InactiveITs)
+{
+ HAL_CAN_StateTypeDef state = hcan->State;
+
+ /* Check function parameters */
+ assert_param(IS_CAN_IT(InactiveITs));
+
+ if ((state == HAL_CAN_STATE_READY) ||
+ (state == HAL_CAN_STATE_LISTENING))
+ {
+ /* Disable the selected interrupts */
+ __HAL_CAN_DISABLE_IT(hcan, InactiveITs);
+
+ /* Return function status */
+ return HAL_OK;
+ }
+ else
+ {
+ /* Update error code */
+ hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED;
+
+ return HAL_ERROR;
+ }
+}
+
+/**
+ * @brief Handles CAN interrupt request
+ * @param hcan pointer to a CAN_HandleTypeDef structure that contains
+ * the configuration information for the specified CAN.
+ * @retval None
+ */
+void HAL_CAN_IRQHandler(CAN_HandleTypeDef *hcan)
+{
+ uint32_t errorcode = HAL_CAN_ERROR_NONE;
+ uint32_t interrupts = READ_REG(hcan->Instance->IER);
+ uint32_t msrflags = READ_REG(hcan->Instance->MSR);
+ uint32_t tsrflags = READ_REG(hcan->Instance->TSR);
+ uint32_t rf0rflags = READ_REG(hcan->Instance->RF0R);
+ uint32_t rf1rflags = READ_REG(hcan->Instance->RF1R);
+ uint32_t esrflags = READ_REG(hcan->Instance->ESR);
+
+ /* Transmit Mailbox empty interrupt management *****************************/
+ if ((interrupts & CAN_IT_TX_MAILBOX_EMPTY) != 0U)
+ {
+ /* Transmit Mailbox 0 management *****************************************/
+ if ((tsrflags & CAN_TSR_RQCP0) != 0U)
+ {
+ /* Clear the Transmission Complete flag (and TXOK0,ALST0,TERR0 bits) */
+ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_RQCP0);
+
+ if ((tsrflags & CAN_TSR_TXOK0) != 0U)
+ {
+ /* Transmission Mailbox 0 complete callback */
+#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
+ /* Call registered callback*/
+ hcan->TxMailbox0CompleteCallback(hcan);
+#else
+ /* Call weak (surcharged) callback */
+ HAL_CAN_TxMailbox0CompleteCallback(hcan);
+#endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
+ }
+ else
+ {
+ if ((tsrflags & CAN_TSR_ALST0) != 0U)
+ {
+ /* Update error code */
+ errorcode |= HAL_CAN_ERROR_TX_ALST0;
+ }
+ else if ((tsrflags & CAN_TSR_TERR0) != 0U)
+ {
+ /* Update error code */
+ errorcode |= HAL_CAN_ERROR_TX_TERR0;
+ }
+ else
+ {
+ /* Transmission Mailbox 0 abort callback */
+#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
+ /* Call registered callback*/
+ hcan->TxMailbox0AbortCallback(hcan);
+#else
+ /* Call weak (surcharged) callback */
+ HAL_CAN_TxMailbox0AbortCallback(hcan);
+#endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
+ }
+ }
+ }
+
+ /* Transmit Mailbox 1 management *****************************************/
+ if ((tsrflags & CAN_TSR_RQCP1) != 0U)
+ {
+ /* Clear the Transmission Complete flag (and TXOK1,ALST1,TERR1 bits) */
+ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_RQCP1);
+
+ if ((tsrflags & CAN_TSR_TXOK1) != 0U)
+ {
+ /* Transmission Mailbox 1 complete callback */
+#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
+ /* Call registered callback*/
+ hcan->TxMailbox1CompleteCallback(hcan);
+#else
+ /* Call weak (surcharged) callback */
+ HAL_CAN_TxMailbox1CompleteCallback(hcan);
+#endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
+ }
+ else
+ {
+ if ((tsrflags & CAN_TSR_ALST1) != 0U)
+ {
+ /* Update error code */
+ errorcode |= HAL_CAN_ERROR_TX_ALST1;
+ }
+ else if ((tsrflags & CAN_TSR_TERR1) != 0U)
+ {
+ /* Update error code */
+ errorcode |= HAL_CAN_ERROR_TX_TERR1;
+ }
+ else
+ {
+ /* Transmission Mailbox 1 abort callback */
+#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
+ /* Call registered callback*/
+ hcan->TxMailbox1AbortCallback(hcan);
+#else
+ /* Call weak (surcharged) callback */
+ HAL_CAN_TxMailbox1AbortCallback(hcan);
+#endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
+ }
+ }
+ }
+
+ /* Transmit Mailbox 2 management *****************************************/
+ if ((tsrflags & CAN_TSR_RQCP2) != 0U)
+ {
+ /* Clear the Transmission Complete flag (and TXOK2,ALST2,TERR2 bits) */
+ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_RQCP2);
+
+ if ((tsrflags & CAN_TSR_TXOK2) != 0U)
+ {
+ /* Transmission Mailbox 2 complete callback */
+#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
+ /* Call registered callback*/
+ hcan->TxMailbox2CompleteCallback(hcan);
+#else
+ /* Call weak (surcharged) callback */
+ HAL_CAN_TxMailbox2CompleteCallback(hcan);
+#endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
+ }
+ else
+ {
+ if ((tsrflags & CAN_TSR_ALST2) != 0U)
+ {
+ /* Update error code */
+ errorcode |= HAL_CAN_ERROR_TX_ALST2;
+ }
+ else if ((tsrflags & CAN_TSR_TERR2) != 0U)
+ {
+ /* Update error code */
+ errorcode |= HAL_CAN_ERROR_TX_TERR2;
+ }
+ else
+ {
+ /* Transmission Mailbox 2 abort callback */
+#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
+ /* Call registered callback*/
+ hcan->TxMailbox2AbortCallback(hcan);
+#else
+ /* Call weak (surcharged) callback */
+ HAL_CAN_TxMailbox2AbortCallback(hcan);
+#endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
+ }
+ }
+ }
+ }
+
+ /* Receive FIFO 0 overrun interrupt management *****************************/
+ if ((interrupts & CAN_IT_RX_FIFO0_OVERRUN) != 0U)
+ {
+ if ((rf0rflags & CAN_RF0R_FOVR0) != 0U)
+ {
+ /* Set CAN error code to Rx Fifo 0 overrun error */
+ errorcode |= HAL_CAN_ERROR_RX_FOV0;
+
+ /* Clear FIFO0 Overrun Flag */
+ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FOV0);
+ }
+ }
+
+ /* Receive FIFO 0 full interrupt management ********************************/
+ if ((interrupts & CAN_IT_RX_FIFO0_FULL) != 0U)
+ {
+ if ((rf0rflags & CAN_RF0R_FULL0) != 0U)
+ {
+ /* Clear FIFO 0 full Flag */
+ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FF0);
+
+ /* Receive FIFO 0 full Callback */
+#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
+ /* Call registered callback*/
+ hcan->RxFifo0FullCallback(hcan);
+#else
+ /* Call weak (surcharged) callback */
+ HAL_CAN_RxFifo0FullCallback(hcan);
+#endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
+ }
+ }
+
+ /* Receive FIFO 0 message pending interrupt management *********************/
+ if ((interrupts & CAN_IT_RX_FIFO0_MSG_PENDING) != 0U)
+ {
+ /* Check if message is still pending */
+ if ((hcan->Instance->RF0R & CAN_RF0R_FMP0) != 0U)
+ {
+ /* Receive FIFO 0 mesage pending Callback */
+#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
+ /* Call registered callback*/
+ hcan->RxFifo0MsgPendingCallback(hcan);
+#else
+ /* Call weak (surcharged) callback */
+ HAL_CAN_RxFifo0MsgPendingCallback(hcan);
+#endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
+ }
+ }
+
+ /* Receive FIFO 1 overrun interrupt management *****************************/
+ if ((interrupts & CAN_IT_RX_FIFO1_OVERRUN) != 0U)
+ {
+ if ((rf1rflags & CAN_RF1R_FOVR1) != 0U)
+ {
+ /* Set CAN error code to Rx Fifo 1 overrun error */
+ errorcode |= HAL_CAN_ERROR_RX_FOV1;
+
+ /* Clear FIFO1 Overrun Flag */
+ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FOV1);
+ }
+ }
+
+ /* Receive FIFO 1 full interrupt management ********************************/
+ if ((interrupts & CAN_IT_RX_FIFO1_FULL) != 0U)
+ {
+ if ((rf1rflags & CAN_RF1R_FULL1) != 0U)
+ {
+ /* Clear FIFO 1 full Flag */
+ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FF1);
+
+ /* Receive FIFO 1 full Callback */
+#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
+ /* Call registered callback*/
+ hcan->RxFifo1FullCallback(hcan);
+#else
+ /* Call weak (surcharged) callback */
+ HAL_CAN_RxFifo1FullCallback(hcan);
+#endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
+ }
+ }
+
+ /* Receive FIFO 1 message pending interrupt management *********************/
+ if ((interrupts & CAN_IT_RX_FIFO1_MSG_PENDING) != 0U)
+ {
+ /* Check if message is still pending */
+ if ((hcan->Instance->RF1R & CAN_RF1R_FMP1) != 0U)
+ {
+ /* Receive FIFO 1 mesage pending Callback */
+#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
+ /* Call registered callback*/
+ hcan->RxFifo1MsgPendingCallback(hcan);
+#else
+ /* Call weak (surcharged) callback */
+ HAL_CAN_RxFifo1MsgPendingCallback(hcan);
+#endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
+ }
+ }
+
+ /* Sleep interrupt management *********************************************/
+ if ((interrupts & CAN_IT_SLEEP_ACK) != 0U)
+ {
+ if ((msrflags & CAN_MSR_SLAKI) != 0U)
+ {
+ /* Clear Sleep interrupt Flag */
+ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_SLAKI);
+
+ /* Sleep Callback */
+#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
+ /* Call registered callback*/
+ hcan->SleepCallback(hcan);
+#else
+ /* Call weak (surcharged) callback */
+ HAL_CAN_SleepCallback(hcan);
+#endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
+ }
+ }
+
+ /* WakeUp interrupt management *********************************************/
+ if ((interrupts & CAN_IT_WAKEUP) != 0U)
+ {
+ if ((msrflags & CAN_MSR_WKUI) != 0U)
+ {
+ /* Clear WakeUp Flag */
+ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_WKU);
+
+ /* WakeUp Callback */
+#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
+ /* Call registered callback*/
+ hcan->WakeUpFromRxMsgCallback(hcan);
+#else
+ /* Call weak (surcharged) callback */
+ HAL_CAN_WakeUpFromRxMsgCallback(hcan);
+#endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
+ }
+ }
+
+ /* Error interrupts management *********************************************/
+ if ((interrupts & CAN_IT_ERROR) != 0U)
+ {
+ if ((msrflags & CAN_MSR_ERRI) != 0U)
+ {
+ /* Check Error Warning Flag */
+ if (((interrupts & CAN_IT_ERROR_WARNING) != 0U) &&
+ ((esrflags & CAN_ESR_EWGF) != 0U))
+ {
+ /* Set CAN error code to Error Warning */
+ errorcode |= HAL_CAN_ERROR_EWG;
+
+ /* No need for clear of Error Warning Flag as read-only */
+ }
+
+ /* Check Error Passive Flag */
+ if (((interrupts & CAN_IT_ERROR_PASSIVE) != 0U) &&
+ ((esrflags & CAN_ESR_EPVF) != 0U))
+ {
+ /* Set CAN error code to Error Passive */
+ errorcode |= HAL_CAN_ERROR_EPV;
+
+ /* No need for clear of Error Passive Flag as read-only */
+ }
+
+ /* Check Bus-off Flag */
+ if (((interrupts & CAN_IT_BUSOFF) != 0U) &&
+ ((esrflags & CAN_ESR_BOFF) != 0U))
+ {
+ /* Set CAN error code to Bus-Off */
+ errorcode |= HAL_CAN_ERROR_BOF;
+
+ /* No need for clear of Error Bus-Off as read-only */
+ }
+
+ /* Check Last Error Code Flag */
+ if (((interrupts & CAN_IT_LAST_ERROR_CODE) != 0U) &&
+ ((esrflags & CAN_ESR_LEC) != 0U))
+ {
+ switch (esrflags & CAN_ESR_LEC)
+ {
+ case (CAN_ESR_LEC_0):
+ /* Set CAN error code to Stuff error */
+ errorcode |= HAL_CAN_ERROR_STF;
+ break;
+ case (CAN_ESR_LEC_1):
+ /* Set CAN error code to Form error */
+ errorcode |= HAL_CAN_ERROR_FOR;
+ break;
+ case (CAN_ESR_LEC_1 | CAN_ESR_LEC_0):
+ /* Set CAN error code to Acknowledgement error */
+ errorcode |= HAL_CAN_ERROR_ACK;
+ break;
+ case (CAN_ESR_LEC_2):
+ /* Set CAN error code to Bit recessive error */
+ errorcode |= HAL_CAN_ERROR_BR;
+ break;
+ case (CAN_ESR_LEC_2 | CAN_ESR_LEC_0):
+ /* Set CAN error code to Bit Dominant error */
+ errorcode |= HAL_CAN_ERROR_BD;
+ break;
+ case (CAN_ESR_LEC_2 | CAN_ESR_LEC_1):
+ /* Set CAN error code to CRC error */
+ errorcode |= HAL_CAN_ERROR_CRC;
+ break;
+ default:
+ break;
+ }
+
+ /* Clear Last error code Flag */
+ CLEAR_BIT(hcan->Instance->ESR, CAN_ESR_LEC);
+ }
+ }
+
+ /* Clear ERRI Flag */
+ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_ERRI);
+ }
+
+ /* Call the Error call Back in case of Errors */
+ if (errorcode != HAL_CAN_ERROR_NONE)
+ {
+ /* Update error code in handle */
+ hcan->ErrorCode |= errorcode;
+
+ /* Call Error callback function */
+#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
+ /* Call registered callback*/
+ hcan->ErrorCallback(hcan);
+#else
+ /* Call weak (surcharged) callback */
+ HAL_CAN_ErrorCallback(hcan);
+#endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
+ }
+}
+
+/**
+ * @}
+ */
+
+/** @defgroup CAN_Exported_Functions_Group5 Callback functions
+ * @brief CAN Callback functions
+ *
+@verbatim
+ ==============================================================================
+ ##### Callback functions #####
+ ==============================================================================
+ [..]
+ This subsection provides the following callback functions:
+ (+) HAL_CAN_TxMailbox0CompleteCallback
+ (+) HAL_CAN_TxMailbox1CompleteCallback
+ (+) HAL_CAN_TxMailbox2CompleteCallback
+ (+) HAL_CAN_TxMailbox0AbortCallback
+ (+) HAL_CAN_TxMailbox1AbortCallback
+ (+) HAL_CAN_TxMailbox2AbortCallback
+ (+) HAL_CAN_RxFifo0MsgPendingCallback
+ (+) HAL_CAN_RxFifo0FullCallback
+ (+) HAL_CAN_RxFifo1MsgPendingCallback
+ (+) HAL_CAN_RxFifo1FullCallback
+ (+) HAL_CAN_SleepCallback
+ (+) HAL_CAN_WakeUpFromRxMsgCallback
+ (+) HAL_CAN_ErrorCallback
+
+@endverbatim
+ * @{
+ */
+
+/**
+ * @brief Transmission Mailbox 0 complete callback.
+ * @param hcan pointer to a CAN_HandleTypeDef structure that contains
+ * the configuration information for the specified CAN.
+ * @retval None
+ */
+__weak void HAL_CAN_TxMailbox0CompleteCallback(CAN_HandleTypeDef *hcan)
+{
+ /* Prevent unused argument(s) compilation warning */
+ UNUSED(hcan);
+
+ /* NOTE : This function Should not be modified, when the callback is needed,
+ the HAL_CAN_TxMailbox0CompleteCallback could be implemented in the
+ user file
+ */
+}
+
+/**
+ * @brief Transmission Mailbox 1 complete callback.
+ * @param hcan pointer to a CAN_HandleTypeDef structure that contains
+ * the configuration information for the specified CAN.
+ * @retval None
+ */
+__weak void HAL_CAN_TxMailbox1CompleteCallback(CAN_HandleTypeDef *hcan)
+{
+ /* Prevent unused argument(s) compilation warning */
+ UNUSED(hcan);
+
+ /* NOTE : This function Should not be modified, when the callback is needed,
+ the HAL_CAN_TxMailbox1CompleteCallback could be implemented in the
+ user file
+ */
+}
+
+/**
+ * @brief Transmission Mailbox 2 complete callback.
+ * @param hcan pointer to a CAN_HandleTypeDef structure that contains
+ * the configuration information for the specified CAN.
+ * @retval None
+ */
+__weak void HAL_CAN_TxMailbox2CompleteCallback(CAN_HandleTypeDef *hcan)
+{
+ /* Prevent unused argument(s) compilation warning */
+ UNUSED(hcan);
+
+ /* NOTE : This function Should not be modified, when the callback is needed,
+ the HAL_CAN_TxMailbox2CompleteCallback could be implemented in the
+ user file
+ */
+}
+
+/**
+ * @brief Transmission Mailbox 0 Cancellation callback.
+ * @param hcan pointer to an CAN_HandleTypeDef structure that contains
+ * the configuration information for the specified CAN.
+ * @retval None
+ */
+__weak void HAL_CAN_TxMailbox0AbortCallback(CAN_HandleTypeDef *hcan)
+{
+ /* Prevent unused argument(s) compilation warning */
+ UNUSED(hcan);
+
+ /* NOTE : This function Should not be modified, when the callback is needed,
+ the HAL_CAN_TxMailbox0AbortCallback could be implemented in the
+ user file
+ */
+}
+
+/**
+ * @brief Transmission Mailbox 1 Cancellation callback.
+ * @param hcan pointer to an CAN_HandleTypeDef structure that contains
+ * the configuration information for the specified CAN.
+ * @retval None
+ */
+__weak void HAL_CAN_TxMailbox1AbortCallback(CAN_HandleTypeDef *hcan)
+{
+ /* Prevent unused argument(s) compilation warning */
+ UNUSED(hcan);
+
+ /* NOTE : This function Should not be modified, when the callback is needed,
+ the HAL_CAN_TxMailbox1AbortCallback could be implemented in the
+ user file
+ */
+}
+
+/**
+ * @brief Transmission Mailbox 2 Cancellation callback.
+ * @param hcan pointer to an CAN_HandleTypeDef structure that contains
+ * the configuration information for the specified CAN.
+ * @retval None
+ */
+__weak void HAL_CAN_TxMailbox2AbortCallback(CAN_HandleTypeDef *hcan)
+{
+ /* Prevent unused argument(s) compilation warning */
+ UNUSED(hcan);
+
+ /* NOTE : This function Should not be modified, when the callback is needed,
+ the HAL_CAN_TxMailbox2AbortCallback could be implemented in the
+ user file
+ */
+}
+
+/**
+ * @brief Rx FIFO 0 message pending callback.
+ * @param hcan pointer to a CAN_HandleTypeDef structure that contains
+ * the configuration information for the specified CAN.
+ * @retval None
+ */
+__weak void HAL_CAN_RxFifo0MsgPendingCallback(CAN_HandleTypeDef *hcan)
+{
+ /* Prevent unused argument(s) compilation warning */
+ UNUSED(hcan);
+
+ /* NOTE : This function Should not be modified, when the callback is needed,
+ the HAL_CAN_RxFifo0MsgPendingCallback could be implemented in the
+ user file
+ */
+}
+
+/**
+ * @brief Rx FIFO 0 full callback.
+ * @param hcan pointer to a CAN_HandleTypeDef structure that contains
+ * the configuration information for the specified CAN.
+ * @retval None
+ */
+__weak void HAL_CAN_RxFifo0FullCallback(CAN_HandleTypeDef *hcan)
+{
+ /* Prevent unused argument(s) compilation warning */
+ UNUSED(hcan);
+
+ /* NOTE : This function Should not be modified, when the callback is needed,
+ the HAL_CAN_RxFifo0FullCallback could be implemented in the user
+ file
+ */
+}
+
+/**
+ * @brief Rx FIFO 1 message pending callback.
+ * @param hcan pointer to a CAN_HandleTypeDef structure that contains
+ * the configuration information for the specified CAN.
+ * @retval None
+ */
+__weak void HAL_CAN_RxFifo1MsgPendingCallback(CAN_HandleTypeDef *hcan)
+{
+ /* Prevent unused argument(s) compilation warning */
+ UNUSED(hcan);
+
+ /* NOTE : This function Should not be modified, when the callback is needed,
+ the HAL_CAN_RxFifo1MsgPendingCallback could be implemented in the
+ user file
+ */
+}
+
+/**
+ * @brief Rx FIFO 1 full callback.
+ * @param hcan pointer to a CAN_HandleTypeDef structure that contains
+ * the configuration information for the specified CAN.
+ * @retval None
+ */
+__weak void HAL_CAN_RxFifo1FullCallback(CAN_HandleTypeDef *hcan)
+{
+ /* Prevent unused argument(s) compilation warning */
+ UNUSED(hcan);
+
+ /* NOTE : This function Should not be modified, when the callback is needed,
+ the HAL_CAN_RxFifo1FullCallback could be implemented in the user
+ file
+ */
+}
+
+/**
+ * @brief Sleep callback.
+ * @param hcan pointer to a CAN_HandleTypeDef structure that contains
+ * the configuration information for the specified CAN.
+ * @retval None
+ */
+__weak void HAL_CAN_SleepCallback(CAN_HandleTypeDef *hcan)
+{
+ /* Prevent unused argument(s) compilation warning */
+ UNUSED(hcan);
+
+ /* NOTE : This function Should not be modified, when the callback is needed,
+ the HAL_CAN_SleepCallback could be implemented in the user file
+ */
+}
+
+/**
+ * @brief WakeUp from Rx message callback.
+ * @param hcan pointer to a CAN_HandleTypeDef structure that contains
+ * the configuration information for the specified CAN.
+ * @retval None
+ */
+__weak void HAL_CAN_WakeUpFromRxMsgCallback(CAN_HandleTypeDef *hcan)
+{
+ /* Prevent unused argument(s) compilation warning */
+ UNUSED(hcan);
+
+ /* NOTE : This function Should not be modified, when the callback is needed,
+ the HAL_CAN_WakeUpFromRxMsgCallback could be implemented in the
+ user file
+ */
+}
+
+/**
+ * @brief Error CAN callback.
+ * @param hcan pointer to a CAN_HandleTypeDef structure that contains
+ * the configuration information for the specified CAN.
+ * @retval None
+ */
+__weak void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan)
+{
+ /* Prevent unused argument(s) compilation warning */
+ UNUSED(hcan);
+
+ /* NOTE : This function Should not be modified, when the callback is needed,
+ the HAL_CAN_ErrorCallback could be implemented in the user file
+ */
+}
+
+/**
+ * @}
+ */
+
+/** @defgroup CAN_Exported_Functions_Group6 Peripheral State and Error functions
+ * @brief CAN Peripheral State functions
+ *
+@verbatim
+ ==============================================================================
+ ##### Peripheral State and Error functions #####
+ ==============================================================================
+ [..]
+ This subsection provides functions allowing to :
+ (+) HAL_CAN_GetState() : Return the CAN state.
+ (+) HAL_CAN_GetError() : Return the CAN error codes if any.
+ (+) HAL_CAN_ResetError(): Reset the CAN error codes if any.
+
+@endverbatim
+ * @{
+ */
+
+/**
+ * @brief Return the CAN state.
+ * @param hcan pointer to a CAN_HandleTypeDef structure that contains
+ * the configuration information for the specified CAN.
+ * @retval HAL state
+ */
+HAL_CAN_StateTypeDef HAL_CAN_GetState(CAN_HandleTypeDef *hcan)
+{
+ HAL_CAN_StateTypeDef state = hcan->State;
+
+ if ((state == HAL_CAN_STATE_READY) ||
+ (state == HAL_CAN_STATE_LISTENING))
+ {
+ /* Check sleep mode acknowledge flag */
+ if ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U)
+ {
+ /* Sleep mode is active */
+ state = HAL_CAN_STATE_SLEEP_ACTIVE;
+ }
+ /* Check sleep mode request flag */
+ else if ((hcan->Instance->MCR & CAN_MCR_SLEEP) != 0U)
+ {
+ /* Sleep mode request is pending */
+ state = HAL_CAN_STATE_SLEEP_PENDING;
+ }
+ else
+ {
+ /* Neither sleep mode request nor sleep mode acknowledge */
+ }
+ }
+
+ /* Return CAN state */
+ return state;
+}
+
+/**
+ * @brief Return the CAN error code.
+ * @param hcan pointer to a CAN_HandleTypeDef structure that contains
+ * the configuration information for the specified CAN.
+ * @retval CAN Error Code
+ */
+uint32_t HAL_CAN_GetError(CAN_HandleTypeDef *hcan)
+{
+ /* Return CAN error code */
+ return hcan->ErrorCode;
+}
+
+/**
+ * @brief Reset the CAN error code.
+ * @param hcan pointer to a CAN_HandleTypeDef structure that contains
+ * the configuration information for the specified CAN.
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_CAN_ResetError(CAN_HandleTypeDef *hcan)
+{
+ HAL_StatusTypeDef status = HAL_OK;
+ HAL_CAN_StateTypeDef state = hcan->State;
+
+ if ((state == HAL_CAN_STATE_READY) ||
+ (state == HAL_CAN_STATE_LISTENING))
+ {
+ /* Reset CAN error code */
+ hcan->ErrorCode = 0U;
+ }
+ else
+ {
+ /* Update error code */
+ hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED;
+
+ status = HAL_ERROR;
+ }
+
+ /* Return the status */
+ return status;
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#endif /* HAL_CAN_MODULE_ENABLED */
+
+/**
+ * @}
+ */
+
+#endif /* CAN1 */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Standard_robot/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c b/Standard_robot/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c
index 53ee47d..d166674 100644
--- a/Standard_robot/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c
+++ b/Standard_robot/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c
@@ -1585,7 +1585,7 @@ HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData,
HAL_StatusTypeDef errorcode = HAL_OK;
/* Check tx dma handle */
- assert_param(IS_SPI_DMA_HANDLE(hspi->hdmarx));
+ assert_param(IS_SPI_DMA_HANDLE(hspi->hdmatx));
/* Check Direction parameter */
assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
@@ -1634,19 +1634,19 @@ HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData,
#endif /* USE_SPI_CRC */
/* Set the SPI TxDMA Half transfer complete callback */
- hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfTransmitCplt;
+ hspi->hdmatx->XferHalfCpltCallback = SPI_DMAHalfTransmitCplt;
/* Set the SPI TxDMA transfer complete callback */
- hspi->hdmarx->XferCpltCallback = SPI_DMATransmitCplt;
+ hspi->hdmatx->XferCpltCallback = SPI_DMATransmitCplt;
/* Set the DMA error callback */
- hspi->hdmarx->XferErrorCallback = SPI_DMAError;
+ hspi->hdmatx->XferErrorCallback = SPI_DMAError;
/* Set the DMA AbortCpltCallback */
- hspi->hdmarx->XferAbortCallback = NULL;
+ hspi->hdmatx->XferAbortCallback = NULL;
/* Enable the Tx DMA Stream/Channel */
- if (HAL_OK != HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR,
+ if (HAL_OK != HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR,
hspi->TxXferCount))
{
/* Update SPI error code */
@@ -1678,7 +1678,7 @@ error :
/**
* @brief Receive an amount of data in non-blocking mode with DMA.
- * @note In case of MASTER mode and SPI_DIRECTION_2LINES direction, hdmarx shall be defined.
+ * @note In case of MASTER mode and SPI_DIRECTION_2LINES direction, hdmatx shall be defined.
* @param hspi pointer to a SPI_HandleTypeDef structure that contains
* the configuration information for SPI module.
* @param pData pointer to data buffer
@@ -1698,7 +1698,7 @@ HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, u
hspi->State = HAL_SPI_STATE_BUSY_RX;
/* Check tx dma handle */
- assert_param(IS_SPI_DMA_HANDLE(hspi->hdmarx));
+ assert_param(IS_SPI_DMA_HANDLE(hspi->hdmatx));
/* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
return HAL_SPI_TransmitReceive_DMA(hspi, pData, pData, Size);
@@ -1808,7 +1808,7 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *
/* Check rx & tx dma handles */
assert_param(IS_SPI_DMA_HANDLE(hspi->hdmarx));
- assert_param(IS_SPI_DMA_HANDLE(hspi->hdmarx));
+ assert_param(IS_SPI_DMA_HANDLE(hspi->hdmatx));
/* Check Direction parameter */
assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
@@ -1897,13 +1897,13 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *
/* Set the SPI Tx DMA transfer complete callback as NULL because the communication closing
is performed in DMA reception complete callback */
- hspi->hdmarx->XferHalfCpltCallback = NULL;
- hspi->hdmarx->XferCpltCallback = NULL;
- hspi->hdmarx->XferErrorCallback = NULL;
- hspi->hdmarx->XferAbortCallback = NULL;
+ hspi->hdmatx->XferHalfCpltCallback = NULL;
+ hspi->hdmatx->XferCpltCallback = NULL;
+ hspi->hdmatx->XferErrorCallback = NULL;
+ hspi->hdmatx->XferAbortCallback = NULL;
/* Enable the Tx DMA Stream/Channel */
- if (HAL_OK != HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR,
+ if (HAL_OK != HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR,
hspi->TxXferCount))
{
/* Update SPI error code */
@@ -1998,14 +1998,14 @@ HAL_StatusTypeDef HAL_SPI_Abort(SPI_HandleTypeDef *hspi)
if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXDMAEN))
{
/* Abort the SPI DMA Tx Stream/Channel : use blocking DMA Abort API (no callback) */
- if (hspi->hdmarx != NULL)
+ if (hspi->hdmatx != NULL)
{
/* Set the SPI DMA Abort callback :
will lead to call HAL_SPI_AbortCpltCallback() at end of DMA abort procedure */
- hspi->hdmarx->XferAbortCallback = NULL;
+ hspi->hdmatx->XferAbortCallback = NULL;
/* Abort DMA Tx Handle linked to SPI Peripheral */
- if (HAL_DMA_Abort(hspi->hdmarx) != HAL_OK)
+ if (HAL_DMA_Abort(hspi->hdmatx) != HAL_OK)
{
hspi->ErrorCode = HAL_SPI_ERROR_ABORT;
}
@@ -2144,17 +2144,17 @@ HAL_StatusTypeDef HAL_SPI_Abort_IT(SPI_HandleTypeDef *hspi)
/* If DMA Tx and/or DMA Rx Handles are associated to SPI Handle, DMA Abort complete callbacks should be initialised
before any call to DMA Abort functions */
/* DMA Tx Handle is valid */
- if (hspi->hdmarx != NULL)
+ if (hspi->hdmatx != NULL)
{
/* Set DMA Abort Complete callback if UART DMA Tx request if enabled.
Otherwise, set it to NULL */
if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXDMAEN))
{
- hspi->hdmarx->XferAbortCallback = SPI_DMATxAbortCallback;
+ hspi->hdmatx->XferAbortCallback = SPI_DMATxAbortCallback;
}
else
{
- hspi->hdmarx->XferAbortCallback = NULL;
+ hspi->hdmatx->XferAbortCallback = NULL;
}
}
/* DMA Rx Handle is valid */
@@ -2176,12 +2176,12 @@ HAL_StatusTypeDef HAL_SPI_Abort_IT(SPI_HandleTypeDef *hspi)
if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXDMAEN))
{
/* Abort the SPI DMA Tx Stream/Channel */
- if (hspi->hdmarx != NULL)
+ if (hspi->hdmatx != NULL)
{
/* Abort DMA Tx Handle linked to SPI Peripheral */
- if (HAL_DMA_Abort_IT(hspi->hdmarx) != HAL_OK)
+ if (HAL_DMA_Abort_IT(hspi->hdmatx) != HAL_OK)
{
- hspi->hdmarx->XferAbortCallback = NULL;
+ hspi->hdmatx->XferAbortCallback = NULL;
hspi->ErrorCode = HAL_SPI_ERROR_ABORT;
}
else
@@ -2301,9 +2301,9 @@ HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi)
*/
/* Abort the SPI DMA tx Stream/Channel */
- if (hspi->hdmarx != NULL)
+ if (hspi->hdmatx != NULL)
{
- if (HAL_OK != HAL_DMA_Abort(hspi->hdmarx))
+ if (HAL_OK != HAL_DMA_Abort(hspi->hdmatx))
{
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA);
errorcode = HAL_ERROR;
@@ -2407,12 +2407,12 @@ void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi)
}
}
/* Abort the SPI DMA Tx channel */
- if (hspi->hdmarx != NULL)
+ if (hspi->hdmatx != NULL)
{
/* Set the SPI DMA Abort callback :
will lead to call HAL_SPI_ErrorCallback() at end of DMA abort procedure */
- hspi->hdmarx->XferAbortCallback = SPI_DMAAbortOnError;
- if (HAL_OK != HAL_DMA_Abort_IT(hspi->hdmarx))
+ hspi->hdmatx->XferAbortCallback = SPI_DMAAbortOnError;
+ if (HAL_OK != HAL_DMA_Abort_IT(hspi->hdmatx))
{
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT);
}
@@ -2935,7 +2935,7 @@ static void SPI_DMATxAbortCallback(DMA_HandleTypeDef *hdma)
SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */
__IO uint32_t count;
- hspi->hdmarx->XferAbortCallback = NULL;
+ hspi->hdmatx->XferAbortCallback = NULL;
count = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U);
/* Disable Tx DMA Request */
@@ -3014,9 +3014,9 @@ static void SPI_DMARxAbortCallback(DMA_HandleTypeDef *hdma)
}
/* Check if an Abort process is still ongoing */
- if (hspi->hdmarx != NULL)
+ if (hspi->hdmatx != NULL)
{
- if (hspi->hdmarx->XferAbortCallback != NULL)
+ if (hspi->hdmatx->XferAbortCallback != NULL)
{
return;
}
diff --git a/Standard_robot/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c b/Standard_robot/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c
index 5c76c44..eaf4114 100644
--- a/Standard_robot/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c
+++ b/Standard_robot/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c
@@ -1317,20 +1317,20 @@ HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pDat
huart->gState = HAL_UART_STATE_BUSY_TX;
/* Set the UART DMA transfer complete callback */
- huart->hdmarx->XferCpltCallback = UART_DMATransmitCplt;
+ huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt;
/* Set the UART DMA Half transfer complete callback */
- huart->hdmarx->XferHalfCpltCallback = UART_DMATxHalfCplt;
+ huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt;
/* Set the DMA error callback */
- huart->hdmarx->XferErrorCallback = UART_DMAError;
+ huart->hdmatx->XferErrorCallback = UART_DMAError;
/* Set the DMA abort callback */
- huart->hdmarx->XferAbortCallback = NULL;
+ huart->hdmatx->XferAbortCallback = NULL;
/* Enable the UART transmit DMA stream */
tmp = (uint32_t *)&pData;
- HAL_DMA_Start_IT(huart->hdmarx, *(uint32_t *)tmp, (uint32_t)&huart->Instance->DR, Size);
+ HAL_DMA_Start_IT(huart->hdmatx, *(uint32_t *)tmp, (uint32_t)&huart->Instance->DR, Size);
/* Clear the TC flag in the SR register by writing 0 to it */
__HAL_UART_CLEAR_FLAG(huart, UART_FLAG_TC);
@@ -1518,9 +1518,9 @@ HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart)
CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
/* Abort the UART DMA Tx stream */
- if (huart->hdmarx != NULL)
+ if (huart->hdmatx != NULL)
{
- HAL_DMA_Abort(huart->hdmarx);
+ HAL_DMA_Abort(huart->hdmatx);
}
UART_EndTxTransfer(huart);
}
@@ -1566,15 +1566,15 @@ HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart)
CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
/* Abort the UART DMA Tx stream: use blocking DMA Abort API (no callback) */
- if (huart->hdmarx != NULL)
+ if (huart->hdmatx != NULL)
{
/* Set the UART DMA Abort callback to Null.
No call back execution at end of DMA abort procedure */
- huart->hdmarx->XferAbortCallback = NULL;
+ huart->hdmatx->XferAbortCallback = NULL;
- if (HAL_DMA_Abort(huart->hdmarx) != HAL_OK)
+ if (HAL_DMA_Abort(huart->hdmatx) != HAL_OK)
{
- if (HAL_DMA_GetError(huart->hdmarx) == HAL_DMA_ERROR_TIMEOUT)
+ if (HAL_DMA_GetError(huart->hdmatx) == HAL_DMA_ERROR_TIMEOUT)
{
/* Set error code to DMA */
huart->ErrorCode = HAL_UART_ERROR_DMA;
@@ -1647,15 +1647,15 @@ HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart)
CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
/* Abort the UART DMA Tx stream : use blocking DMA Abort API (no callback) */
- if (huart->hdmarx != NULL)
+ if (huart->hdmatx != NULL)
{
/* Set the UART DMA Abort callback to Null.
No call back execution at end of DMA abort procedure */
- huart->hdmarx->XferAbortCallback = NULL;
+ huart->hdmatx->XferAbortCallback = NULL;
- if (HAL_DMA_Abort(huart->hdmarx) != HAL_OK)
+ if (HAL_DMA_Abort(huart->hdmatx) != HAL_OK)
{
- if (HAL_DMA_GetError(huart->hdmarx) == HAL_DMA_ERROR_TIMEOUT)
+ if (HAL_DMA_GetError(huart->hdmatx) == HAL_DMA_ERROR_TIMEOUT)
{
/* Set error code to DMA */
huart->ErrorCode = HAL_UART_ERROR_DMA;
@@ -1752,17 +1752,17 @@ HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart)
/* If DMA Tx and/or DMA Rx Handles are associated to UART Handle, DMA Abort complete callbacks should be initialised
before any call to DMA Abort functions */
/* DMA Tx Handle is valid */
- if (huart->hdmarx != NULL)
+ if (huart->hdmatx != NULL)
{
/* Set DMA Abort Complete callback if UART DMA Tx request if enabled.
Otherwise, set it to NULL */
if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
{
- huart->hdmarx->XferAbortCallback = UART_DMATxAbortCallback;
+ huart->hdmatx->XferAbortCallback = UART_DMATxAbortCallback;
}
else
{
- huart->hdmarx->XferAbortCallback = NULL;
+ huart->hdmatx->XferAbortCallback = NULL;
}
}
/* DMA Rx Handle is valid */
@@ -1787,15 +1787,15 @@ HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart)
CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
/* Abort the UART DMA Tx stream : use non blocking DMA Abort API (callback) */
- if (huart->hdmarx != NULL)
+ if (huart->hdmatx != NULL)
{
/* UART Tx DMA Abort callback has already been initialised :
will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */
/* Abort DMA TX */
- if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
+ if (HAL_DMA_Abort_IT(huart->hdmatx) != HAL_OK)
{
- huart->hdmarx->XferAbortCallback = NULL;
+ huart->hdmatx->XferAbortCallback = NULL;
}
else
{
@@ -1880,17 +1880,17 @@ HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart)
CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
/* Abort the UART DMA Tx stream : use blocking DMA Abort API (no callback) */
- if (huart->hdmarx != NULL)
+ if (huart->hdmatx != NULL)
{
/* Set the UART DMA Abort callback :
will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */
- huart->hdmarx->XferAbortCallback = UART_DMATxOnlyAbortCallback;
+ huart->hdmatx->XferAbortCallback = UART_DMATxOnlyAbortCallback;
/* Abort DMA TX */
- if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
+ if (HAL_DMA_Abort_IT(huart->hdmatx) != HAL_OK)
{
- /* Call Directly huart->hdmarx->XferAbortCallback function in case of error */
- huart->hdmarx->XferAbortCallback(huart->hdmarx);
+ /* Call Directly huart->hdmatx->XferAbortCallback function in case of error */
+ huart->hdmatx->XferAbortCallback(huart->hdmatx);
}
}
else
@@ -2776,7 +2776,7 @@ static void UART_DMATxAbortCallback(DMA_HandleTypeDef *hdma)
{
UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
- huart->hdmarx->XferAbortCallback = NULL;
+ huart->hdmatx->XferAbortCallback = NULL;
/* Check if an Abort process is still ongoing */
if (huart->hdmarx != NULL)
@@ -2824,9 +2824,9 @@ static void UART_DMARxAbortCallback(DMA_HandleTypeDef *hdma)
huart->hdmarx->XferAbortCallback = NULL;
/* Check if an Abort process is still ongoing */
- if (huart->hdmarx != NULL)
+ if (huart->hdmatx != NULL)
{
- if (huart->hdmarx->XferAbortCallback != NULL)
+ if (huart->hdmatx->XferAbortCallback != NULL)
{
return;
}
diff --git a/Standard_robot/Inc/Remote_Control.h b/Standard_robot/Inc/Remote_Control.h
new file mode 100644
index 0000000..5b3096e
--- /dev/null
+++ b/Standard_robot/Inc/Remote_Control.h
@@ -0,0 +1,70 @@
+/**
+ ******************************************************************************
+ * @file Remote_Control.h
+ * @author Ginger
+ * @version V1.0.0
+ * @date 2015/11/14
+ * @brief
+ ******************************************************************************
+ * @attention
+ *
+ ******************************************************************************
+ */
+
+#ifndef __RC__
+#define __RC__
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f4xx_hal.h"
+
+#define RC_Frame_Lentgh 18
+
+typedef struct {
+ int16_t ch1; //each ch value from -364 -- +364
+ int16_t ch2;
+ int16_t ch3;
+ int16_t ch4;
+
+ uint8_t switch_left; //3 value
+ uint8_t switch_right;
+
+ struct {
+ int16_t x;
+ int16_t y;
+ int16_t z;
+
+ uint8_t press_left;
+ uint8_t press_right;
+ }mouse;
+
+ struct {
+ uint16_t key_code;
+/**********************************************************************************
+ * ¼üÅÌͨµÀ:15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
+ * V C X Z G F R E Q CTRL SHIFT D A S W
+************************************************************************************/
+
+ }keyBoard;
+
+
+}RC_Type;
+
+
+
+enum{
+ Switch_Up = 1,
+ Switch_Middle = 3,
+ Switch_Down = 2,
+};
+
+enum{
+ Key_W,
+ Key_S,
+ //...
+};
+
+extern RC_Type remote_control;
+extern uint32_t Latest_Remote_Control_Pack_Time ;
+void Callback_RC_Handle(RC_Type* rc, uint8_t* buff);
+#endif
+
+
diff --git a/Standard_robot/Inc/can.h b/Standard_robot/Inc/can.h
index fb53f2e..8e586fd 100644
--- a/Standard_robot/Inc/can.h
+++ b/Standard_robot/Inc/can.h
@@ -4,35 +4,15 @@
* Description : This file provides code for the configuration
* of the CAN instances.
******************************************************************************
- ** This notice applies to any and all portions of this file
- * that are not between comment pairs USER CODE BEGIN and
- * USER CODE END. Other portions of this file, whether
- * inserted by the user or by software development tools
- * are owned by their respective copyright owners.
+ * @attention
*
- * COPYRIGHT(c) 2018 STMicroelectronics
+ * <h2><center>© Copyright (c) 2020 STMicroelectronics.
+ * All rights reserved.</center></h2>
*
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
@@ -44,7 +24,6 @@
#endif
/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx_hal.h"
#include "main.h"
/* USER CODE BEGIN Includes */
@@ -57,8 +36,6 @@ extern CAN_HandleTypeDef hcan1;
/* USER CODE END Private defines */
-extern void _Error_Handler(char *, int);
-
void MX_CAN1_Init(void);
/* USER CODE BEGIN Prototypes */
diff --git a/Standard_robot/Inc/gpio.h b/Standard_robot/Inc/gpio.h
index df7f4c6..1c7f4f4 100644
--- a/Standard_robot/Inc/gpio.h
+++ b/Standard_robot/Inc/gpio.h
@@ -26,7 +26,6 @@
/* Includes ------------------------------------------------------------------*/
#include "main.h"
-#include "stm32f4xx_hal.h"
/* USER CODE BEGIN Includes */
diff --git a/Standard_robot/Inc/main.h b/Standard_robot/Inc/main.h
index d292255..f681b0c 100644
--- a/Standard_robot/Inc/main.h
+++ b/Standard_robot/Inc/main.h
@@ -28,6 +28,7 @@ extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
+#include "stm32f4xx_hal.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
@@ -57,19 +58,18 @@ void Error_Handler(void);
/* USER CODE END EFP */
/* Private defines -----------------------------------------------------------*/
-/*#define OLED_DC_Pin GPIO_PIN_9
+#define OLED_DC_Pin GPIO_PIN_9
#define OLED_DC_GPIO_Port GPIOB
#define LED_A_Pin GPIO_PIN_8
#define LED_A_GPIO_Port GPIOG
-#define OLED_RST_Pin GPIO_PIN_10
-#define OLED_RST_GPIO_Port GPIOB*/
-
#define KEY_Pin GPIO_PIN_10
#define KEY_GPIO_Port GPIOD
#define LED1_Pin GPIO_PIN_14
#define LED1_GPIO_Port GPIOF
#define LED2_Pin GPIO_PIN_7
#define LED2_GPIO_Port GPIOE
+#define OLED_RST_Pin GPIO_PIN_10
+#define OLED_RST_GPIO_Port GPIOB
/* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */
diff --git a/Standard_robot/Inc/stm32f4xx_hal_conf.h b/Standard_robot/Inc/stm32f4xx_hal_conf.h
index 2402236..1cdc915 100644
--- a/Standard_robot/Inc/stm32f4xx_hal_conf.h
+++ b/Standard_robot/Inc/stm32f4xx_hal_conf.h
@@ -26,7 +26,6 @@
#ifdef __cplusplus
extern "C" {
#endif
-#include "main.h"
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
@@ -37,9 +36,9 @@
*/
#define HAL_MODULE_ENABLED
- /* #define HAL_ADC_MODULE_ENABLED */
+ #define HAL_ADC_MODULE_ENABLED
/* #define HAL_CRYP_MODULE_ENABLED */
- #define HAL_CAN_MODULE_ENABLED
+#define HAL_CAN_MODULE_ENABLED
/* #define HAL_CRC_MODULE_ENABLED */
/* #define HAL_CRYP_MODULE_ENABLED */
/* #define HAL_DAC_MODULE_ENABLED */
@@ -61,8 +60,8 @@
/* #define HAL_SAI_MODULE_ENABLED */
/* #define HAL_SD_MODULE_ENABLED */
/* #define HAL_MMC_MODULE_ENABLED */
-/*#define HAL_SPI_MODULE_ENABLED */
-#define HAL_TIM_MODULE_ENABLED
+#define HAL_SPI_MODULE_ENABLED
+#define HAL_TIM_MODULE_ENABLED
#define HAL_UART_MODULE_ENABLED
/* #define HAL_USART_MODULE_ENABLED */
/* #define HAL_IRDA_MODULE_ENABLED */
@@ -80,7 +79,7 @@
/* #define HAL_LPTIM_MODULE_ENABLED */
/* #define HAL_EXTI_MODULE_ENABLED */
#define HAL_GPIO_MODULE_ENABLED
-/*#define HAL_EXTI_MODULE_ENABLED*/
+#define HAL_EXTI_MODULE_ENABLED
#define HAL_DMA_MODULE_ENABLED
#define HAL_RCC_MODULE_ENABLED
#define HAL_FLASH_MODULE_ENABLED
diff --git a/Standard_robot/Inc/stm32f4xx_it.h b/Standard_robot/Inc/stm32f4xx_it.h
index a5791f5..aa55d4f 100644
--- a/Standard_robot/Inc/stm32f4xx_it.h
+++ b/Standard_robot/Inc/stm32f4xx_it.h
@@ -57,8 +57,6 @@ void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
-void CAN1_TX_IRQHandler(void);
-void CAN1_RX0_IRQHandler(void);
void USART1_IRQHandler(void);
void TIM6_DAC_IRQHandler(void);
void DMA2_Stream2_IRQHandler(void);
diff --git a/Standard_robot/Inc/tim.h b/Standard_robot/Inc/tim.h
index 129f1c3..3d376f8 100644
--- a/Standard_robot/Inc/tim.h
+++ b/Standard_robot/Inc/tim.h
@@ -4,35 +4,15 @@
* Description : This file provides code for the configuration
* of the TIM instances.
******************************************************************************
- ** This notice applies to any and all portions of this file
- * that are not between comment pairs USER CODE BEGIN and
- * USER CODE END. Other portions of this file, whether
- * inserted by the user or by software development tools
- * are owned by their respective copyright owners.
+ * @attention
*
- * COPYRIGHT(c) 2018 STMicroelectronics
+ * <h2><center>© Copyright (c) 2020 STMicroelectronics.
+ * All rights reserved.</center></h2>
*
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
@@ -44,7 +24,6 @@
#endif
/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx_hal.h"
#include "main.h"
/* USER CODE BEGIN Includes */
@@ -57,8 +36,6 @@ extern TIM_HandleTypeDef htim1;
/* USER CODE END Private defines */
-extern void _Error_Handler(char *, int);
-
void MX_TIM1_Init(void);
/* USER CODE BEGIN Prototypes */
diff --git a/Standard_robot/Inc/usart.h b/Standard_robot/Inc/usart.h
index 9ba9b0d..d375e92 100644
--- a/Standard_robot/Inc/usart.h
+++ b/Standard_robot/Inc/usart.h
@@ -25,7 +25,7 @@
/* Includes ------------------------------------------------------------------*/
#include "main.h"
-#include "stm32f4xx_hal.h"
+
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
@@ -39,8 +39,6 @@ void HAL_UART_IDLE_IRQHandler(UART_HandleTypeDef *huart);
/* USER CODE END Private defines */
-extern void _Error_Handler(char *, int);
-
void MX_USART1_UART_Init(void);
/* USER CODE BEGIN Prototypes */
diff --git a/Standard_robot/MDK-ARM/Standard_robot.uvguix.cisse b/Standard_robot/MDK-ARM/Standard_robot.uvguix.cisse
new file mode 100644
index 0000000..8acfe44
--- /dev/null
+++ b/Standard_robot/MDK-ARM/Standard_robot.uvguix.cisse
@@ -0,0 +1,1887 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectGui xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_guix.xsd">
+
+ <SchemaVersion>-6.1</SchemaVersion>
+
+ <Header>### uVision Project, (C) Keil Software</Header>
+
+ <PrjGuiSettings>
+ <LastAddFilePath>C:\Users\cisse\Desktop\RoboMaster\controle-et-systeme\demo610\Src</LastAddFilePath>
+ </PrjGuiSettings>
+
+ <ViewPool/>
+
+ <SECTreeCtrl>
+ <View>
+ <WinId>38003</WinId>
+ <ViewName>Registers</ViewName>
+ <TableColWidths>115 67</TableColWidths>
+ </View>
+ <View>
+ <WinId>346</WinId>
+ <ViewName>Code Coverage</ViewName>
+ <TableColWidths>770 160</TableColWidths>
+ </View>
+ <View>
+ <WinId>204</WinId>
+ <ViewName>Performance Analyzer</ViewName>
+ <TableColWidths>930</TableColWidths>
+ </View>
+ </SECTreeCtrl>
+
+ <TreeListPane>
+ <View>
+ <WinId>35141</WinId>
+ <ViewName>Event Statistics</ViewName>
+ <UserString></UserString>
+ <TableColWidths>200 50 700</TableColWidths>
+ </View>
+ <View>
+ <WinId>1506</WinId>
+ <ViewName>Symbols</ViewName>
+ <UserString></UserString>
+ <TableColWidths>64 64 64</TableColWidths>
+ </View>
+ <View>
+ <WinId>1936</WinId>
+ <ViewName>Watch 1</ViewName>
+ <UserString></UserString>
+ <TableColWidths>200 133 133</TableColWidths>
+ </View>
+ <View>
+ <WinId>1937</WinId>
+ <ViewName>Watch 2</ViewName>
+ <UserString></UserString>
+ <TableColWidths>200 133 133</TableColWidths>
+ </View>
+ <View>
+ <WinId>1935</WinId>
+ <ViewName>Call Stack + Locals</ViewName>
+ <UserString></UserString>
+ <TableColWidths>200 133 133</TableColWidths>
+ </View>
+ <View>
+ <WinId>2506</WinId>
+ <ViewName>Trace Data</ViewName>
+ <UserString></UserString>
+ <TableColWidths>75 135 130 95 70 230 200 150</TableColWidths>
+ </View>
+ <View>
+ <WinId>466</WinId>
+ <ViewName>Source Browser</ViewName>
+ <UserString>500</UserString>
+ <TableColWidths>300</TableColWidths>
+ </View>
+ </TreeListPane>
+
+ <CompViewPool/>
+
+ <WindowSettings>
+ <LogicAnalizer>
+ <ShowLACursor>1</ShowLACursor>
+ <ShowSignalInfo>1</ShowSignalInfo>
+ <ShowCycles>0</ShowCycles>
+ <LeftSideBarSize>0</LeftSideBarSize>
+ <TimeBaseIndex>-1</TimeBaseIndex>
+ </LogicAnalizer>
+ </WindowSettings>
+
+ <WinLayoutEx>
+ <sActiveDebugView></sActiveDebugView>
+ <WindowPosition>
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+ <MDIGroups>
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+ <TopLine>255</TopLine>
+ <CurrentLine>159</CurrentLine>
+ <Folding>1</Folding>
+ <ContractedFolders></ContractedFolders>
+ <PaneID>0</PaneID>
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+ <Name>../Src/can.c</Name>
+ <ColumnNumber>59</ColumnNumber>
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diff --git a/Standard_robot/MDK-ARM/Standard_robot.uvoptx b/Standard_robot/MDK-ARM/Standard_robot.uvoptx
index 8de390e..2388fb9 100644
--- a/Standard_robot/MDK-ARM/Standard_robot.uvoptx
+++ b/Standard_robot/MDK-ARM/Standard_robot.uvoptx
@@ -128,7 +128,24 @@
<Name>-U-O142 -O2254 -S0 -C0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F4xx_2048.FLM -FS08000000 -FL0200000 -FP0($$Device:STM32F427IIHx$CMSIS\Flash\STM32F4xx_2048.FLM)</Name>
</SetRegEntry>
</TargetDriverDllRegistry>
- <Breakpoint/>
+ <Breakpoint>
+ <Bp>
+ <Number>0</Number>
+ <Type>0</Type>
+ <LineNumber>151</LineNumber>
+ <EnabledFlag>1</EnabledFlag>
+ <Address>0</Address>
+ <ByteObject>0</ByteObject>
+ <HtxType>0</HtxType>
+ <ManyObjects>0</ManyObjects>
+ <SizeOfObject>0</SizeOfObject>
+ <BreakByAccess>0</BreakByAccess>
+ <BreakIfRCount>0</BreakIfRCount>
+ <Filename>../Src/main.c</Filename>
+ <ExecCommand></ExecCommand>
+ <Expression></Expression>
+ </Bp>
+ </Breakpoint>
<Tracepoint>
<THDelay>0</THDelay>
</Tracepoint>
@@ -214,6 +231,18 @@
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
+ <PathWithFileName>..\..\demo610\Src\Remote_Control.c</PathWithFileName>
+ <FilenameWithoutPath>Remote_Control.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>2</GroupNumber>
+ <FileNumber>3</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
<PathWithFileName>../Src/main.c</PathWithFileName>
<FilenameWithoutPath>main.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
@@ -221,7 +250,7 @@
</File>
<File>
<GroupNumber>2</GroupNumber>
- <FileNumber>3</FileNumber>
+ <FileNumber>4</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -233,7 +262,7 @@
</File>
<File>
<GroupNumber>2</GroupNumber>
- <FileNumber>4</FileNumber>
+ <FileNumber>5</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -245,7 +274,19 @@
</File>
<File>
<GroupNumber>2</GroupNumber>
- <FileNumber>5</FileNumber>
+ <FileNumber>6</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>../Src/can.c</PathWithFileName>
+ <FilenameWithoutPath>can.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>2</GroupNumber>
+ <FileNumber>7</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -257,7 +298,7 @@
</File>
<File>
<GroupNumber>2</GroupNumber>
- <FileNumber>6</FileNumber>
+ <FileNumber>8</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -269,7 +310,19 @@
</File>
<File>
<GroupNumber>2</GroupNumber>
- <FileNumber>7</FileNumber>
+ <FileNumber>9</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>../Src/tim.c</PathWithFileName>
+ <FilenameWithoutPath>tim.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>2</GroupNumber>
+ <FileNumber>10</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -281,7 +334,7 @@
</File>
<File>
<GroupNumber>2</GroupNumber>
- <FileNumber>8</FileNumber>
+ <FileNumber>11</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -293,7 +346,7 @@
</File>
<File>
<GroupNumber>2</GroupNumber>
- <FileNumber>9</FileNumber>
+ <FileNumber>12</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -303,89 +356,137 @@
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
+ <File>
+ <GroupNumber>2</GroupNumber>
+ <FileNumber>13</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>../Src/stm32f4xx_hal_timebase_tim.c</PathWithFileName>
+ <FilenameWithoutPath>stm32f4xx_hal_timebase_tim.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
</Group>
<Group>
- <GroupName>Drivers/STM32F4xx_HAL_Driver</GroupName>
+ <GroupName>Drivers/CMSIS</GroupName>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File>
<GroupNumber>3</GroupNumber>
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+ <FileNumber>14</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
- <PathWithFileName>../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_adc.c</PathWithFileName>
- <FilenameWithoutPath>stm32f4xx_hal_adc.c</FilenameWithoutPath>
+ <PathWithFileName>../Src/system_stm32f4xx.c</PathWithFileName>
+ <FilenameWithoutPath>system_stm32f4xx.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
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+
+ <Group>
+ <GroupName>BSP</GroupName>
+ <tvExp>0</tvExp>
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- <FilenameWithoutPath>stm32f4xx_hal_adc_ex.c</FilenameWithoutPath>
+ <PathWithFileName>..\BSP\Driver\bsp_usart.c</PathWithFileName>
+ <FilenameWithoutPath>bsp_usart.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
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<bDave2>0</bDave2>
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- <FilenameWithoutPath>stm32f4xx_hal_spi.c</FilenameWithoutPath>
+ <PathWithFileName>..\BSP\Driver\bsp_oled.c</PathWithFileName>
+ <FilenameWithoutPath>bsp_oled.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
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- <FilenameWithoutPath>stm32f4xx_hal_tim.c</FilenameWithoutPath>
+ <PathWithFileName>..\Src\Remote_Control.c</PathWithFileName>
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<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
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+
+ <Group>
+ <GroupName>Device</GroupName>
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<File>
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- <FilenameWithoutPath>stm32f4xx_hal_tim_ex.c</FilenameWithoutPath>
+ <PathWithFileName>..\BSP\Device\oled.c</PathWithFileName>
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<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
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+ <Group>
+ <GroupName>Drivers/STM32F4xx_HAL_Driver</GroupName>
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<File>
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<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -396,8 +497,8 @@
<bShared>0</bShared>
</File>
<File>
- <GroupNumber>3</GroupNumber>
- <FileNumber>17</FileNumber>
+ <GroupNumber>6</GroupNumber>
+ <FileNumber>22</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -408,8 +509,8 @@
<bShared>0</bShared>
</File>
<File>
- <GroupNumber>3</GroupNumber>
- <FileNumber>18</FileNumber>
+ <GroupNumber>6</GroupNumber>
+ <FileNumber>23</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -420,8 +521,8 @@
<bShared>0</bShared>
</File>
<File>
- <GroupNumber>3</GroupNumber>
- <FileNumber>19</FileNumber>
+ <GroupNumber>6</GroupNumber>
+ <FileNumber>24</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -432,8 +533,8 @@
<bShared>0</bShared>
</File>
<File>
- <GroupNumber>3</GroupNumber>
- <FileNumber>20</FileNumber>
+ <GroupNumber>6</GroupNumber>
+ <FileNumber>25</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -444,8 +545,8 @@
<bShared>0</bShared>
</File>
<File>
- <GroupNumber>3</GroupNumber>
- <FileNumber>21</FileNumber>
+ <GroupNumber>6</GroupNumber>
+ <FileNumber>26</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -456,8 +557,8 @@
<bShared>0</bShared>
</File>
<File>
- <GroupNumber>3</GroupNumber>
- <FileNumber>22</FileNumber>
+ <GroupNumber>6</GroupNumber>
+ <FileNumber>27</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -468,8 +569,8 @@
<bShared>0</bShared>
</File>
<File>
- <GroupNumber>3</GroupNumber>
- <FileNumber>23</FileNumber>
+ <GroupNumber>6</GroupNumber>
+ <FileNumber>28</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -480,8 +581,8 @@
<bShared>0</bShared>
</File>
<File>
- <GroupNumber>3</GroupNumber>
- <FileNumber>24</FileNumber>
+ <GroupNumber>6</GroupNumber>
+ <FileNumber>29</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -492,8 +593,8 @@
<bShared>0</bShared>
</File>
<File>
- <GroupNumber>3</GroupNumber>
- <FileNumber>25</FileNumber>
+ <GroupNumber>6</GroupNumber>
+ <FileNumber>30</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -504,8 +605,8 @@
<bShared>0</bShared>
</File>
<File>
- <GroupNumber>3</GroupNumber>
- <FileNumber>26</FileNumber>
+ <GroupNumber>6</GroupNumber>
+ <FileNumber>31</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -516,8 +617,8 @@
<bShared>0</bShared>
</File>
<File>
- <GroupNumber>3</GroupNumber>
- <FileNumber>27</FileNumber>
+ <GroupNumber>6</GroupNumber>
+ <FileNumber>32</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -528,8 +629,8 @@
<bShared>0</bShared>
</File>
<File>
- <GroupNumber>3</GroupNumber>
- <FileNumber>28</FileNumber>
+ <GroupNumber>6</GroupNumber>
+ <FileNumber>33</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -539,75 +640,63 @@
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
- </Group>
-
- <Group>
- <GroupName>Drivers/CMSIS</GroupName>
- <tvExp>1</tvExp>
- <tvExpOptDlg>0</tvExpOptDlg>
- <cbSel>0</cbSel>
- <RteFlg>0</RteFlg>
<File>
- <GroupNumber>4</GroupNumber>
- <FileNumber>29</FileNumber>
+ <GroupNumber>6</GroupNumber>
+ <FileNumber>34</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
- <PathWithFileName>../Src/system_stm32f4xx.c</PathWithFileName>
- <FilenameWithoutPath>system_stm32f4xx.c</FilenameWithoutPath>
+ <PathWithFileName>../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_can.c</PathWithFileName>
+ <FilenameWithoutPath>stm32f4xx_hal_can.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
- </Group>
-
- <Group>
- <GroupName>BSP</GroupName>
- <tvExp>1</tvExp>
- <tvExpOptDlg>0</tvExpOptDlg>
- <cbSel>0</cbSel>
- <RteFlg>0</RteFlg>
<File>
- <GroupNumber>5</GroupNumber>
- <FileNumber>30</FileNumber>
+ <GroupNumber>6</GroupNumber>
+ <FileNumber>35</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
- <PathWithFileName>..\BSP\Driver\bsp_usart.c</PathWithFileName>
- <FilenameWithoutPath>bsp_usart.c</FilenameWithoutPath>
+ <PathWithFileName>../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c</PathWithFileName>
+ <FilenameWithoutPath>stm32f4xx_hal_spi.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
- <GroupNumber>5</GroupNumber>
- <FileNumber>31</FileNumber>
+ <GroupNumber>6</GroupNumber>
+ <FileNumber>36</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
- <PathWithFileName>..\BSP\Driver\bsp_oled.c</PathWithFileName>
- <FilenameWithoutPath>bsp_oled.c</FilenameWithoutPath>
+ <PathWithFileName>../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c</PathWithFileName>
+ <FilenameWithoutPath>stm32f4xx_hal_tim.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
- </Group>
-
- <Group>
- <GroupName>Device</GroupName>
- <tvExp>1</tvExp>
- <tvExpOptDlg>0</tvExpOptDlg>
- <cbSel>0</cbSel>
- <RteFlg>0</RteFlg>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>32</FileNumber>
+ <FileNumber>37</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
- <PathWithFileName>..\BSP\Device\oled.c</PathWithFileName>
- <FilenameWithoutPath>oled.c</FilenameWithoutPath>
+ <PathWithFileName>../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c</PathWithFileName>
+ <FilenameWithoutPath>stm32f4xx_hal_tim_ex.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>6</GroupNumber>
+ <FileNumber>38</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c</PathWithFileName>
+ <FilenameWithoutPath>stm32f4xx_hal_uart.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
diff --git a/Standard_robot/MDK-ARM/Standard_robot.uvprojx b/Standard_robot/MDK-ARM/Standard_robot.uvprojx
index cf9749d..63a6268 100644
--- a/Standard_robot/MDK-ARM/Standard_robot.uvprojx
+++ b/Standard_robot/MDK-ARM/Standard_robot.uvprojx
@@ -338,7 +338,7 @@
<MiscControls></MiscControls>
<Define>USE_HAL_DRIVER,STM32F427xx,USE_HAL_DRIVER,STM32F427xx</Define>
<Undefine></Undefine>
- <IncludePath>../Inc;../Drivers/STM32F4xx_HAL_Driver/Inc;../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy;../Drivers/CMSIS/Device/ST/STM32F4xx/Include;../Drivers/CMSIS/Include;../BSP/Algorithm;../BSP/Controller;../BSP/Device;../BSP/Driver;../BSP/Modules</IncludePath>
+ <IncludePath>../Inc; ../Drivers/STM32F4xx_HAL_Driver/Inc; ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy; ../Drivers/CMSIS/Device/ST/STM32F4xx/Include; ../Drivers/CMSIS/Include; ../BSP/Algorithm; ../BSP/Controller; ../BSP/Device; ../BSP/Driver; ../BSP/Modules</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -392,6 +392,11 @@
<Group>
<GroupName>Application/User</GroupName>
<Files>
+ <File>
+ <FileName>Remote_Control.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\demo610\Src\Remote_Control.c</FilePath>
+ </File>
<File>
<FileName>main.c</FileName>
<FileType>1</FileType>
@@ -407,6 +412,11 @@
<FileType>1</FileType>
<FilePath>../Src/adc.c</FilePath>
</File>
+ <File>
+ <FileName>can.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../Src/can.c</FilePath>
+ </File>
<File>
<FileName>dma.c</FileName>
<FileType>1</FileType>
@@ -417,6 +427,11 @@
<FileType>1</FileType>
<FilePath>../Src/spi.c</FilePath>
</File>
+ <File>
+ <FileName>tim.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../Src/tim.c</FilePath>
+ </File>
<File>
<FileName>usart.c</FileName>
<FileType>1</FileType>
@@ -432,105 +447,10 @@
<FileType>1</FileType>
<FilePath>../Src/stm32f4xx_hal_msp.c</FilePath>
</File>
- </Files>
- </Group>
- <Group>
- <GroupName>Drivers/STM32F4xx_HAL_Driver</GroupName>
- <Files>
- <File>
- <FileName>stm32f4xx_hal_adc.c</FileName>
- <FileType>1</FileType>
- <FilePath>../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_adc.c</FilePath>
- </File>
- <File>
- <FileName>stm32f4xx_hal_adc_ex.c</FileName>
- <FileType>1</FileType>
- <FilePath>../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_adc_ex.c</FilePath>
- </File>
- <File>
- <FileName>stm32f4xx_hal_spi.c</FileName>
- <FileType>1</FileType>
- <FilePath>../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c</FilePath>
- </File>
- <File>
- <FileName>stm32f4xx_hal_tim.c</FileName>
- <FileType>1</FileType>
- <FilePath>../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c</FilePath>
- </File>
- <File>
- <FileName>stm32f4xx_hal_tim_ex.c</FileName>
- <FileType>1</FileType>
- <FilePath>../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c</FilePath>
- </File>
- <File>
- <FileName>stm32f4xx_hal_uart.c</FileName>
- <FileType>1</FileType>
- <FilePath>../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c</FilePath>
- </File>
- <File>
- <FileName>stm32f4xx_hal_rcc.c</FileName>
- <FileType>1</FileType>
- <FilePath>../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c</FilePath>
- </File>
- <File>
- <FileName>stm32f4xx_hal_rcc_ex.c</FileName>
- <FileType>1</FileType>
- <FilePath>../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c</FilePath>
- </File>
- <File>
- <FileName>stm32f4xx_hal_flash.c</FileName>
- <FileType>1</FileType>
- <FilePath>../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c</FilePath>
- </File>
- <File>
- <FileName>stm32f4xx_hal_flash_ex.c</FileName>
- <FileType>1</FileType>
- <FilePath>../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c</FilePath>
- </File>
<File>
- <FileName>stm32f4xx_hal_flash_ramfunc.c</FileName>
- <FileType>1</FileType>
- <FilePath>../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c</FilePath>
- </File>
- <File>
- <FileName>stm32f4xx_hal_gpio.c</FileName>
- <FileType>1</FileType>
- <FilePath>../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c</FilePath>
- </File>
- <File>
- <FileName>stm32f4xx_hal_dma_ex.c</FileName>
- <FileType>1</FileType>
- <FilePath>../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c</FilePath>
- </File>
- <File>
- <FileName>stm32f4xx_hal_dma.c</FileName>
+ <FileName>stm32f4xx_hal_timebase_tim.c</FileName>
<FileType>1</FileType>
- <FilePath>../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c</FilePath>
- </File>
- <File>
- <FileName>stm32f4xx_hal_pwr.c</FileName>
- <FileType>1</FileType>
- <FilePath>../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c</FilePath>
- </File>
- <File>
- <FileName>stm32f4xx_hal_pwr_ex.c</FileName>
- <FileType>1</FileType>
- <FilePath>../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c</FilePath>
- </File>
- <File>
- <FileName>stm32f4xx_hal_cortex.c</FileName>
- <FileType>1</FileType>
- <FilePath>../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c</FilePath>
- </File>
- <File>
- <FileName>stm32f4xx_hal.c</FileName>
- <FileType>1</FileType>
- <FilePath>../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c</FilePath>
- </File>
- <File>
- <FileName>stm32f4xx_hal_exti.c</FileName>
- <FileType>1</FileType>
- <FilePath>../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c</FilePath>
+ <FilePath>../Src/stm32f4xx_hal_timebase_tim.c</FilePath>
</File>
</Files>
</Group>
@@ -557,6 +477,11 @@
<FileType>1</FileType>
<FilePath>..\BSP\Driver\bsp_oled.c</FilePath>
</File>
+ <File>
+ <FileName>Remote_Control.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\Src\Remote_Control.c</FilePath>
+ </File>
</Files>
</Group>
<Group>
@@ -638,6 +563,111 @@
</File>
</Files>
</Group>
+ <Group>
+ <GroupName>Drivers/STM32F4xx_HAL_Driver</GroupName>
+ <Files>
+ <File>
+ <FileName>stm32f4xx_hal_adc.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_adc.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32f4xx_hal_adc_ex.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_adc_ex.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32f4xx_hal_rcc.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32f4xx_hal_rcc_ex.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32f4xx_hal_flash.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32f4xx_hal_flash_ex.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32f4xx_hal_flash_ramfunc.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32f4xx_hal_gpio.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32f4xx_hal_dma_ex.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32f4xx_hal_dma.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32f4xx_hal_pwr.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32f4xx_hal_pwr_ex.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32f4xx_hal_cortex.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32f4xx_hal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32f4xx_hal_exti.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32f4xx_hal_can.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_can.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32f4xx_hal_spi.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32f4xx_hal_tim.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32f4xx_hal_tim_ex.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32f4xx_hal_uart.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c</FilePath>
+ </File>
+ </Files>
+ </Group>
<Group>
<GroupName>::CMSIS</GroupName>
</Group>
diff --git a/Standard_robot/Src/Remote_Control.c b/Standard_robot/Src/Remote_Control.c
index 48219f4..25803f2 100644
--- a/Standard_robot/Src/Remote_Control.c
+++ b/Standard_robot/Src/Remote_Control.c
@@ -12,13 +12,15 @@
*/
#include "Remote_Control.h"
+#define LED2_Pin GPIO_PIN_7
+#define LED2_GPIO_Port GPIOE
RC_Type remote_control;
uint32_t Latest_Remote_Control_Pack_Time = 0;
uint32_t LED_Flash_Timer_remote_control = 0;
/*******************************************************************************************
* @Func void Callback_RC_Handle(RC_Type* rc, uint8_t* buff)
- * @Brief DR16½ÓÊÕ»úÐÒé½âÂë³ÌÐò
- * @Param RC_Type* rc¡¡´æ´¢Ò£¿ØÆ÷Êý¾ÝµÄ½á¹¹Ìå¡¡¡¡uint8_t* buff¡¡ÓÃÓÚ½âÂëµÄ»º´æ
+ * @Brief DR16���ջ�Ð��������
+ * @Param RC_Type* rc���洢ң�������ݵĽṹ�塡��uint8_t* buff�����ڽ���Ļ���
* @Retval None
* @Date
*******************************************************************************************/
@@ -65,8 +67,8 @@ int16_t HighTime;
/*******************************************************************************************
* @Func void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim)
- * @Brief PWM½ÓÊÕ»úÂö¿í¼ÆËã
- * @Param TIM_HandleTypeDef *htim ÓÃÓÚ²âÁ¿PWMÂö¿íµÄ¶¨Ê±Æ÷¡£
+ * @Brief PWM���ջ���������
+ * @Param TIM_HandleTypeDef *htim ���ڲ���PWM�����Ķ�ʱ����
* @Retval None
* @Date
*******************************************************************************************/
diff --git a/Standard_robot/Src/can.c b/Standard_robot/Src/can.c
index 637dccf..28f94c9 100644
--- a/Standard_robot/Src/can.c
+++ b/Standard_robot/Src/can.c
@@ -4,42 +4,21 @@
* Description : This file provides code for the configuration
* of the CAN instances.
******************************************************************************
- ** This notice applies to any and all portions of this file
- * that are not between comment pairs USER CODE BEGIN and
- * USER CODE END. Other portions of this file, whether
- * inserted by the user or by software development tools
- * are owned by their respective copyright owners.
+ * @attention
*
- * COPYRIGHT(c) 2018 STMicroelectronics
+ * <h2><center>© Copyright (c) 2020 STMicroelectronics.
+ * All rights reserved.</center></h2>
*
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "can.h"
-
#include "gpio.h"
/* USER CODE BEGIN 0 */
@@ -55,18 +34,18 @@ void MX_CAN1_Init(void)
hcan1.Instance = CAN1;
hcan1.Init.Prescaler = 3;
hcan1.Init.Mode = CAN_MODE_NORMAL;
- hcan1.Init.SJW = CAN_SJW_1TQ;
- hcan1.Init.BS1 = CAN_BS1_9TQ;
- hcan1.Init.BS2 = CAN_BS2_4TQ;
- hcan1.Init.TTCM = DISABLE;
- hcan1.Init.ABOM = ENABLE;
- hcan1.Init.AWUM = DISABLE;
- hcan1.Init.NART = DISABLE;
- hcan1.Init.RFLM = DISABLE;
- hcan1.Init.TXFP = DISABLE;
+ hcan1.Init.SyncJumpWidth = CAN_SJW_1TQ;
+ hcan1.Init.TimeSeg1 = CAN_BS1_9TQ;
+ hcan1.Init.TimeSeg2 = CAN_BS2_4TQ;
+ hcan1.Init.TimeTriggeredMode = DISABLE;
+ hcan1.Init.AutoBusOff = ENABLE;
+ hcan1.Init.AutoWakeUp = DISABLE;
+ hcan1.Init.AutoRetransmission = DISABLE;
+ hcan1.Init.ReceiveFifoLocked = DISABLE;
+ hcan1.Init.TransmitFifoPriority = DISABLE;
if (HAL_CAN_Init(&hcan1) != HAL_OK)
{
- _Error_Handler(__FILE__, __LINE__);
+ Error_Handler();
}
}
@@ -74,7 +53,7 @@ void MX_CAN1_Init(void)
void HAL_CAN_MspInit(CAN_HandleTypeDef* canHandle)
{
- GPIO_InitTypeDef GPIO_InitStruct;
+ GPIO_InitTypeDef GPIO_InitStruct = {0};
if(canHandle->Instance==CAN1)
{
/* USER CODE BEGIN CAN1_MspInit 0 */
@@ -83,6 +62,7 @@ void HAL_CAN_MspInit(CAN_HandleTypeDef* canHandle)
/* CAN1 clock enable */
__HAL_RCC_CAN1_CLK_ENABLE();
+ __HAL_RCC_GPIOD_CLK_ENABLE();
/**CAN1 GPIO Configuration
PD0 ------> CAN1_RX
PD1 ------> CAN1_TX
@@ -94,11 +74,6 @@ void HAL_CAN_MspInit(CAN_HandleTypeDef* canHandle)
GPIO_InitStruct.Alternate = GPIO_AF9_CAN1;
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
- /* CAN1 interrupt Init */
- HAL_NVIC_SetPriority(CAN1_TX_IRQn, 0, 0);
- HAL_NVIC_EnableIRQ(CAN1_TX_IRQn);
- HAL_NVIC_SetPriority(CAN1_RX0_IRQn, 0, 0);
- HAL_NVIC_EnableIRQ(CAN1_RX0_IRQn);
/* USER CODE BEGIN CAN1_MspInit 1 */
/* USER CODE END CAN1_MspInit 1 */
@@ -122,9 +97,6 @@ void HAL_CAN_MspDeInit(CAN_HandleTypeDef* canHandle)
*/
HAL_GPIO_DeInit(GPIOD, GPIO_PIN_0|GPIO_PIN_1);
- /* CAN1 interrupt Deinit */
- HAL_NVIC_DisableIRQ(CAN1_TX_IRQn);
- HAL_NVIC_DisableIRQ(CAN1_RX0_IRQn);
/* USER CODE BEGIN CAN1_MspDeInit 1 */
/* USER CODE END CAN1_MspDeInit 1 */
@@ -133,21 +105,13 @@ void HAL_CAN_MspDeInit(CAN_HandleTypeDef* canHandle)
/* USER CODE BEGIN 1 */
-/* CAN×ÜÏß´íÎó»Øµ÷º¯Êý£¬ÕâÀï·¢ÉúCAN×ÜÏß´íÎóºó±ØÐëÖØÆô½ÓÊÕÖжϣ¬·ñÔò»áµ¼ÖÂCAN½ÓÊÕÒì³£ >*/
+/* CAN���ߴ���ص����������﷢��CAN���ߴ����������������жϣ�����ᵼ��CAN�����쳣 >*/
void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan)
{
- __HAL_CAN_ENABLE_IT(&hcan1, CAN_IT_FMP0);
+ __HAL_CAN_ENABLE_IT(&hcan1, CAN_IT_RX_FIFO0_MSG_PENDING);
}
/* USER CODE END 1 */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Standard_robot/Src/dma.c b/Standard_robot/Src/dma.c
index 2da0273..25e0430 100644
--- a/Standard_robot/Src/dma.c
+++ b/Standard_robot/Src/dma.c
@@ -45,6 +45,9 @@ void MX_DMA_Init(void)
/* DMA2_Stream2_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA2_Stream2_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(DMA2_Stream2_IRQn);
+ /* DMA2_Stream6_IRQn interrupt configuration */
+ HAL_NVIC_SetPriority(DMA2_Stream6_IRQn, 0, 0);
+ HAL_NVIC_EnableIRQ(DMA2_Stream6_IRQn);
}
diff --git a/Standard_robot/Src/gpio.c b/Standard_robot/Src/gpio.c
index 445c3db..8eee45e 100644
--- a/Standard_robot/Src/gpio.c
+++ b/Standard_robot/Src/gpio.c
@@ -43,57 +43,60 @@ void MX_GPIO_Init(void)
GPIO_InitTypeDef GPIO_InitStruct = {0};
/* GPIO Ports Clock Enable */
- // __HAL_RCC_GPIOB_CLK_ENABLE();
- // __HAL_RCC_GPIOA_CLK_ENABLE();
- // __HAL_RCC_GPIOH_CLK_ENABLE();
- // __HAL_RCC_GPIOG_CLK_ENABLE();
-
- __HAL_RCC_GPIOA_CLK_ENABLE();
__HAL_RCC_GPIOB_CLK_ENABLE();
+ __HAL_RCC_GPIOA_CLK_ENABLE();
__HAL_RCC_GPIOD_CLK_ENABLE();
__HAL_RCC_GPIOH_CLK_ENABLE();
+ __HAL_RCC_GPIOG_CLK_ENABLE();
__HAL_RCC_GPIOE_CLK_ENABLE();
__HAL_RCC_GPIOF_CLK_ENABLE();
+
+ /*Configure GPIO pin Output Level */
+ HAL_GPIO_WritePin(GPIOB, OLED_DC_Pin|OLED_RST_Pin, GPIO_PIN_RESET);
+
+ /*Configure GPIO pin Output Level */
+ HAL_GPIO_WritePin(LED_A_GPIO_Port, LED_A_Pin, GPIO_PIN_RESET);
+
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(LED1_GPIO_Port, LED1_Pin, GPIO_PIN_RESET);
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin, GPIO_PIN_RESET);
-/*Configure GPIO pin : PtPin */
+ /*Configure GPIO pins : PBPin PBPin */
+ GPIO_InitStruct.Pin = OLED_DC_Pin|OLED_RST_Pin;
+ GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+ /*Configure GPIO pin : PtPin */
+ GPIO_InitStruct.Pin = LED_A_Pin;
+ GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ HAL_GPIO_Init(LED_A_GPIO_Port, &GPIO_InitStruct);
+
+ /*Configure GPIO pin : PtPin */
GPIO_InitStruct.Pin = KEY_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
GPIO_InitStruct.Pull = GPIO_NOPULL;
HAL_GPIO_Init(KEY_GPIO_Port, &GPIO_InitStruct);
-/*Configure GPIO pin : PtPin */
+ /*Configure GPIO pin : PtPin */
GPIO_InitStruct.Pin = LED1_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(LED1_GPIO_Port, &GPIO_InitStruct);
- /*Configure GPIO pin : PtPin */
+ /*Configure GPIO pin : PtPin */
GPIO_InitStruct.Pin = LED2_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(LED2_GPIO_Port, &GPIO_InitStruct);
- /*Configure GPIO pins : PBPin PBPin */
- // GPIO_InitStruct.Pin = OLED_DC_Pin|OLED_RST_Pin;
- // GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- // GPIO_InitStruct.Pull = GPIO_NOPULL;
- // GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- // HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
-
- /*Configure GPIO pin : PtPin */
- // GPIO_InitStruct.Pin = LED_A_Pin;
- // GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- // GPIO_InitStruct.Pull = GPIO_NOPULL;
- // GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- // HAL_GPIO_Init(LED_A_GPIO_Port, &GPIO_InitStruct);
-
}
/* USER CODE BEGIN 2 */
diff --git a/Standard_robot/Src/main.c b/Standard_robot/Src/main.c
index 1c5715f..e614e5e 100644
--- a/Standard_robot/Src/main.c
+++ b/Standard_robot/Src/main.c
@@ -20,8 +20,9 @@
/* Includes ------------------------------------------------------------------*/
#include "main.h"
-#include "stm32f4xx_hal.h"
#include "adc.h"
+#include "stm32f4xx_hal.h"
+#include "can.h"
#include "dma.h"
#include "spi.h"
#include "tim.h"
@@ -140,15 +141,14 @@ int main(void)
/* Initialize all configured peripherals */
MX_GPIO_Init();
MX_DMA_Init();
- MX_CAN1_Init();
MX_USART1_UART_Init();
- MX_TIM1_Init();
-
MX_ADC1_Init();
MX_SPI1_Init();
+ MX_CAN1_Init();
+ MX_TIM1_Init();
/* USER CODE BEGIN 2 */
my_can_filter_init_recv_all(&hcan1);
- HAL_CAN_Receive_IT(&hcan1, CAN_FIFO0);
+ HAL_CAN_Receive_IT(&hcan1, CAN_RX_FIFO0);
HAL_UART_Receive_IT_IDLE(&huart1,UART_Buffer,100);
HAL_TIM_IC_Start_DMA(&htim1,TIM_CHANNEL_2,(uint32_t *)TIM_COUNT,2);
@@ -199,8 +199,8 @@ int main(void)
motor_pid[3].output);
/* USER CODE END WHILE */
-
- /* USER CODE BEGIN 3 */
+
+ /* USER CODE BEGIN 3 */
oled_print_button(1, 1);
HAL_Delay(10);
@@ -248,17 +248,6 @@ void SystemClock_Config(void)
{
Error_Handler();
}
-
- /**Configure the Systick interrupt time
- */
- HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq()/1000);
-
- /**Configure the Systick
- */
- HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK);
-
- /* SysTick_IRQn interrupt configuration */
- HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0);
}
/* USER CODE BEGIN 4 */
@@ -275,15 +264,15 @@ void SystemClock_Config(void)
*/
void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
{
-/* USER CODE BEGIN Callback 0 */
+ /* USER CODE BEGIN Callback 0 */
-/* USER CODE END Callback 0 */
+ /* USER CODE END Callback 0 */
if (htim->Instance == TIM6) {
HAL_IncTick();
}
-/* USER CODE BEGIN Callback 1 */
+ /* USER CODE BEGIN Callback 1 */
-/* USER CODE END Callback 1 */
+ /* USER CODE END Callback 1 */
}
/**
diff --git a/Standard_robot/Src/stm32f4xx_hal_msp.c b/Standard_robot/Src/stm32f4xx_hal_msp.c
index 4dcc80d..db50988 100644
--- a/Standard_robot/Src/stm32f4xx_hal_msp.c
+++ b/Standard_robot/Src/stm32f4xx_hal_msp.c
@@ -21,8 +21,6 @@
/* Includes ------------------------------------------------------------------*/
#include "main.h"
-#include "stm32f4xx_hal.h"
-extern void _Error_Handler(void);
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
@@ -69,25 +67,11 @@ void HAL_MspInit(void)
/* USER CODE END MspInit 0 */
- HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
- // __HAL_RCC_SYSCFG_CLK_ENABLE();
- // __HAL_RCC_PWR_CLK_ENABLE();
+ __HAL_RCC_SYSCFG_CLK_ENABLE();
+ __HAL_RCC_PWR_CLK_ENABLE();
/* System interrupt init*/
- /* MemoryManagement_IRQn interrupt configuration */
- HAL_NVIC_SetPriority(MemoryManagement_IRQn, 0, 0);
- /* BusFault_IRQn interrupt configuration */
- HAL_NVIC_SetPriority(BusFault_IRQn, 0, 0);
- /* UsageFault_IRQn interrupt configuration */
- HAL_NVIC_SetPriority(UsageFault_IRQn, 0, 0);
- /* SVCall_IRQn interrupt configuration */
- HAL_NVIC_SetPriority(SVCall_IRQn, 0, 0);
- /* DebugMonitor_IRQn interrupt configuration */
- HAL_NVIC_SetPriority(DebugMonitor_IRQn, 0, 0);
- /* PendSV_IRQn interrupt configuration */
- HAL_NVIC_SetPriority(PendSV_IRQn, 0, 0);
- /* SysTick_IRQn interrupt configuration */
- HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0);
+
/* USER CODE BEGIN MspInit 1 */
/* USER CODE END MspInit 1 */
diff --git a/Standard_robot/Src/stm32f4xx_hal_timebase_tim.c b/Standard_robot/Src/stm32f4xx_hal_timebase_tim.c
new file mode 100644
index 0000000..ffb8b0b
--- /dev/null
+++ b/Standard_robot/Src/stm32f4xx_hal_timebase_tim.c
@@ -0,0 +1,114 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32f4xx_hal_timebase_TIM.c
+ * @brief HAL time base based on the hardware TIM.
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>© Copyright (c) 2020 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f4xx_hal.h"
+#include "stm32f4xx_hal_tim.h"
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+TIM_HandleTypeDef htim6;
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/**
+ * @brief This function configures the TIM6 as a time base source.
+ * The time source is configured to have 1ms time base with a dedicated
+ * Tick interrupt priority.
+ * @note This function is called automatically at the beginning of program after
+ * reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig().
+ * @param TickPriority: Tick interrupt priority.
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
+{
+ RCC_ClkInitTypeDef clkconfig;
+ uint32_t uwTimclock = 0;
+ uint32_t uwPrescalerValue = 0;
+ uint32_t pFLatency;
+
+ /*Configure the TIM6 IRQ priority */
+ HAL_NVIC_SetPriority(TIM6_DAC_IRQn, TickPriority ,0);
+
+ /* Enable the TIM6 global Interrupt */
+ HAL_NVIC_EnableIRQ(TIM6_DAC_IRQn);
+
+ /* Enable TIM6 clock */
+ __HAL_RCC_TIM6_CLK_ENABLE();
+
+ /* Get clock configuration */
+ HAL_RCC_GetClockConfig(&clkconfig, &pFLatency);
+
+ /* Compute TIM6 clock */
+ uwTimclock = 2*HAL_RCC_GetPCLK1Freq();
+
+ /* Compute the prescaler value to have TIM6 counter clock equal to 1MHz */
+ uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000) - 1);
+
+ /* Initialize TIM6 */
+ htim6.Instance = TIM6;
+
+ /* Initialize TIMx peripheral as follow:
+ + Period = [(TIM6CLK/1000) - 1]. to have a (1/1000) s time base.
+ + Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock.
+ + ClockDivision = 0
+ + Counter direction = Up
+ */
+ htim6.Init.Period = (1000000 / 1000) - 1;
+ htim6.Init.Prescaler = uwPrescalerValue;
+ htim6.Init.ClockDivision = 0;
+ htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
+ if(HAL_TIM_Base_Init(&htim6) == HAL_OK)
+ {
+ /* Start the TIM time Base generation in interrupt mode */
+ return HAL_TIM_Base_Start_IT(&htim6);
+ }
+
+ /* Return function status */
+ return HAL_ERROR;
+}
+
+/**
+ * @brief Suspend Tick increment.
+ * @note Disable the tick increment by disabling TIM6 update interrupt.
+ * @param None
+ * @retval None
+ */
+void HAL_SuspendTick(void)
+{
+ /* Disable TIM6 update Interrupt */
+ __HAL_TIM_DISABLE_IT(&htim6, TIM_IT_UPDATE);
+}
+
+/**
+ * @brief Resume Tick increment.
+ * @note Enable the tick increment by Enabling TIM6 update interrupt.
+ * @param None
+ * @retval None
+ */
+void HAL_ResumeTick(void)
+{
+ /* Enable TIM6 Update interrupt */
+ __HAL_TIM_ENABLE_IT(&htim6, TIM_IT_UPDATE);
+}
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Standard_robot/Src/stm32f4xx_it.c b/Standard_robot/Src/stm32f4xx_it.c
index 30d6468..c786fcd 100644
--- a/Standard_robot/Src/stm32f4xx_it.c
+++ b/Standard_robot/Src/stm32f4xx_it.c
@@ -21,7 +21,6 @@
/* Includes ------------------------------------------------------------------*/
#include "main.h"
#include "stm32f4xx_it.h"
-#include "stm32f4xx.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
#include "usart.h"
@@ -58,11 +57,9 @@
/* USER CODE END 0 */
/* External variables --------------------------------------------------------*/
-extern CAN_HandleTypeDef hcan1;
extern DMA_HandleTypeDef hdma_tim1_ch1_ch2_ch3;
extern DMA_HandleTypeDef hdma_usart1_rx;
extern UART_HandleTypeDef huart1;
-
extern TIM_HandleTypeDef htim6;
/* USER CODE BEGIN EV */
@@ -192,7 +189,7 @@ void SysTick_Handler(void)
/* USER CODE BEGIN SysTick_IRQn 0 */
/* USER CODE END SysTick_IRQn 0 */
- HAL_SYSTICK_IRQHandler();
+
/* USER CODE BEGIN SysTick_IRQn 1 */
/* USER CODE END SysTick_IRQn 1 */
@@ -204,34 +201,7 @@ void SysTick_Handler(void)
/* For the available peripheral interrupt handler names, */
/* please refer to the startup file (startup_stm32f4xx.s). */
/******************************************************************************/
-/**
-* @brief This function handles CAN1 TX interrupts.
-*/
-void CAN1_TX_IRQHandler(void)
-{
- /* USER CODE BEGIN CAN1_TX_IRQn 0 */
-
- /* USER CODE END CAN1_TX_IRQn 0 */
- HAL_CAN_IRQHandler(&hcan1);
- /* USER CODE BEGIN CAN1_TX_IRQn 1 */
-
- /* USER CODE END CAN1_TX_IRQn 1 */
-}
-/**
-* @brief This function handles CAN1 RX0 interrupts.
-*/
-void CAN1_RX0_IRQHandler(void)
-{
- /* USER CODE BEGIN CAN1_RX0_IRQn 0 */
-
- /* USER CODE END CAN1_RX0_IRQn 0 */
- HAL_CAN_IRQHandler(&hcan1);
- /* USER CODE BEGIN CAN1_RX0_IRQn 1 */
-
- /*#### add enable can it again to solve can receive only one ID problem!!!####**/
- /* USER CODE END CAN1_RX0_IRQn 1 */
-}
/**
* @brief This function handles USART1 global interrupt.
*/
@@ -240,15 +210,15 @@ void USART1_IRQHandler(void)
/* USER CODE BEGIN USART1_IRQn 0 */
/* USER CODE END USART1_IRQn 0 */
- HAL_UART_IDLE_IRQHandler(&huart1);
+ HAL_UART_IRQHandler(&huart1);
/* USER CODE BEGIN USART1_IRQn 1 */
/* USER CODE END USART1_IRQn 1 */
}
/**
-* @brief This function handles TIM6 global interrupt, DAC1 and DAC2 underrun error interrupts.
-*/
+ * @brief This function handles TIM6 global interrupt, DAC1 and DAC2 underrun error interrupts.
+ */
void TIM6_DAC_IRQHandler(void)
{
/* USER CODE BEGIN TIM6_DAC_IRQn 0 */
@@ -261,7 +231,7 @@ void TIM6_DAC_IRQHandler(void)
}
/**
- * @brief This function handles DMA2 stream7 global interrupt.
+ * @brief This function handles DMA2 stream2 global interrupt.
*/
void DMA2_Stream2_IRQHandler(void)
{
@@ -275,8 +245,8 @@ void DMA2_Stream2_IRQHandler(void)
}
/**
-* @brief This function handles DMA2 stream6 global interrupt.
-*/
+ * @brief This function handles DMA2 stream6 global interrupt.
+ */
void DMA2_Stream6_IRQHandler(void)
{
/* USER CODE BEGIN DMA2_Stream6_IRQn 0 */
diff --git a/Standard_robot/Src/tim.c b/Standard_robot/Src/tim.c
index b73f558..2bee8dc 100644
--- a/Standard_robot/Src/tim.c
+++ b/Standard_robot/Src/tim.c
@@ -4,35 +4,15 @@
* Description : This file provides code for the configuration
* of the TIM instances.
******************************************************************************
- ** This notice applies to any and all portions of this file
- * that are not between comment pairs USER CODE BEGIN and
- * USER CODE END. Other portions of this file, whether
- * inserted by the user or by software development tools
- * are owned by their respective copyright owners.
+ * @attention
*
- * COPYRIGHT(c) 2018 STMicroelectronics
+ * <h2><center>© Copyright (c) 2020 STMicroelectronics.
+ * All rights reserved.</center></h2>
*
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
@@ -40,9 +20,6 @@
/* Includes ------------------------------------------------------------------*/
#include "tim.h"
-#include "gpio.h"
-#include "dma.h"
-
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
@@ -53,8 +30,8 @@ DMA_HandleTypeDef hdma_tim1_ch1_ch2_ch3;
/* TIM1 init function */
void MX_TIM1_Init(void)
{
- TIM_MasterConfigTypeDef sMasterConfig;
- TIM_IC_InitTypeDef sConfigIC;
+ TIM_MasterConfigTypeDef sMasterConfig = {0};
+ TIM_IC_InitTypeDef sConfigIC = {0};
htim1.Instance = TIM1;
htim1.Init.Prescaler = 9;
@@ -62,44 +39,40 @@ void MX_TIM1_Init(void)
htim1.Init.Period = 9999;
htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
htim1.Init.RepetitionCounter = 0;
+ htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
if (HAL_TIM_IC_Init(&htim1) != HAL_OK)
{
- _Error_Handler(__FILE__, __LINE__);
+ Error_Handler();
}
-
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK)
{
- _Error_Handler(__FILE__, __LINE__);
+ Error_Handler();
}
-
sConfigIC.ICPolarity = TIM_INPUTCHANNELPOLARITY_RISING;
sConfigIC.ICSelection = TIM_ICSELECTION_INDIRECTTI;
sConfigIC.ICPrescaler = TIM_ICPSC_DIV1;
sConfigIC.ICFilter = 0;
if (HAL_TIM_IC_ConfigChannel(&htim1, &sConfigIC, TIM_CHANNEL_1) != HAL_OK)
{
- _Error_Handler(__FILE__, __LINE__);
+ Error_Handler();
}
-
sConfigIC.ICPolarity = TIM_INPUTCHANNELPOLARITY_BOTHEDGE;
sConfigIC.ICSelection = TIM_ICSELECTION_DIRECTTI;
if (HAL_TIM_IC_ConfigChannel(&htim1, &sConfigIC, TIM_CHANNEL_2) != HAL_OK)
{
- _Error_Handler(__FILE__, __LINE__);
+ Error_Handler();
}
-
sConfigIC.ICPolarity = TIM_INPUTCHANNELPOLARITY_RISING;
if (HAL_TIM_IC_ConfigChannel(&htim1, &sConfigIC, TIM_CHANNEL_3) != HAL_OK)
{
- _Error_Handler(__FILE__, __LINE__);
+ Error_Handler();
}
-
sConfigIC.ICSelection = TIM_ICSELECTION_INDIRECTTI;
if (HAL_TIM_IC_ConfigChannel(&htim1, &sConfigIC, TIM_CHANNEL_4) != HAL_OK)
{
- _Error_Handler(__FILE__, __LINE__);
+ Error_Handler();
}
}
@@ -107,7 +80,7 @@ void MX_TIM1_Init(void)
void HAL_TIM_IC_MspInit(TIM_HandleTypeDef* tim_icHandle)
{
- GPIO_InitTypeDef GPIO_InitStruct;
+ GPIO_InitTypeDef GPIO_InitStruct = {0};
if(tim_icHandle->Instance==TIM1)
{
/* USER CODE BEGIN TIM1_MspInit 0 */
@@ -116,6 +89,8 @@ void HAL_TIM_IC_MspInit(TIM_HandleTypeDef* tim_icHandle)
/* TIM1 clock enable */
__HAL_RCC_TIM1_CLK_ENABLE();
+ __HAL_RCC_GPIOA_CLK_ENABLE();
+ __HAL_RCC_GPIOE_CLK_ENABLE();
/**TIM1 GPIO Configuration
PA9 ------> TIM1_CH2
PE13 ------> TIM1_CH3
@@ -143,12 +118,12 @@ void HAL_TIM_IC_MspInit(TIM_HandleTypeDef* tim_icHandle)
hdma_tim1_ch1_ch2_ch3.Init.MemInc = DMA_MINC_ENABLE;
hdma_tim1_ch1_ch2_ch3.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
hdma_tim1_ch1_ch2_ch3.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
- hdma_tim1_ch1_ch2_ch3.Init.Mode = DMA_CIRCULAR;
+ hdma_tim1_ch1_ch2_ch3.Init.Mode = DMA_NORMAL;
hdma_tim1_ch1_ch2_ch3.Init.Priority = DMA_PRIORITY_LOW;
hdma_tim1_ch1_ch2_ch3.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
if (HAL_DMA_Init(&hdma_tim1_ch1_ch2_ch3) != HAL_OK)
{
- _Error_Handler(__FILE__, __LINE__);
+ Error_Handler();
}
/* Several peripheral DMA handle pointers point to the same DMA handle.
@@ -196,12 +171,4 @@ void HAL_TIM_IC_MspDeInit(TIM_HandleTypeDef* tim_icHandle)
/* USER CODE END 1 */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Standard_robot/Src/usart.c b/Standard_robot/Src/usart.c
index 2db06b1..5b9ce57 100644
--- a/Standard_robot/Src/usart.c
+++ b/Standard_robot/Src/usart.c
@@ -20,10 +20,6 @@
/* Includes ------------------------------------------------------------------*/
#include "usart.h"
-#include "gpio.h"
-#include "dma.h"
-
-
/* USER CODE BEGIN 0 */
#include "Remote_Control.h"
uint8_t UART_Buffer[100];
@@ -39,10 +35,10 @@ void MX_USART1_UART_Init(void)
{
huart1.Instance = USART1;
- huart1.Init.BaudRate = 100000;
+ huart1.Init.BaudRate = 100000;
huart1.Init.WordLength = UART_WORDLENGTH_8B;
huart1.Init.StopBits = UART_STOPBITS_1;
- huart1.Init.Parity = UART_PARITY_EVEN;
+ huart1.Init.Parity = UART_PARITY_EVEN;
huart1.Init.Mode = UART_MODE_TX_RX;
huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
huart1.Init.OverSampling = UART_OVERSAMPLING_16;
@@ -65,7 +61,7 @@ void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
/* USART1 clock enable */
__HAL_RCC_USART1_CLK_ENABLE();
- // __HAL_RCC_GPIOB_CLK_ENABLE();
+ __HAL_RCC_GPIOB_CLK_ENABLE();
/**USART1 GPIO Configuration
PB7 ------> USART1_RX
PB6 ------> USART1_TX
@@ -78,10 +74,10 @@ void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
/* USART1 DMA Init */
- /* USART1_TX Init */
+ /* USART1_RX Init */
hdma_usart1_rx.Instance = DMA2_Stream2;
hdma_usart1_rx.Init.Channel = DMA_CHANNEL_4;
- hdma_usart1_rx.Init.Direction = DMA_MEMORY_TO_PERIPH;
+ hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE;
hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
diff --git a/Standard_robot/Standard_robot.ioc b/Standard_robot/Standard_robot.ioc
index e669370..e9b3555 100644
--- a/Standard_robot/Standard_robot.ioc
+++ b/Standard_robot/Standard_robot.ioc
@@ -6,46 +6,73 @@ ADC1.NbrOfConversionFlag=1
ADC1.Rank-0\#ChannelRegularConversion=1
ADC1.SamplingTime-0\#ChannelRegularConversion=ADC_SAMPLETIME_3CYCLES
ADC1.master=1
-Dma.Request0=USART1_TX
-Dma.RequestsNb=1
-Dma.USART1_TX.0.Direction=DMA_MEMORY_TO_PERIPH
-Dma.USART1_TX.0.FIFOMode=DMA_FIFOMODE_DISABLE
-Dma.USART1_TX.0.Instance=DMA2_Stream2
-Dma.USART1_TX.0.MemDataAlignment=DMA_MDATAALIGN_BYTE
-Dma.USART1_TX.0.MemInc=DMA_MINC_ENABLE
-Dma.USART1_TX.0.Mode=DMA_NORMAL
-Dma.USART1_TX.0.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
-Dma.USART1_TX.0.PeriphInc=DMA_PINC_DISABLE
-Dma.USART1_TX.0.Priority=DMA_PRIORITY_LOW
-Dma.USART1_TX.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
+CAN1.ABOM=ENABLE
+CAN1.BS1=CAN_BS1_9TQ
+CAN1.BS2=CAN_BS2_4TQ
+CAN1.CalculateTimeQuantum=71.42857142857143
+CAN1.IPParameters=CalculateTimeQuantum,Prescaler,ABOM,BS1,BS2
+CAN1.Prescaler=3
+Dma.Request0=TIM1_CH1/CH2/CH3
+Dma.Request1=USART1_RX
+Dma.RequestsNb=2
+Dma.TIM1_CH1/CH2/CH3.0.Direction=DMA_PERIPH_TO_MEMORY
+Dma.TIM1_CH1/CH2/CH3.0.FIFOMode=DMA_FIFOMODE_DISABLE
+Dma.TIM1_CH1/CH2/CH3.0.Instance=DMA2_Stream6
+Dma.TIM1_CH1/CH2/CH3.0.MemDataAlignment=DMA_MDATAALIGN_HALFWORD
+Dma.TIM1_CH1/CH2/CH3.0.MemInc=DMA_MINC_ENABLE
+Dma.TIM1_CH1/CH2/CH3.0.Mode=DMA_NORMAL
+Dma.TIM1_CH1/CH2/CH3.0.PeriphDataAlignment=DMA_PDATAALIGN_HALFWORD
+Dma.TIM1_CH1/CH2/CH3.0.PeriphInc=DMA_PINC_DISABLE
+Dma.TIM1_CH1/CH2/CH3.0.Priority=DMA_PRIORITY_LOW
+Dma.TIM1_CH1/CH2/CH3.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
+Dma.USART1_RX.1.Direction=DMA_PERIPH_TO_MEMORY
+Dma.USART1_RX.1.FIFOMode=DMA_FIFOMODE_DISABLE
+Dma.USART1_RX.1.Instance=DMA2_Stream2
+Dma.USART1_RX.1.MemDataAlignment=DMA_MDATAALIGN_BYTE
+Dma.USART1_RX.1.MemInc=DMA_MINC_ENABLE
+Dma.USART1_RX.1.Mode=DMA_NORMAL
+Dma.USART1_RX.1.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
+Dma.USART1_RX.1.PeriphInc=DMA_PINC_DISABLE
+Dma.USART1_RX.1.Priority=DMA_PRIORITY_LOW
+Dma.USART1_RX.1.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
File.Version=6
+GPIO.groupedBy=Group By Peripherals
KeepUserPlacement=false
Mcu.Family=STM32F4
Mcu.IP0=ADC1
-Mcu.IP1=DMA
-Mcu.IP2=NVIC
-Mcu.IP3=RCC
-Mcu.IP4=SPI1
-Mcu.IP5=SYS
-Mcu.IP6=USART1
-Mcu.IPNb=7
+Mcu.IP1=CAN1
+Mcu.IP2=DMA
+Mcu.IP3=NVIC
+Mcu.IP4=RCC
+Mcu.IP5=SPI1
+Mcu.IP6=SYS
+Mcu.IP7=TIM1
+Mcu.IP8=USART1
+Mcu.IPNb=9
Mcu.Name=STM32F427I(G-I)Hx
Mcu.Package=UFBGA176
Mcu.Pin0=PB4
Mcu.Pin1=PB3
-Mcu.Pin10=PA6
-Mcu.Pin11=PA7
-Mcu.Pin12=PB10
-Mcu.Pin13=VP_SYS_VS_Systick
+Mcu.Pin10=PH0/OSC_IN
+Mcu.Pin11=PH1/OSC_OUT
+Mcu.Pin12=PG8
+Mcu.Pin13=PE13
+Mcu.Pin14=PD10
+Mcu.Pin15=PA6
+Mcu.Pin16=PA7
+Mcu.Pin17=PF14
+Mcu.Pin18=PE7
+Mcu.Pin19=PB10
Mcu.Pin2=PA14
+Mcu.Pin20=VP_SYS_VS_tim6
Mcu.Pin3=PA13
Mcu.Pin4=PB9
Mcu.Pin5=PB7
Mcu.Pin6=PB6
-Mcu.Pin7=PH0/OSC_IN
-Mcu.Pin8=PH1/OSC_OUT
-Mcu.Pin9=PG8
-Mcu.PinsNb=14
+Mcu.Pin7=PD0
+Mcu.Pin8=PD1
+Mcu.Pin9=PA9
+Mcu.PinsNb=21
Mcu.ThirdPartyNb=0
Mcu.UserConstants=
Mcu.UserName=STM32F427IIHx
@@ -53,7 +80,9 @@ MxCube.Version=5.3.0
MxDb.Version=DB.5.0.30
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.DMA2_Stream2_IRQn=true\:0\:0\:false\:false\:true\:false\:true
+NVIC.DMA2_Stream6_IRQn=true\:0\:0\:false\:false\:true\:false\:true
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false
+NVIC.ForceEnableDMAVector=true
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false
@@ -61,6 +90,9 @@ NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true
+NVIC.TIM6_DAC_IRQn=true\:0\:0\:false\:false\:true\:false\:true
+NVIC.TimeBase=TIM6_DAC_IRQn
+NVIC.TimeBaseIP=TIM6
NVIC.USART1_IRQn=true\:0\:0\:false\:false\:true\:true\:true
NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
PA13.Mode=Serial_Wire
@@ -71,6 +103,7 @@ PA6.Signal=ADCx_IN6
PA7.Locked=true
PA7.Mode=Full_Duplex_Master
PA7.Signal=SPI1_MOSI
+PA9.Signal=S_TIM1_CH2
PB10.GPIOParameters=GPIO_Label
PB10.GPIO_Label=OLED_RST
PB10.Locked=true
@@ -95,6 +128,25 @@ PCC.Seq0=0
PCC.Series=STM32F4
PCC.Temperature=25
PCC.Vdd=3.3
+PD0.Locked=true
+PD0.Mode=Master
+PD0.Signal=CAN1_RX
+PD1.Mode=Master
+PD1.Signal=CAN1_TX
+PD10.GPIOParameters=GPIO_Label
+PD10.GPIO_Label=KEY
+PD10.Locked=true
+PD10.Signal=GPIO_Input
+PE13.Locked=true
+PE13.Signal=S_TIM1_CH3
+PE7.GPIOParameters=GPIO_Label
+PE7.GPIO_Label=LED2
+PE7.Locked=true
+PE7.Signal=GPIO_Output
+PF14.GPIOParameters=GPIO_Label
+PF14.GPIO_Label=LED1
+PF14.Locked=true
+PF14.Signal=GPIO_Output
PG8.GPIOParameters=GPIO_Label
PG8.GPIO_Label=LED_A
PG8.Locked=true
@@ -131,7 +183,7 @@ ProjectManager.StackSize=0x400
ProjectManager.TargetToolchain=MDK-ARM V5
ProjectManager.ToolChainLocation=
ProjectManager.UnderRoot=false
-ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_USART1_UART_Init-USART1-false-HAL-true,4-MX_ADC1_Init-ADC1-false-HAL-true,5-MX_SPI1_Init-SPI1-false-HAL-true
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,3-SystemClock_Config-RCC-false-HAL-false,4-MX_USART1_UART_Init-USART1-false-HAL-true,5-MX_ADC1_Init-ADC1-false-HAL-true,6-MX_SPI1_Init-SPI1-false-HAL-true
RCC.48MHZClocksFreq_Value=84000000
RCC.AHBFreq_Value=168000000
RCC.APB1CLKDivider=RCC_HCLK_DIV4
@@ -172,14 +224,30 @@ RCC.VcooutputI2S=192000000
RCC.VcooutputI2SQ=192000000
SH.ADCx_IN6.0=ADC1_IN6,IN6
SH.ADCx_IN6.ConfNb=1
+SH.S_TIM1_CH2.0=TIM1_CH2,Input_Capture2_from_TI2
+SH.S_TIM1_CH2.1=TIM1_CH2,Input_Capture1_from_TI2
+SH.S_TIM1_CH2.ConfNb=2
+SH.S_TIM1_CH3.0=TIM1_CH3,Input_Capture3_from_TI3
+SH.S_TIM1_CH3.1=TIM1_CH3,Input_Capture4_from_TI3
+SH.S_TIM1_CH3.ConfNb=2
SPI1.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_64
SPI1.CalculateBaudRate=1.3125 MBits/s
SPI1.Direction=SPI_DIRECTION_2LINES
SPI1.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,BaudRatePrescaler
SPI1.Mode=SPI_MODE_MASTER
SPI1.VirtualType=VM_MASTER
-USART1.IPParameters=VirtualMode
+TIM1.Channel-Input_Capture1_from_TI2=TIM_CHANNEL_1
+TIM1.Channel-Input_Capture2_from_TI2=TIM_CHANNEL_2
+TIM1.Channel-Input_Capture3_from_TI3=TIM_CHANNEL_3
+TIM1.Channel-Input_Capture4_from_TI3=TIM_CHANNEL_4
+TIM1.ICPolarity_CH2=TIM_INPUTCHANNELPOLARITY_BOTHEDGE
+TIM1.IPParameters=Channel-Input_Capture2_from_TI2,Channel-Input_Capture1_from_TI2,Channel-Input_Capture3_from_TI3,Channel-Input_Capture4_from_TI3,Period,Prescaler,ICPolarity_CH2
+TIM1.Period=9999
+TIM1.Prescaler=9
+USART1.BaudRate=100000
+USART1.IPParameters=VirtualMode,BaudRate,Parity
+USART1.Parity=PARITY_EVEN
USART1.VirtualMode=VM_ASYNC
-VP_SYS_VS_Systick.Mode=SysTick
-VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+VP_SYS_VS_tim6.Mode=TIM6
+VP_SYS_VS_tim6.Signal=SYS_VS_tim6
board=custom
diff --git a/demo610/Src/Remote_Control.c b/demo610/Src/Remote_Control.c
index 48219f4..d6c3aaa 100644
--- a/demo610/Src/Remote_Control.c
+++ b/demo610/Src/Remote_Control.c
@@ -11,7 +11,8 @@
******************************************************************************
*/
#include "Remote_Control.h"
-
+#define LED2_Pin GPIO_PIN_7
+#define LED2_GPIO_Port GPIOE
RC_Type remote_control;
uint32_t Latest_Remote_Control_Pack_Time = 0;
uint32_t LED_Flash_Timer_remote_control = 0;
diff --git a/demo610/demo.ioc b/demo610/demo.ioc
index 371e557..a3b9793 100644
--- a/demo610/demo.ioc
+++ b/demo610/demo.ioc
@@ -61,26 +61,27 @@ Mcu.PinsNb=14
Mcu.ThirdPartyNb=0
Mcu.UserConstants=
Mcu.UserName=STM32F427IIHx
-MxCube.Version=4.23.0
-MxDb.Version=DB.4.0.230
-NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:true
-NVIC.CAN1_RX0_IRQn=true\:0\:0\:false\:false\:true\:true
-NVIC.CAN1_TX_IRQn=true\:0\:0\:false\:false\:true\:true
-NVIC.DMA2_Stream2_IRQn=true\:0\:0\:false\:false\:true\:true
-NVIC.DMA2_Stream6_IRQn=true\:0\:0\:false\:false\:true\:false
-NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:true
-NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:true
-NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:true
-NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:true
-NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true
+MxCube.Version=5.5.0
+MxDb.Version=DB.5.0.50
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:true\:false
+NVIC.CAN1_RX0_IRQn=true\:0\:0\:false\:false\:true\:true\:true
+NVIC.CAN1_TX_IRQn=true\:0\:0\:false\:false\:true\:true\:true
+NVIC.DMA2_Stream2_IRQn=true\:0\:0\:false\:false\:true\:true\:true
+NVIC.DMA2_Stream6_IRQn=true\:0\:0\:false\:false\:true\:false\:true
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:true\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:true\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:true\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:true\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true\:false
NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
-NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true
-NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true
-NVIC.TIM6_DAC_IRQn=true\:0\:0\:false\:false\:true\:true
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true\:true
+NVIC.TIM6_DAC_IRQn=true\:0\:0\:false\:false\:true\:true\:true
NVIC.TimeBase=TIM6_DAC_IRQn
NVIC.TimeBaseIP=TIM6
-NVIC.USART1_IRQn=true\:0\:0\:false\:false\:true\:true
-NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:true
+NVIC.USART1_IRQn=true\:0\:0\:false\:false\:true\:true\:true
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:true\:false
PA13.Mode=Serial_Wire
PA13.Signal=SYS_JTMS-SWDIO
PA14.Mode=Serial_Wire
@@ -99,7 +100,7 @@ PCC.PartNumber=STM32F427IIHx
PCC.Seq0=0
PCC.Series=STM32F4
PCC.Temperature=25
-PCC.Vdd=0.0
+PCC.Vdd=3.3
PD0.Locked=true
PD0.Mode=Master
PD0.Signal=CAN1_RX
@@ -126,7 +127,7 @@ PH1/OSC_OUT.Mode=HSE-External-Oscillator
PH1/OSC_OUT.Signal=RCC_OSC_OUT
PinOutPanel.CurrentBGAView=Top
PinOutPanel.RotationAngle=0
-ProjectManager.AskForMigrate=false
+ProjectManager.AskForMigrate=true
ProjectManager.BackupPrevious=false
ProjectManager.CompilerOptimize=2
ProjectManager.ComputerToolchain=false
@@ -135,7 +136,7 @@ ProjectManager.CustomerFirmwarePackage=
ProjectManager.DefaultFWLocation=true
ProjectManager.DeletePrevious=true
ProjectManager.DeviceId=STM32F427IIHx
-ProjectManager.FirmwarePackage=STM32Cube FW_F4 V1.18.0
+ProjectManager.FirmwarePackage=STM32Cube FW_F4 V1.24.2
ProjectManager.FreePins=false
ProjectManager.HalAssertFull=false
ProjectManager.HeapSize=0x200
@@ -143,6 +144,7 @@ ProjectManager.KeepUserCode=true
ProjectManager.LastFirmware=true
ProjectManager.LibraryCopy=0
ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
ProjectManager.PreviousToolchain=
ProjectManager.ProjectBuild=false
ProjectManager.ProjectFileName=demo.ioc
@@ -168,7 +170,7 @@ RCC.HCLKFreq_Value=168000000
RCC.HSE_VALUE=12000000
RCC.HSI_VALUE=16000000
RCC.I2SClocksFreq_Value=192000000
-RCC.IPParameters=48MHZClocksFreq_Value,AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2CLKDivider,APB2Freq_Value,APB2TimFreq_Value,CortexFreq_Value,EthernetFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI_VALUE,I2SClocksFreq_Value,LSE_VALUE,LSI_VALUE,MCO2PinFreq_Value,PLLCLKFreq_Value,PLLM,PLLN,PLLQCLKFreq_Value,PLLSource,PLLSourceVirtual,PLLSourceVirtualString,RTCFreq_Value,RTCHSEDivFreq_Value,SAI_AClocksFreq_Value,SAI_BClocksFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,VCOI2SOutputFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOSAIOutputFreq_Value,VCOSAIOutputFreq_ValueQ,VcooutputI2S,VcooutputI2SQ
+RCC.IPParameters=48MHZClocksFreq_Value,AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2CLKDivider,APB2Freq_Value,APB2TimFreq_Value,CortexFreq_Value,EthernetFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI_VALUE,I2SClocksFreq_Value,LSE_VALUE,LSI_VALUE,MCO2PinFreq_Value,PLLCLKFreq_Value,PLLM,PLLN,PLLQCLKFreq_Value,PLLSourceVirtual,RTCFreq_Value,RTCHSEDivFreq_Value,SAI_AClocksFreq_Value,SAI_BClocksFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,VCOI2SOutputFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOSAIOutputFreq_Value,VCOSAIOutputFreq_ValueQ,VcooutputI2S,VcooutputI2SQ
RCC.LSE_VALUE=32768
RCC.LSI_VALUE=32000
RCC.MCO2PinFreq_Value=168000000
@@ -176,9 +178,7 @@ RCC.PLLCLKFreq_Value=168000000
RCC.PLLM=6
RCC.PLLN=168
RCC.PLLQCLKFreq_Value=84000000
-RCC.PLLSource=RCC_PLLSOURCE_HSE
RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE
-RCC.PLLSourceVirtualString=RCC_PLLSOURCE_HSE
RCC.RTCFreq_Value=32000
RCC.RTCHSEDivFreq_Value=6000000
RCC.SAI_AClocksFreq_Value=24500000
--
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