diff --git a/.clang-format b/.clang-format new file mode 100644 index 0000000000000000000000000000000000000000..02ab0c1c810e26de4957e86c25b35fc21ed075c8 --- /dev/null +++ b/.clang-format @@ -0,0 +1,168 @@ +--- +Language: Cpp +# BasedOnStyle: Chromium +AccessModifierOffset: -1 +AlignAfterOpenBracket: Align +AlignConsecutiveMacros: false +AlignConsecutiveAssignments: false +AlignConsecutiveDeclarations: false +AlignEscapedNewlines: Left +AlignOperands: true +AlignTrailingComments: true +AllowAllArgumentsOnNextLine: true +AllowAllConstructorInitializersOnNextLine: true +AllowAllParametersOfDeclarationOnNextLine: false +AllowShortBlocksOnASingleLine: Never +AllowShortCaseLabelsOnASingleLine: false +AllowShortFunctionsOnASingleLine: Inline +AllowShortLambdasOnASingleLine: All +AllowShortIfStatementsOnASingleLine: Never +AllowShortLoopsOnASingleLine: false +AlwaysBreakAfterDefinitionReturnType: None +AlwaysBreakAfterReturnType: None +AlwaysBreakBeforeMultilineStrings: true +AlwaysBreakTemplateDeclarations: Yes +BinPackArguments: true +BinPackParameters: false +BraceWrapping: + AfterCaseLabel: false + AfterClass: false + AfterControlStatement: false + AfterEnum: false + AfterFunction: false + AfterNamespace: false + AfterObjCDeclaration: false + AfterStruct: false + AfterUnion: false + AfterExternBlock: false + BeforeCatch: false + BeforeElse: false + IndentBraces: false + SplitEmptyFunction: true + SplitEmptyRecord: true + SplitEmptyNamespace: true +BreakBeforeBinaryOperators: None +BreakBeforeBraces: Attach +BreakBeforeInheritanceComma: false +BreakInheritanceList: BeforeColon +BreakBeforeTernaryOperators: true +BreakConstructorInitializersBeforeComma: false +BreakConstructorInitializers: BeforeColon +BreakAfterJavaFieldAnnotations: false +BreakStringLiterals: true +ColumnLimit: 120 +CommentPragmas: '^ IWYU pragma:' +CompactNamespaces: false +ConstructorInitializerAllOnOneLineOrOnePerLine: true +ConstructorInitializerIndentWidth: 4 +ContinuationIndentWidth: 4 +Cpp11BracedListStyle: true +DeriveLineEnding: true +DerivePointerAlignment: false +DisableFormat: false +ExperimentalAutoDetectBinPacking: false +FixNamespaceComments: true +ForEachMacros: + - foreach + - Q_FOREACH + - BOOST_FOREACH +IncludeBlocks: Preserve +IncludeCategories: + - Regex: '^<ext/.*\.h>' + Priority: 2 + SortPriority: 0 + - Regex: '^<.*\.h>' + Priority: 1 + SortPriority: 0 + - Regex: '^<.*' + Priority: 2 + SortPriority: 0 + - Regex: '.*' + Priority: 3 + SortPriority: 0 +IncludeIsMainRegex: '([-_](test|unittest))?$' +IncludeIsMainSourceRegex: '' +IndentCaseLabels: true +IndentGotoLabels: true +IndentPPDirectives: None +IndentWidth: 4 +IndentWrappedFunctionNames: false +JavaScriptQuotes: Leave +JavaScriptWrapImports: true +KeepEmptyLinesAtTheStartOfBlocks: false +MacroBlockBegin: '' +MacroBlockEnd: '' +MaxEmptyLinesToKeep: 1 +NamespaceIndentation: None +ObjCBinPackProtocolList: Never +ObjCBlockIndentWidth: 2 +ObjCSpaceAfterProperty: false +ObjCSpaceBeforeProtocolList: true +PenaltyBreakAssignment: 2 +PenaltyBreakBeforeFirstCallParameter: 1 +PenaltyBreakComment: 300 +PenaltyBreakFirstLessLess: 120 +PenaltyBreakString: 1000 +PenaltyBreakTemplateDeclaration: 10 +PenaltyExcessCharacter: 1000000 +PenaltyReturnTypeOnItsOwnLine: 200 +PointerAlignment: Left +RawStringFormats: + - Language: Cpp + Delimiters: + - cc + - CC + - cpp + - Cpp + - CPP + - 'c++' + - 'C++' + CanonicalDelimiter: '' + BasedOnStyle: google + - Language: TextProto + Delimiters: + - pb + - PB + - proto + - PROTO + EnclosingFunctions: + - EqualsProto + - EquivToProto + - PARSE_PARTIAL_TEXT_PROTO + - PARSE_TEST_PROTO + - PARSE_TEXT_PROTO + - ParseTextOrDie + - ParseTextProtoOrDie + CanonicalDelimiter: '' + BasedOnStyle: google +ReflowComments: true +SortIncludes: true +SortUsingDeclarations: true +SpaceAfterCStyleCast: false +SpaceAfterLogicalNot: false +SpaceAfterTemplateKeyword: true +SpaceBeforeAssignmentOperators: true +SpaceBeforeCpp11BracedList: false +SpaceBeforeCtorInitializerColon: true +SpaceBeforeInheritanceColon: true +SpaceBeforeParens: ControlStatements +SpaceBeforeRangeBasedForLoopColon: true +SpaceInEmptyBlock: false +SpaceInEmptyParentheses: false +SpacesBeforeTrailingComments: 2 +SpacesInAngles: false +SpacesInConditionalStatement: false +SpacesInContainerLiterals: true +SpacesInCStyleCastParentheses: false +SpacesInParentheses: false +SpacesInSquareBrackets: false +SpaceBeforeSquareBrackets: false +Standard: Auto +StatementMacros: + - Q_UNUSED + - QT_REQUIRE_VERSION +TabWidth: 4 +UseCRLF: false +UseTab: ForIndentation +... + diff --git a/.clang-format-include b/.clang-format-include new file mode 100644 index 0000000000000000000000000000000000000000..7051bc9d93c426db88d26306ac27727121a6e1d7 --- /dev/null +++ b/.clang-format-include @@ -0,0 +1 @@ +library/**/* diff --git a/.devcontainer/Dockerfile b/.devcontainer/Dockerfile new file mode 100644 index 0000000000000000000000000000000000000000..ebdb2609cb164bb786cd4f6333496b888dd7be89 --- /dev/null +++ b/.devcontainer/Dockerfile @@ -0,0 +1,27 @@ +ARG VARIANT=focal +FROM mcr.microsoft.com/vscode/devcontainers/base:${VARIANT} + +ARG USER=vscode +ARG GNU_ARM_VERSION=10-2020-q4-major +ARG GNU_ARM_DIRECTORY=/opt/toolchains + +RUN apt update -y && \ + apt upgrade -y && \ + apt install -y build-essential clang-format git doxygen \ + openocd picocom libncurses5 \ + meson ninja-build python3 python3-pip python3-setuptools python3-wheel \ + usbutils + +RUN mkdir -p /dev/bus/usb && \ + usermod -aG plugdev $USER + +RUN mkdir -p ${GNU_ARM_DIRECTORY} && \ + wget -qO- "https://developer.arm.com/-/media/Files/downloads/gnu-rm/10-2020q4/gcc-arm-none-eabi-${GNU_ARM_VERSION}-x86_64-linux.tar.bz2" | tar -xj -C "${GNU_ARM_DIRECTORY}" + +ENV PATH="${GNU_ARM_DIRECTORY}/gcc-arm-none-eabi-${GNU_ARM_VERSION}/bin:$PATH" +# Meson folder +ENV XDG_DATA_DIRS="/workspaces/unicorn-osal/" +ENV XDG_DATA_HOME="/workspaces/unicorn-osal/" + +USER $USER +RUN pip3 install --user -U meson sphinx sphinx-rtd-theme breathe sphinx-sitemap diff --git a/.devcontainer/devcontainer.json b/.devcontainer/devcontainer.json new file mode 100644 index 0000000000000000000000000000000000000000..0063761f77594b680fef86652465a2b064973d50 --- /dev/null +++ b/.devcontainer/devcontainer.json @@ -0,0 +1,38 @@ +{ + "name": "Machine PM - Embedded Development", + "dockerFile": "./Dockerfile", + "settings": { + "terminal.integrated.shell.linux": "/bin/zsh" + }, + "extensions": [ + // Meson extension + "asabil.meson", + // Cortex Debug + "marus25.cortex-debug", + // C++ extension + "ms-vscode.cpptools", + "xaver.clang-format", + "notskm.clang-tidy", + // IntelliSense extension + "visualstudioexptteam.vscodeintellicode", + "mhutchie.git-graph", + "editorconfig.editorconfig", + "zixuanwang.linkerscript", + "dan-c-underwood.arm" + ], + "mounts": [ + "source=${localEnv:HOME}/.ssh,target=/home/vscode/.ssh,type=bind", + "source=/dev/,target=/dev/,type=bind", + "source=/etc/udev/rules.d,target=/etc/udev/rules.d,type=bind" + ], + "workspaceFolder": "/workspaces/unicorn-osal", + "remoteUser": "vscode", + "runArgs": [ + "--cap-add=SYS_PTRACE", + "--security-opt", + "seccomp=unconfined", + "--device-cgroup-rule=a 166:* rwm", + "--device-cgroup-rule=a 189:* rwm", + ], + "postStartCommand": "sudo sh ./.devcontainer/entrypoint.sh", +} diff --git a/.devcontainer/entrypoint.sh b/.devcontainer/entrypoint.sh new file mode 100644 index 0000000000000000000000000000000000000000..f5b292032d33cb75d13406b7df02241304c11e82 --- /dev/null +++ b/.devcontainer/entrypoint.sh @@ -0,0 +1,9 @@ +#!/usr/bin/bash + +FILE=/etc/udev/rules.d/60-openocd.rules +if [ ! -f "$FILE" ]; then + mkdir -p /etc/udev/rules.d/ + sudo cp /lib/udev/rules.d/60-openocd.rules /etc/udev/rules.d/ +fi + + diff --git a/.editorconfig b/.editorconfig new file mode 100644 index 0000000000000000000000000000000000000000..f8f94751eb3f10846f15c43d4f9d2a442223cad0 --- /dev/null +++ b/.editorconfig @@ -0,0 +1,22 @@ +root = true + +[**] +charset = utf-8 +indent_style = tab +insert_final_newline = true +trim_trailing_whitespace = true +end_of_line = lf + +[*.cpp] +quote_type = double + +[*.hpp] +quote_type = double + +[*.md] +max_line_length = off +trim_trailing_whitespace = false + +[*.yml] +indent_style = space +indent_size = 2 diff --git a/.gitattributes b/.gitattributes new file mode 100644 index 0000000000000000000000000000000000000000..6313b56c57848efce05faa7aa7e901ccfc2886ea --- /dev/null +++ b/.gitattributes @@ -0,0 +1 @@ +* text=auto eol=lf diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..e48cdb35c64ec09343d1ddf766422a97886041a1 --- /dev/null +++ b/.gitignore @@ -0,0 +1,14 @@ +# Meson +**/build +**/subprojects/* +!**/subprojects/packagefiles +!**/subprojects/*.wrap + +# IDE - VSCode +.vscode/* +!.vscode/settings.json +!.vscode/tasks.json +!.vscode/launch.json +!.vscode/extensions.json +.history/* + diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml new file mode 100644 index 0000000000000000000000000000000000000000..ed5ec0145e75cd88c80d61f70e300f45d7aa502a --- /dev/null +++ b/.gitlab-ci.yml @@ -0,0 +1,94 @@ +variables: + UNICORN_EMBEDDED_VERSION: $CI_REGISTRY/$CI_PROJECT_PATH/unicorn-embedded:${CI_COMMIT_SHORT_SHA} + UNICORN_EMBEDDED_LATEST: $CI_REGISTRY/$CI_PROJECT_PATH/unicorn-embedded:latest + MESON_CROSS_FILE_DIR: ./meson/cross + MESON_NATIVE_FILE_DIR: ./meson/native + DOCKER_HOST: tcp://dockerhost:2375/ + DOCKER_DRIVER: overlay2 + DOCKER_TLS_CERTDIR: "" + +stages: + - devcontainer + - build + - test + - lint + - publish + +build-devcontainer: + stage: devcontainer + image: docker + services: + - name: docker:dind + alias: dockerhost + only: + changes: + - ./.devcontainer/Dockerfile + before_script: + - echo $CI_REGISTRY_PASSWORD | docker login -u $CI_REGISTRY_USER --password-stdin $CI_REGISTRY + script: + - docker build -t $UNICORN_EMBEDDED_VERSION -t $UNICORN_EMBEDDED_LATEST .devcontainer + - docker push $UNICORN_EMBEDDED_VERSION + - docker push $UNICORN_EMBEDDED_LATEST + +build-cortex-m0: + stage: build + image: $UNICORN_EMBEDDED_LATEST + dependencies: + - build-devcontainer + script: + - meson --cross-file $MESON_CROSS_FILE_DIR/cortex-m0.ini --cross-file $MESON_CROSS_FILE_DIR/arm.ini build + - ninja -C build + artifacts: + paths: + - build + expire_in: 1 day + +# build-samples: +# stage: test +# image: $UNICORN_EMBEDDED_LATEST +# dependencies: +# - build-cortex-m0 +# script: +# - cd samples +# - meson --cross-file ../$MESON_CROSS_FILE_DIR/cortex-m0.ini --cross-file ../$MESON_CROSS_FILE_DIR/arm.ini build +# - ninja -C build + +# lint: +# stage: lint +# image: $UNICORN_EMBEDDED_LATEST +# needs: +# - job: build-cortex-m0 +# artifacts: true +# script: +# - ninja -C build clang-format-check + +pages: + stage: publish + image: $UNICORN_EMBEDDED_LATEST + only: + refs: + - dev + needs: + - job: build-cortex-m0 + artifacts: true + script: + - ninja -C build docs:sphinx + - mv build/docs/sphinx public/ + artifacts: + paths: + - public + + +# release: +# stage: publish +# image: $UNICORN_EMBEDDED_LATEST +# only: +# refs: - master +# dependencies: +# - build-cortex-m0 +# script: +# - yarn build:prod +# tags: +# - docker +# artifacts: +# paths: - installer/win-unpacked diff --git a/.gitlab/merge_request_templates/merge_request_template.md b/.gitlab/merge_request_templates/merge_request_template.md new file mode 100644 index 0000000000000000000000000000000000000000..d7ca76277fd69e37ce78eca25e91143c6d78c775 --- /dev/null +++ b/.gitlab/merge_request_templates/merge_request_template.md @@ -0,0 +1,9 @@ +## Description +- + +## Test +- + + +## Trello +[trello issue](drop_trello_link_here) diff --git a/.vscode/.gitignore b/.vscode/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..adbdc3570bec9b9f81565f8d31c3def676408b36 --- /dev/null +++ b/.vscode/.gitignore @@ -0,0 +1 @@ +.cortex-debug.* diff --git a/.vscode/c_cpp_properties.json b/.vscode/c_cpp_properties.json new file mode 100644 index 0000000000000000000000000000000000000000..cd106643e57cd5db59e70abbabf602cc60c2342a --- /dev/null +++ b/.vscode/c_cpp_properties.json @@ -0,0 +1,20 @@ +{ + "configurations": [ + { + "name": "Linux", + "includePath": [ + "${workspaceRoot}/library/core/**", + "${workspaceRoot}/samples/task/subprojects/hal-lib/**", + "${workspaceRoot}/subprojects/free_rtos/include/", + "${workspaceRoot}/library/free-rtos/config", + "${workspaceRoot}/subprojects/free_rtos/portable/GCC/ARM_CM0", + "${workspaceRoot}/samples/task/sources/**" + ], + "defines": [ + "CORE" + ], + "cppStandard": "c++17" + } + ], + "version": 4 +} diff --git a/.vscode/extensions.json b/.vscode/extensions.json new file mode 100644 index 0000000000000000000000000000000000000000..5260cac628dabab3e053b3f6d457af4fd302811f --- /dev/null +++ b/.vscode/extensions.json @@ -0,0 +1,9 @@ +{ + "recommendations": [ + "yzhang.markdown-all-in-one", + "gruntfuggly.todo-tree", + "redhat.vscode-yaml", + "ms-python.python", + ], + "unwantedRecommendations": [] +} \ No newline at end of file diff --git a/.vscode/launch.json b/.vscode/launch.json new file mode 100644 index 0000000000000000000000000000000000000000..217b285fda0979257e8402255b73c50cabb63609 --- /dev/null +++ b/.vscode/launch.json @@ -0,0 +1,36 @@ +{ + "configurations": [ + { + "name": "Samples: STM32F072RBT6", + "request": "launch", + "type": "cortex-debug", + "servertype": "openocd", + "cwd": "${workspaceFolder}/samples", + "executable": "build/${input:sampleName}.elf", + "device": "STM32F072", + "svdFile": "${workspaceFolder}/config/stm32f0x/svd/STM32F0x2.svd", + "configFiles": [ + "${workspaceFolder}/config/stm32f0x/st-link/v2-1/openocd.cfg" + ], + "preLaunchTask": "Build Samples", + "runToMain": true, + } + ], + "inputs": [ + { + "id": "sampleName", + "type": "pickString", + "description": "Choose your sample", + "options": [ + { + "label": "Task Sample", + "value": "task" + }, + { + "label": "Semaphore Sample", + "value": "semaphore" + }, + ] + } + ] +} diff --git a/.vscode/settings.json b/.vscode/settings.json new file mode 100644 index 0000000000000000000000000000000000000000..1b7ac4b7a7b789f8855dfc3cef9b1dbc542347c8 --- /dev/null +++ b/.vscode/settings.json @@ -0,0 +1,59 @@ +{ + "editor.formatOnSave": true, + "task.problemMatchers.neverPrompt": true, + "task.autoDetect": "off", + "files.autoSave": "onFocusChange", + "mesonbuild.buildFolder": "build", + "search.exclude": { + "build/": true, + }, + "[cpp]": { + "editor.defaultFormatter": "xaver.clang-format" + }, + "files.associations": { + "array": "cpp", + "atomic": "cpp", + "bit": "cpp", + "*.tcc": "cpp", + "cctype": "cpp", + "clocale": "cpp", + "cmath": "cpp", + "compare": "cpp", + "concepts": "cpp", + "cstdarg": "cpp", + "cstddef": "cpp", + "cstdint": "cpp", + "cstdio": "cpp", + "cstdlib": "cpp", + "cwchar": "cpp", + "cwctype": "cpp", + "deque": "cpp", + "unordered_map": "cpp", + "vector": "cpp", + "exception": "cpp", + "algorithm": "cpp", + "functional": "cpp", + "iterator": "cpp", + "memory": "cpp", + "memory_resource": "cpp", + "numeric": "cpp", + "optional": "cpp", + "random": "cpp", + "string": "cpp", + "string_view": "cpp", + "system_error": "cpp", + "tuple": "cpp", + "type_traits": "cpp", + "utility": "cpp", + "initializer_list": "cpp", + "iosfwd": "cpp", + "limits": "cpp", + "new": "cpp", + "ostream": "cpp", + "ranges": "cpp", + "stdexcept": "cpp", + "streambuf": "cpp", + "cinttypes": "cpp", + "typeinfo": "cpp" + }, +} diff --git a/.vscode/tasks.json b/.vscode/tasks.json new file mode 100644 index 0000000000000000000000000000000000000000..6807d3524d36036b756fd7cde51d593209d1b29a --- /dev/null +++ b/.vscode/tasks.json @@ -0,0 +1,123 @@ +{ + "version": "2.0.0", + "tasks": [ + { + "label": "Serial Console", + "type": "shell", + "detail": "Establish communication between PCB and Computer VIA USB", + "command": "picocom /dev/ttyACM0 -b ${input:baudRate} --imap lfcrlf", + }, + { + "label": "Reset Library", + "type": "shell", + "options": { + "cwd": "${workspaceFolder}" + }, + "command": "if test -d build; then rm -r build; fi" + }, + { + "label": "Configure Library", + "type": "shell", + "options": { + "cwd": "${workspaceFolder}" + }, + "dependsOn": [ + "Reset Library" + ], + "command": "meson ${input:toolchain} build", + }, + { + "label": "Build Library", + "type": "shell", + "options": { + "cwd": "${workspaceFolder}" + }, + "command": "ninja -C build", + "detail": "Be sure to have run at least one time the Configure task" + }, + { + "label": "Reset Samples", + "type": "shell", + "options": { + "cwd": "${workspaceFolder}/samples" + }, + "command": "if test -d build; then rm -r build; fi" + }, + { + "label": "Configure Samples", + "type": "shell", + "options": { + "cwd": "${workspaceFolder}/samples" + }, + "dependsOn": [ + "Reset Samples" + ], + "command": "meson ${input:toolchain} build", + }, + { + "label": "Build Samples", + "type": "shell", + "options": { + "cwd": "${workspaceFolder}/samples" + }, + "command": "ninja -C build", + "detail": "Be sure to have run at least one time the Configure task" + }, + { + "label": "Format", + "type": "shell", + "options": { + "cwd": "${workspaceFolder}/" + }, + "command": [ + "if test -d build; then rm -r build; fi &&", + "meson --native-file gnu.ini build &&", + "ninja -C build clang-format", + ] + }, + { + "label": "Static Analyse", + "type": "shell", + "options": { + "cwd": "${workspaceFolder}/" + }, + "command": [ + "if test -d build; then rm -r build; fi &&", + "meson --native-file gnu.ini build &&", + "ninja -C build clang-tidy", + ], + }, + { + "label": "Generate sphinx documentation", + "type": "shell", + "options": { + "cwd": "${workspaceFolder}/" + }, + "command": "ninja -C build docs:sphinx" + } + ], + "inputs": [ + { + "id": "toolchain", + "type": "pickString", + "description": "Choose your toolchain", + "options": [ + { + "label": "Arm cortex-M0", + "value": "--cross-file cortex-m0.ini --cross-file arm.ini" + }, + { + "label": "GNU Linux", + "value": "--native-file gnu.ini" + }, + ], + "default": "--cross-file cortex-m0.ini --cross-file arm.ini" + }, + { + "id": "baudRate", + "type": "promptString", + "description": "Choose your baudRate", + "default": "115200" + }, + ] +} diff --git a/CHANGELOG.md b/CHANGELOG.md new file mode 100644 index 0000000000000000000000000000000000000000..a9f12594932c1d4e3f840eaa1fc12a71da987d14 --- /dev/null +++ b/CHANGELOG.md @@ -0,0 +1,10 @@ +# Changelog + +<a name="0.1.0"></a> + +## 0.1.0 (June 19st, 2021) + +### Features + + +### Breaking Changes diff --git a/CONTRIBUTING.md b/CONTRIBUTING.md new file mode 100644 index 0000000000000000000000000000000000000000..37ce0f99ac6a5f7ef7d5da6901506e21e0388902 --- /dev/null +++ b/CONTRIBUTING.md @@ -0,0 +1,55 @@ +# Contributing + +Contributions are welcome. Please ensure to follow the guidelines descibed here. + +## Contributions Guidelines + +All contributions must abide by the following rules: + +1. All new feature must be documented in the header (`.hpp`) files +2. All new sample must use the library folder + +## Contributing Workflow + +Please use the following contribution workflow: + +1. Create a branch (or fork) to hold the proposed changes + 1. Branch names should follow the convention: + * _feature/feature-description_ (e.g. feature/gpio-output) + * _bug/bug-description_ (e.g. bug/gpio-initialisation) + * _sample/sample-description_ (e.g. sample/gpio-output) + * _refactor/refactor-description_ (e.g. refactor/gpio-output-remove-duplicate-code) +2. Make some changes, commit the in the created branch, and push when your done + 1. Before pushing your branch try to rebase your branch with `master` + +3. Create a _Merge Request_ (MR) for the change(s) and assign it to one of the reviewers listed below + +> Note: Unless explicitely accepted by a reviewer, only MRs for changes based on the latest commit of the **master branch** will be accpeted. Therefore, please ensure to rebase the branch containing your changes on top of `master` before submitting. This is meant to keep thinkgs simple and maintain a clean linear project history. + +## Release Workflow + +Please use the following release workflow: + +> Releases should only created from the `master` branch. + +1. Make sure all desired MRs have been merged back to `master` + +2. Create one last MR to update the [CHANGELOG](CHANGELOG.md) + +3. Take note of the commit SHA representing that last MR + +4. Make sure the pipeline execution of that commit completed successfully + +5. Create a tag of that commit (which should now be the HEAD of `master`) directly from the gitlab web UI. + + 1. Copy and paster the new section added to the CHANGELOG as the release notes for the tag in gitlab + - Filling in the _Release Notes_ field when creating a tag will automatically create `Release` for the project and associate it to this tag + +## Project Reviewers + +Currently, the reviewers/approvers of this project are: + +- @felixLeChat +- @GM024 +- @HorbyB +- @Spiritus2424 diff --git a/README.md b/README.md index 8ea8b5256c7f9c71c99f4d083b3197d93c8c687c..68e3fc8a1bc2d8878f3e802b1a4a3b2efeb1b72a 100644 --- a/README.md +++ b/README.md @@ -1,2 +1,58 @@ -# unicorn-OSAL +# Unicorn-OSAL +This framework provide an Operating System Abstraction Layer + +While the utlimate goal is to provide a framework implementation of the FreeRTOS library, +the project aims to support every RTOS. + + +## Contributing + +Contributions to this project are welcome. Please see the contribution guidelines [here](CONTRIBUTING.md) + +### Develoment Setup +The simplest way to get started contributing with this project is to open it with the [VS Code](https://code.visualstudio.com/) editor specifically the [Remote Containers extension](https://marketplace.visualstudio.com/items?itemName=ms-vscode-remote.remote-containers) + +A `dev-container` has been defined. Before trying to open the development environment, make sure you've performed the following steps: + +- You have installed and can run docker on your development pc. [If not click here](https://drive.google.com/file/d/1a9ZsLOmFzJaq4EH6tsha7Votmf_WXh2G/view?usp=sharing) + +When ready perform the following steps to open the development environment: + +1. Open the root folder of this git repository in VS Code +2. Press `Ctrl+Shift+P` to open the _VS Code Command Palette_ +3. Enter _Remote Containers: Open Workspace in Container..._ in the palette and press `Enter` + +VS Code will now start initializing the development environment. This may take a few minutes the first time. Once completed, you'll be able to work on this project from within a qualifed container. + +We invite you to check how to setup your [C++ IntelliSense](https://git.step.polymtl.ca/machine-epm/unicorn-hal/-/wikis/VS-Code/C---IntelliSense) + +### Configure Project + +This project has a set of task to help you to configure your project. + +1. Via the command palette + 1. Press `Ctrl+Shift+P` to open the _VS Code Command Palette_ + 2. Enter _Tasks: Run Task_ in the palette and press `Enter` + 3. Choose _Configure Project_ and press `Enter` + 4. Choose the _Arm cortex-M0_ and press `Enter` + +2. When VS Code open the root folder + 1. Choose the _Arm cortex-M0_ and press `Enter` + +### Build Project +This project has a set of task to help you to build your project. Be sure to have run at least one time the _Configure Project_. + +1. Press `Ctrl+Shift+P` to open the _VS Code Command Palette_ +2. Enter _Tasks: Run Task_ in the palette and press `Enter` +3. Choose _Build Project_ and press `Enter` + + +## Contact + +If you need to reach anybody to discuss this project, please contact: + +| Address | +| --------------------------------------------------------------- | +| [ahmad.faour@polymtl.ca](mailto:ahmad.faour@polymtl.ca) | +| [gaya.mehenni@polymtl.ca](mailto:gaya.mehenni@polymtl.ca) | diff --git a/config/stm32f0x/st-link/v2-1/openocd.cfg b/config/stm32f0x/st-link/v2-1/openocd.cfg new file mode 100644 index 0000000000000000000000000000000000000000..43cec5b4f8ed25b94dbc6915789c1df3fddb64e3 --- /dev/null +++ b/config/stm32f0x/st-link/v2-1/openocd.cfg @@ -0,0 +1,2 @@ +source [find interface/stlink-v2-1.cfg] +source [find target/stm32f0x.cfg] diff --git a/config/stm32f0x/svd/STM32F0x2.svd b/config/stm32f0x/svd/STM32F0x2.svd new file mode 100644 index 0000000000000000000000000000000000000000..a1ca8fb88d35c9373201ebbe061bdcec6cec6801 --- /dev/null +++ b/config/stm32f0x/svd/STM32F0x2.svd @@ -0,0 +1,32270 @@ +<?xml version="1.0" encoding="utf-8" standalone="no"?> +<device schemaVersion="1.1" +xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" +xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> + <name>STM32F0x2</name> + <version>1.3</version> + <description>STM32F0x2</description> + <cpu> <!-- details about the cpu embedded in the device --> + <name>CM0</name> + <revision>r0p0</revision> + <endian>little</endian> + <mpuPresent>false</mpuPresent> + <fpuPresent>false</fpuPresent> + <nvicPrioBits>3</nvicPrioBits> + <vendorSystickConfig>false</vendorSystickConfig> + </cpu> + <!--Bus Interface Properties--> + <!--Cortex-M0 is byte addressable--> + <addressUnitBits>8</addressUnitBits> + <!--the maximum data bit width accessible within a single transfer--> + <width>32</width> + <!--Register Default Properties--> + <size>0x20</size> + <resetValue>0x0</resetValue> + <resetMask>0xFFFFFFFF</resetMask> + <peripherals> + <peripheral> + <name>CRC</name> + <description>cyclic redundancy check calculation + unit</description> + <groupName>CRC</groupName> + <baseAddress>0x40023000</baseAddress> + <addressBlock> + <offset>0x0</offset> + <size>0x400</size> + <usage>registers</usage> + </addressBlock> + <registers> + <register> + <name>DR</name> + <displayName>DR</displayName> + <description>Data register</description> + <addressOffset>0x0</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0xFFFFFFFF</resetValue> + <fields> + <field> + <name>DR</name> + <description>Data register bits</description> + <bitOffset>0</bitOffset> + <bitWidth>32</bitWidth> + </field> + </fields> + </register> + <register> + <name>IDR</name> + <displayName>IDR</displayName> + <description>Independent data register</description> + <addressOffset>0x4</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>IDR</name> + <description>General-purpose 8-bit data register + bits</description> + <bitOffset>0</bitOffset> + <bitWidth>8</bitWidth> + </field> + </fields> + </register> + <register> + <name>CR</name> + <displayName>CR</displayName> + <description>Control register</description> + <addressOffset>0x8</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>RESET</name> + <description>reset bit</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>POLYSIZE</name> + <description>Polynomial size</description> + <bitOffset>3</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>REV_IN</name> + <description>Reverse input data</description> + <bitOffset>5</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>REV_OUT</name> + <description>Reverse output data</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>INIT</name> + <displayName>INIT</displayName> + <description>Initial CRC value</description> + <addressOffset>0xC</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0xFFFFFFFF</resetValue> + <fields> + <field> + <name>INIT</name> + <description>Programmable initial CRC + value</description> + <bitOffset>0</bitOffset> + <bitWidth>32</bitWidth> + </field> + </fields> + </register> + </registers> + </peripheral> + <peripheral> + <name>GPIOF</name> + <description>General-purpose I/Os</description> + <groupName>GPIO</groupName> + <baseAddress>0x48001400</baseAddress> + <addressBlock> + <offset>0x0</offset> + <size>0x400</size> + <usage>registers</usage> + </addressBlock> + <registers> + <register> + <name>MODER</name> + <displayName>MODER</displayName> + <description>GPIO port mode register</description> + <addressOffset>0x0</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>MODER15</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>30</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>MODER14</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>28</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>MODER13</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>26</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>MODER12</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>24</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>MODER11</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>22</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>MODER10</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>20</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>MODER9</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>18</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>MODER8</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>16</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>MODER7</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>14</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>MODER6</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>12</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>MODER5</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>10</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>MODER4</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>8</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>MODER3</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>6</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>MODER2</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>4</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>MODER1</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>2</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>MODER0</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>0</bitOffset> + <bitWidth>2</bitWidth> + </field> + </fields> + </register> + <register> + <name>OTYPER</name> + <displayName>OTYPER</displayName> + <description>GPIO port output type register</description> + <addressOffset>0x4</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>OT15</name> + <description>Port x configuration bit + 15</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OT14</name> + <description>Port x configuration bit + 14</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OT13</name> + <description>Port x configuration bit + 13</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OT12</name> + <description>Port x configuration bit + 12</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OT11</name> + <description>Port x configuration bit + 11</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OT10</name> + <description>Port x configuration bit + 10</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OT9</name> + <description>Port x configuration bit 9</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OT8</name> + <description>Port x configuration bit 8</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OT7</name> + <description>Port x configuration bit 7</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OT6</name> + <description>Port x configuration bit 6</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OT5</name> + <description>Port x configuration bit 5</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OT4</name> + <description>Port x configuration bit 4</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OT3</name> + <description>Port x configuration bit 3</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OT2</name> + <description>Port x configuration bit 2</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OT1</name> + <description>Port x configuration bit 1</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OT0</name> + <description>Port x configuration bit 0</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>OSPEEDR</name> + <displayName>OSPEEDR</displayName> + <description>GPIO port output speed + register</description> + <addressOffset>0x8</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>OSPEEDR15</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>30</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>OSPEEDR14</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>28</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>OSPEEDR13</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>26</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>OSPEEDR12</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>24</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>OSPEEDR11</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>22</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>OSPEEDR10</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>20</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>OSPEEDR9</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>18</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>OSPEEDR8</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>16</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>OSPEEDR7</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>14</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>OSPEEDR6</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>12</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>OSPEEDR5</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>10</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>OSPEEDR4</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>8</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>OSPEEDR3</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>6</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>OSPEEDR2</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>4</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>OSPEEDR1</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>2</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>OSPEEDR0</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>0</bitOffset> + <bitWidth>2</bitWidth> + </field> + </fields> + </register> + <register> + <name>PUPDR</name> + <displayName>PUPDR</displayName> + <description>GPIO port pull-up/pull-down + register</description> + <addressOffset>0xC</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>PUPDR15</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>30</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PUPDR14</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>28</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PUPDR13</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>26</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PUPDR12</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>24</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PUPDR11</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>22</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PUPDR10</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>20</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PUPDR9</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>18</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PUPDR8</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>16</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PUPDR7</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>14</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PUPDR6</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>12</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PUPDR5</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>10</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PUPDR4</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>8</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PUPDR3</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>6</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PUPDR2</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>4</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PUPDR1</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>2</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PUPDR0</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>0</bitOffset> + <bitWidth>2</bitWidth> + </field> + </fields> + </register> + <register> + <name>IDR</name> + <displayName>IDR</displayName> + <description>GPIO port input data register</description> + <addressOffset>0x10</addressOffset> + <size>0x20</size> + <access>read-only</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>IDR15</name> + <description>Port input data (y = + 0..15)</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>IDR14</name> + <description>Port input data (y = + 0..15)</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>IDR13</name> + <description>Port input data (y = + 0..15)</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>IDR12</name> + <description>Port input data (y = + 0..15)</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>IDR11</name> + <description>Port input data (y = + 0..15)</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>IDR10</name> + <description>Port input data (y = + 0..15)</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>IDR9</name> + <description>Port input data (y = + 0..15)</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>IDR8</name> + <description>Port input data (y = + 0..15)</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>IDR7</name> + <description>Port input data (y = + 0..15)</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>IDR6</name> + <description>Port input data (y = + 0..15)</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>IDR5</name> + <description>Port input data (y = + 0..15)</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>IDR4</name> + <description>Port input data (y = + 0..15)</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>IDR3</name> + <description>Port input data (y = + 0..15)</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>IDR2</name> + <description>Port input data (y = + 0..15)</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>IDR1</name> + <description>Port input data (y = + 0..15)</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>IDR0</name> + <description>Port input data (y = + 0..15)</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>ODR</name> + <displayName>ODR</displayName> + <description>GPIO port output data register</description> + <addressOffset>0x14</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>ODR15</name> + <description>Port output data (y = + 0..15)</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ODR14</name> + <description>Port output data (y = + 0..15)</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ODR13</name> + <description>Port output data (y = + 0..15)</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ODR12</name> + <description>Port output data (y = + 0..15)</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ODR11</name> + <description>Port output data (y = + 0..15)</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ODR10</name> + <description>Port output data (y = + 0..15)</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ODR9</name> + <description>Port output data (y = + 0..15)</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ODR8</name> + <description>Port output data (y = + 0..15)</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ODR7</name> + <description>Port output data (y = + 0..15)</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ODR6</name> + <description>Port output data (y = + 0..15)</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ODR5</name> + <description>Port output data (y = + 0..15)</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ODR4</name> + <description>Port output data (y = + 0..15)</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ODR3</name> + <description>Port output data (y = + 0..15)</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ODR2</name> + <description>Port output data (y = + 0..15)</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ODR1</name> + <description>Port output data (y = + 0..15)</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ODR0</name> + <description>Port output data (y = + 0..15)</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>BSRR</name> + <displayName>BSRR</displayName> + <description>GPIO port bit set/reset + register</description> + <addressOffset>0x18</addressOffset> + <size>0x20</size> + <access>write-only</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>BR15</name> + <description>Port x reset bit y (y = + 0..15)</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR14</name> + <description>Port x reset bit y (y = + 0..15)</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR13</name> + <description>Port x reset bit y (y = + 0..15)</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR12</name> + <description>Port x reset bit y (y = + 0..15)</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR11</name> + <description>Port x reset bit y (y = + 0..15)</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR10</name> + <description>Port x reset bit y (y = + 0..15)</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR9</name> + <description>Port x reset bit y (y = + 0..15)</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR8</name> + <description>Port x reset bit y (y = + 0..15)</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR7</name> + <description>Port x reset bit y (y = + 0..15)</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR6</name> + <description>Port x reset bit y (y = + 0..15)</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR5</name> + <description>Port x reset bit y (y = + 0..15)</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR4</name> + <description>Port x reset bit y (y = + 0..15)</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR3</name> + <description>Port x reset bit y (y = + 0..15)</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR2</name> + <description>Port x reset bit y (y = + 0..15)</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR1</name> + <description>Port x reset bit y (y = + 0..15)</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR0</name> + <description>Port x set bit y (y= + 0..15)</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BS15</name> + <description>Port x set bit y (y= + 0..15)</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BS14</name> + <description>Port x set bit y (y= + 0..15)</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BS13</name> + <description>Port x set bit y (y= + 0..15)</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BS12</name> + <description>Port x set bit y (y= + 0..15)</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BS11</name> + <description>Port x set bit y (y= + 0..15)</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BS10</name> + <description>Port x set bit y (y= + 0..15)</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BS9</name> + <description>Port x set bit y (y= + 0..15)</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BS8</name> + <description>Port x set bit y (y= + 0..15)</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BS7</name> + <description>Port x set bit y (y= + 0..15)</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BS6</name> + <description>Port x set bit y (y= + 0..15)</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BS5</name> + <description>Port x set bit y (y= + 0..15)</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BS4</name> + <description>Port x set bit y (y= + 0..15)</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BS3</name> + <description>Port x set bit y (y= + 0..15)</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BS2</name> + <description>Port x set bit y (y= + 0..15)</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BS1</name> + <description>Port x set bit y (y= + 0..15)</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BS0</name> + <description>Port x set bit y (y= + 0..15)</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>LCKR</name> + <displayName>LCKR</displayName> + <description>GPIO port configuration lock + register</description> + <addressOffset>0x1C</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>LCKK</name> + <description>Port x lock bit y</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>LCK15</name> + <description>Port x lock bit y (y= + 0..15)</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>LCK14</name> + <description>Port x lock bit y (y= + 0..15)</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>LCK13</name> + <description>Port x lock bit y (y= + 0..15)</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>LCK12</name> + <description>Port x lock bit y (y= + 0..15)</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>LCK11</name> + <description>Port x lock bit y (y= + 0..15)</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>LCK10</name> + <description>Port x lock bit y (y= + 0..15)</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>LCK9</name> + <description>Port x lock bit y (y= + 0..15)</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>LCK8</name> + <description>Port x lock bit y (y= + 0..15)</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>LCK7</name> + <description>Port x lock bit y (y= + 0..15)</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>LCK6</name> + <description>Port x lock bit y (y= + 0..15)</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>LCK5</name> + <description>Port x lock bit y (y= + 0..15)</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>LCK4</name> + <description>Port x lock bit y (y= + 0..15)</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>LCK3</name> + <description>Port x lock bit y (y= + 0..15)</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>LCK2</name> + <description>Port x lock bit y (y= + 0..15)</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>LCK1</name> + <description>Port x lock bit y (y= + 0..15)</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>LCK0</name> + <description>Port x lock bit y (y= + 0..15)</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>AFRL</name> + <displayName>AFRL</displayName> + <description>GPIO alternate function low + register</description> + <addressOffset>0x20</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>AFRL7</name> + <description>Alternate function selection for port x + bit y (y = 0..7)</description> + <bitOffset>28</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>AFRL6</name> + <description>Alternate function selection for port x + bit y (y = 0..7)</description> + <bitOffset>24</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>AFRL5</name> + <description>Alternate function selection for port x + bit y (y = 0..7)</description> + <bitOffset>20</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>AFRL4</name> + <description>Alternate function selection for port x + bit y (y = 0..7)</description> + <bitOffset>16</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>AFRL3</name> + <description>Alternate function selection for port x + bit y (y = 0..7)</description> + <bitOffset>12</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>AFRL2</name> + <description>Alternate function selection for port x + bit y (y = 0..7)</description> + <bitOffset>8</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>AFRL1</name> + <description>Alternate function selection for port x + bit y (y = 0..7)</description> + <bitOffset>4</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>AFRL0</name> + <description>Alternate function selection for port x + bit y (y = 0..7)</description> + <bitOffset>0</bitOffset> + <bitWidth>4</bitWidth> + </field> + </fields> + </register> + <register> + <name>AFRH</name> + <displayName>AFRH</displayName> + <description>GPIO alternate function high + register</description> + <addressOffset>0x24</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>AFRH15</name> + <description>Alternate function selection for port x + bit y (y = 8..15)</description> + <bitOffset>28</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>AFRH14</name> + <description>Alternate function selection for port x + bit y (y = 8..15)</description> + <bitOffset>24</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>AFRH13</name> + <description>Alternate function selection for port x + bit y (y = 8..15)</description> + <bitOffset>20</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>AFRH12</name> + <description>Alternate function selection for port x + bit y (y = 8..15)</description> + <bitOffset>16</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>AFRH11</name> + <description>Alternate function selection for port x + bit y (y = 8..15)</description> + <bitOffset>12</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>AFRH10</name> + <description>Alternate function selection for port x + bit y (y = 8..15)</description> + <bitOffset>8</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>AFRH9</name> + <description>Alternate function selection for port x + bit y (y = 8..15)</description> + <bitOffset>4</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>AFRH8</name> + <description>Alternate function selection for port x + bit y (y = 8..15)</description> + <bitOffset>0</bitOffset> + <bitWidth>4</bitWidth> + </field> + </fields> + </register> + <register> + <name>BRR</name> + <displayName>BRR</displayName> + <description>Port bit reset register</description> + <addressOffset>0x28</addressOffset> + <size>0x20</size> + <access>write-only</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>BR0</name> + <description>Port x Reset bit y</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR1</name> + <description>Port x Reset bit y</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR2</name> + <description>Port x Reset bit y</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR3</name> + <description>Port x Reset bit y</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR4</name> + <description>Port x Reset bit y</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR5</name> + <description>Port x Reset bit y</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR6</name> + <description>Port x Reset bit y</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR7</name> + <description>Port x Reset bit y</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR8</name> + <description>Port x Reset bit y</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR9</name> + <description>Port x Reset bit y</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR10</name> + <description>Port x Reset bit y</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR11</name> + <description>Port x Reset bit y</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR12</name> + <description>Port x Reset bit y</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR13</name> + <description>Port x Reset bit y</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR14</name> + <description>Port x Reset bit y</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR15</name> + <description>Port x Reset bit y</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + </registers> + </peripheral> + <peripheral derivedFrom="GPIOF"> + <name>GPIOD</name> + <baseAddress>0x48000C00</baseAddress> + </peripheral> + <peripheral derivedFrom="GPIOF"> + <name>GPIOC</name> + <baseAddress>0x48000800</baseAddress> + </peripheral> + <peripheral derivedFrom="GPIOF"> + <name>GPIOB</name> + <baseAddress>0x48000400</baseAddress> + </peripheral> + <peripheral derivedFrom="GPIOF"> + <name>GPIOE</name> + <baseAddress>0x48001000</baseAddress> + </peripheral> + <peripheral> + <name>GPIOA</name> + <description>General-purpose I/Os</description> + <groupName>GPIO</groupName> + <baseAddress>0x48000000</baseAddress> + <addressBlock> + <offset>0x0</offset> + <size>0x400</size> + <usage>registers</usage> + </addressBlock> + <registers> + <register> + <name>MODER</name> + <displayName>MODER</displayName> + <description>GPIO port mode register</description> + <addressOffset>0x0</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x28000000</resetValue> + <fields> + <field> + <name>MODER15</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>30</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>MODER14</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>28</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>MODER13</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>26</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>MODER12</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>24</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>MODER11</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>22</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>MODER10</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>20</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>MODER9</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>18</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>MODER8</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>16</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>MODER7</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>14</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>MODER6</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>12</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>MODER5</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>10</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>MODER4</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>8</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>MODER3</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>6</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>MODER2</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>4</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>MODER1</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>2</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>MODER0</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>0</bitOffset> + <bitWidth>2</bitWidth> + </field> + </fields> + </register> + <register> + <name>OTYPER</name> + <displayName>OTYPER</displayName> + <description>GPIO port output type register</description> + <addressOffset>0x4</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>OT15</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OT14</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OT13</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OT12</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OT11</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OT10</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OT9</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OT8</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OT7</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OT6</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OT5</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OT4</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OT3</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OT2</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OT1</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OT0</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>OSPEEDR</name> + <displayName>OSPEEDR</displayName> + <description>GPIO port output speed + register</description> + <addressOffset>0x8</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>OSPEEDR15</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>30</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>OSPEEDR14</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>28</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>OSPEEDR13</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>26</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>OSPEEDR12</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>24</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>OSPEEDR11</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>22</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>OSPEEDR10</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>20</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>OSPEEDR9</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>18</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>OSPEEDR8</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>16</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>OSPEEDR7</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>14</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>OSPEEDR6</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>12</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>OSPEEDR5</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>10</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>OSPEEDR4</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>8</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>OSPEEDR3</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>6</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>OSPEEDR2</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>4</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>OSPEEDR1</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>2</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>OSPEEDR0</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>0</bitOffset> + <bitWidth>2</bitWidth> + </field> + </fields> + </register> + <register> + <name>PUPDR</name> + <displayName>PUPDR</displayName> + <description>GPIO port pull-up/pull-down + register</description> + <addressOffset>0xC</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x24000000</resetValue> + <fields> + <field> + <name>PUPDR15</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>30</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PUPDR14</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>28</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PUPDR13</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>26</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PUPDR12</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>24</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PUPDR11</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>22</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PUPDR10</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>20</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PUPDR9</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>18</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PUPDR8</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>16</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PUPDR7</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>14</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PUPDR6</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>12</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PUPDR5</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>10</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PUPDR4</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>8</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PUPDR3</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>6</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PUPDR2</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>4</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PUPDR1</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>2</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PUPDR0</name> + <description>Port x configuration bits (y = + 0..15)</description> + <bitOffset>0</bitOffset> + <bitWidth>2</bitWidth> + </field> + </fields> + </register> + <register> + <name>IDR</name> + <displayName>IDR</displayName> + <description>GPIO port input data register</description> + <addressOffset>0x10</addressOffset> + <size>0x20</size> + <access>read-only</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>IDR15</name> + <description>Port input data (y = + 0..15)</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>IDR14</name> + <description>Port input data (y = + 0..15)</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>IDR13</name> + <description>Port input data (y = + 0..15)</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>IDR12</name> + <description>Port input data (y = + 0..15)</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>IDR11</name> + <description>Port input data (y = + 0..15)</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>IDR10</name> + <description>Port input data (y = + 0..15)</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>IDR9</name> + <description>Port input data (y = + 0..15)</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>IDR8</name> + <description>Port input data (y = + 0..15)</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>IDR7</name> + <description>Port input data (y = + 0..15)</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>IDR6</name> + <description>Port input data (y = + 0..15)</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>IDR5</name> + <description>Port input data (y = + 0..15)</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>IDR4</name> + <description>Port input data (y = + 0..15)</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>IDR3</name> + <description>Port input data (y = + 0..15)</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>IDR2</name> + <description>Port input data (y = + 0..15)</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>IDR1</name> + <description>Port input data (y = + 0..15)</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>IDR0</name> + <description>Port input data (y = + 0..15)</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>ODR</name> + <displayName>ODR</displayName> + <description>GPIO port output data register</description> + <addressOffset>0x14</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>ODR15</name> + <description>Port output data (y = + 0..15)</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ODR14</name> + <description>Port output data (y = + 0..15)</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ODR13</name> + <description>Port output data (y = + 0..15)</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ODR12</name> + <description>Port output data (y = + 0..15)</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ODR11</name> + <description>Port output data (y = + 0..15)</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ODR10</name> + <description>Port output data (y = + 0..15)</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ODR9</name> + <description>Port output data (y = + 0..15)</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ODR8</name> + <description>Port output data (y = + 0..15)</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ODR7</name> + <description>Port output data (y = + 0..15)</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ODR6</name> + <description>Port output data (y = + 0..15)</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ODR5</name> + <description>Port output data (y = + 0..15)</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ODR4</name> + <description>Port output data (y = + 0..15)</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ODR3</name> + <description>Port output data (y = + 0..15)</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ODR2</name> + <description>Port output data (y = + 0..15)</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ODR1</name> + <description>Port output data (y = + 0..15)</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ODR0</name> + <description>Port output data (y = + 0..15)</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>BSRR</name> + <displayName>BSRR</displayName> + <description>GPIO port bit set/reset + register</description> + <addressOffset>0x18</addressOffset> + <size>0x20</size> + <access>write-only</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>BR15</name> + <description>Port x reset bit y (y = + 0..15)</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR14</name> + <description>Port x reset bit y (y = + 0..15)</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR13</name> + <description>Port x reset bit y (y = + 0..15)</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR12</name> + <description>Port x reset bit y (y = + 0..15)</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR11</name> + <description>Port x reset bit y (y = + 0..15)</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR10</name> + <description>Port x reset bit y (y = + 0..15)</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR9</name> + <description>Port x reset bit y (y = + 0..15)</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR8</name> + <description>Port x reset bit y (y = + 0..15)</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR7</name> + <description>Port x reset bit y (y = + 0..15)</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR6</name> + <description>Port x reset bit y (y = + 0..15)</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR5</name> + <description>Port x reset bit y (y = + 0..15)</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR4</name> + <description>Port x reset bit y (y = + 0..15)</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR3</name> + <description>Port x reset bit y (y = + 0..15)</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR2</name> + <description>Port x reset bit y (y = + 0..15)</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR1</name> + <description>Port x reset bit y (y = + 0..15)</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR0</name> + <description>Port x set bit y (y= + 0..15)</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BS15</name> + <description>Port x set bit y (y= + 0..15)</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BS14</name> + <description>Port x set bit y (y= + 0..15)</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BS13</name> + <description>Port x set bit y (y= + 0..15)</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BS12</name> + <description>Port x set bit y (y= + 0..15)</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BS11</name> + <description>Port x set bit y (y= + 0..15)</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BS10</name> + <description>Port x set bit y (y= + 0..15)</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BS9</name> + <description>Port x set bit y (y= + 0..15)</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BS8</name> + <description>Port x set bit y (y= + 0..15)</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BS7</name> + <description>Port x set bit y (y= + 0..15)</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BS6</name> + <description>Port x set bit y (y= + 0..15)</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BS5</name> + <description>Port x set bit y (y= + 0..15)</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BS4</name> + <description>Port x set bit y (y= + 0..15)</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BS3</name> + <description>Port x set bit y (y= + 0..15)</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BS2</name> + <description>Port x set bit y (y= + 0..15)</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BS1</name> + <description>Port x set bit y (y= + 0..15)</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BS0</name> + <description>Port x set bit y (y= + 0..15)</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>LCKR</name> + <displayName>LCKR</displayName> + <description>GPIO port configuration lock + register</description> + <addressOffset>0x1C</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>LCKK</name> + <description>Port x lock bit y (y= + 0..15)</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>LCK15</name> + <description>Port x lock bit y (y= + 0..15)</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>LCK14</name> + <description>Port x lock bit y (y= + 0..15)</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>LCK13</name> + <description>Port x lock bit y (y= + 0..15)</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>LCK12</name> + <description>Port x lock bit y (y= + 0..15)</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>LCK11</name> + <description>Port x lock bit y (y= + 0..15)</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>LCK10</name> + <description>Port x lock bit y (y= + 0..15)</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>LCK9</name> + <description>Port x lock bit y (y= + 0..15)</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>LCK8</name> + <description>Port x lock bit y (y= + 0..15)</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>LCK7</name> + <description>Port x lock bit y (y= + 0..15)</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>LCK6</name> + <description>Port x lock bit y (y= + 0..15)</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>LCK5</name> + <description>Port x lock bit y (y= + 0..15)</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>LCK4</name> + <description>Port x lock bit y (y= + 0..15)</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>LCK3</name> + <description>Port x lock bit y (y= + 0..15)</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>LCK2</name> + <description>Port x lock bit y (y= + 0..15)</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>LCK1</name> + <description>Port x lock bit y (y= + 0..15)</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>LCK0</name> + <description>Port x lock bit y (y= + 0..15)</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>AFRL</name> + <displayName>AFRL</displayName> + <description>GPIO alternate function low + register</description> + <addressOffset>0x20</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>AFRL7</name> + <description>Alternate function selection for port x + bit y (y = 0..7)</description> + <bitOffset>28</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>AFRL6</name> + <description>Alternate function selection for port x + bit y (y = 0..7)</description> + <bitOffset>24</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>AFRL5</name> + <description>Alternate function selection for port x + bit y (y = 0..7)</description> + <bitOffset>20</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>AFRL4</name> + <description>Alternate function selection for port x + bit y (y = 0..7)</description> + <bitOffset>16</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>AFRL3</name> + <description>Alternate function selection for port x + bit y (y = 0..7)</description> + <bitOffset>12</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>AFRL2</name> + <description>Alternate function selection for port x + bit y (y = 0..7)</description> + <bitOffset>8</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>AFRL1</name> + <description>Alternate function selection for port x + bit y (y = 0..7)</description> + <bitOffset>4</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>AFRL0</name> + <description>Alternate function selection for port x + bit y (y = 0..7)</description> + <bitOffset>0</bitOffset> + <bitWidth>4</bitWidth> + </field> + </fields> + </register> + <register> + <name>AFRH</name> + <displayName>AFRH</displayName> + <description>GPIO alternate function high + register</description> + <addressOffset>0x24</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>AFRH15</name> + <description>Alternate function selection for port x + bit y (y = 8..15)</description> + <bitOffset>28</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>AFRH14</name> + <description>Alternate function selection for port x + bit y (y = 8..15)</description> + <bitOffset>24</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>AFRH13</name> + <description>Alternate function selection for port x + bit y (y = 8..15)</description> + <bitOffset>20</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>AFRH12</name> + <description>Alternate function selection for port x + bit y (y = 8..15)</description> + <bitOffset>16</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>AFRH11</name> + <description>Alternate function selection for port x + bit y (y = 8..15)</description> + <bitOffset>12</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>AFRH10</name> + <description>Alternate function selection for port x + bit y (y = 8..15)</description> + <bitOffset>8</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>AFRH9</name> + <description>Alternate function selection for port x + bit y (y = 8..15)</description> + <bitOffset>4</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>AFRH8</name> + <description>Alternate function selection for port x + bit y (y = 8..15)</description> + <bitOffset>0</bitOffset> + <bitWidth>4</bitWidth> + </field> + </fields> + </register> + <register> + <name>BRR</name> + <displayName>BRR</displayName> + <description>Port bit reset register</description> + <addressOffset>0x28</addressOffset> + <size>0x20</size> + <access>write-only</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>BR0</name> + <description>Port x Reset bit y</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR1</name> + <description>Port x Reset bit y</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR2</name> + <description>Port x Reset bit y</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR3</name> + <description>Port x Reset bit y</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR4</name> + <description>Port x Reset bit y</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR5</name> + <description>Port x Reset bit y</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR6</name> + <description>Port x Reset bit y</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR7</name> + <description>Port x Reset bit y</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR8</name> + <description>Port x Reset bit y</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR9</name> + <description>Port x Reset bit y</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR10</name> + <description>Port x Reset bit y</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR11</name> + <description>Port x Reset bit y</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR12</name> + <description>Port x Reset bit y</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR13</name> + <description>Port x Reset bit y</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR14</name> + <description>Port x Reset bit y</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR15</name> + <description>Port x Reset bit y</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + </registers> + </peripheral> + <peripheral> + <name>SPI1</name> + <description>Serial peripheral interface</description> + <groupName>SPI</groupName> + <baseAddress>0x40013000</baseAddress> + <addressBlock> + <offset>0x0</offset> + <size>0x400</size> + <usage>registers</usage> + </addressBlock> + <interrupt> + <name>SPI1</name> + <description>SPI1_global_interrupt</description> + <value>25</value> + </interrupt> + <registers> + <register> + <name>CR1</name> + <displayName>CR1</displayName> + <description>control register 1</description> + <addressOffset>0x0</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>BIDIMODE</name> + <description>Bidirectional data mode + enable</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BIDIOE</name> + <description>Output enable in bidirectional + mode</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CRCEN</name> + <description>Hardware CRC calculation + enable</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CRCNEXT</name> + <description>CRC transfer next</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>DFF</name> + <description>Data frame format</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>RXONLY</name> + <description>Receive only</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SSM</name> + <description>Software slave management</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SSI</name> + <description>Internal slave select</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>LSBFIRST</name> + <description>Frame format</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SPE</name> + <description>SPI enable</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BR</name> + <description>Baud rate control</description> + <bitOffset>3</bitOffset> + <bitWidth>3</bitWidth> + </field> + <field> + <name>MSTR</name> + <description>Master selection</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CPOL</name> + <description>Clock polarity</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CPHA</name> + <description>Clock phase</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>CR2</name> + <displayName>CR2</displayName> + <description>control register 2</description> + <addressOffset>0x4</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>RXDMAEN</name> + <description>Rx buffer DMA enable</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TXDMAEN</name> + <description>Tx buffer DMA enable</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SSOE</name> + <description>SS output enable</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>NSSP</name> + <description>NSS pulse management</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FRF</name> + <description>Frame format</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ERRIE</name> + <description>Error interrupt enable</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>RXNEIE</name> + <description>RX buffer not empty interrupt + enable</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TXEIE</name> + <description>Tx buffer empty interrupt + enable</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>DS</name> + <description>Data size</description> + <bitOffset>8</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>FRXTH</name> + <description>FIFO reception threshold</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>LDMA_RX</name> + <description>Last DMA transfer for + reception</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>LDMA_TX</name> + <description>Last DMA transfer for + transmission</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>SR</name> + <displayName>SR</displayName> + <description>status register</description> + <addressOffset>0x8</addressOffset> + <size>0x20</size> + <resetValue>0x0002</resetValue> + <fields> + <field> + <name>RXNE</name> + <description>Receive buffer not empty</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>TXE</name> + <description>Transmit buffer empty</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>CHSIDE</name> + <description>Channel side</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>UDR</name> + <description>Underrun flag</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>CRCERR</name> + <description>CRC error flag</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>MODF</name> + <description>Mode fault</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>OVR</name> + <description>Overrun flag</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>BSY</name> + <description>Busy flag</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>TIFRFE</name> + <description>TI frame format error</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>FRLVL</name> + <description>FIFO reception level</description> + <bitOffset>9</bitOffset> + <bitWidth>2</bitWidth> + <access>read-only</access> + </field> + <field> + <name>FTLVL</name> + <description>FIFO transmission level</description> + <bitOffset>11</bitOffset> + <bitWidth>2</bitWidth> + <access>read-only</access> + </field> + </fields> + </register> + <register> + <name>DR</name> + <displayName>DR</displayName> + <description>data register</description> + <addressOffset>0xC</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>DR</name> + <description>Data register</description> + <bitOffset>0</bitOffset> + <bitWidth>16</bitWidth> + </field> + </fields> + </register> + <register> + <name>CRCPR</name> + <displayName>CRCPR</displayName> + <description>CRC polynomial register</description> + <addressOffset>0x10</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0007</resetValue> + <fields> + <field> + <name>CRCPOLY</name> + <description>CRC polynomial register</description> + <bitOffset>0</bitOffset> + <bitWidth>16</bitWidth> + </field> + </fields> + </register> + <register> + <name>RXCRCR</name> + <displayName>RXCRCR</displayName> + <description>RX CRC register</description> + <addressOffset>0x14</addressOffset> + <size>0x20</size> + <access>read-only</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>RxCRC</name> + <description>Rx CRC register</description> + <bitOffset>0</bitOffset> + <bitWidth>16</bitWidth> + </field> + </fields> + </register> + <register> + <name>TXCRCR</name> + <displayName>TXCRCR</displayName> + <description>TX CRC register</description> + <addressOffset>0x18</addressOffset> + <size>0x20</size> + <access>read-only</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>TxCRC</name> + <description>Tx CRC register</description> + <bitOffset>0</bitOffset> + <bitWidth>16</bitWidth> + </field> + </fields> + </register> + <register> + <name>I2SCFGR</name> + <displayName>I2SCFGR</displayName> + <description>I2S configuration register</description> + <addressOffset>0x1C</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>I2SMOD</name> + <description>I2S mode selection</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>I2SE</name> + <description>I2S Enable</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>I2SCFG</name> + <description>I2S configuration mode</description> + <bitOffset>8</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PCMSYNC</name> + <description>PCM frame synchronization</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>I2SSTD</name> + <description>I2S standard selection</description> + <bitOffset>4</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>CKPOL</name> + <description>Steady state clock + polarity</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>DATLEN</name> + <description>Data length to be + transferred</description> + <bitOffset>1</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>CHLEN</name> + <description>Channel length (number of bits per audio + channel)</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>I2SPR</name> + <displayName>I2SPR</displayName> + <description>I2S prescaler register</description> + <addressOffset>0x20</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000010</resetValue> + <fields> + <field> + <name>MCKOE</name> + <description>Master clock output enable</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ODD</name> + <description>Odd factor for the + prescaler</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>I2SDIV</name> + <description>I2S Linear prescaler</description> + <bitOffset>0</bitOffset> + <bitWidth>8</bitWidth> + </field> + </fields> + </register> + </registers> + </peripheral> + <peripheral derivedFrom="SPI1"> + <name>SPI2</name> + <baseAddress>0x40003800</baseAddress> + <interrupt> + <name>SPI2</name> + <description>SPI2 global interrupt</description> + <value>26</value> + </interrupt> + </peripheral> + <peripheral> + <name>DAC</name> + <description>Digital-to-analog converter</description> + <groupName>DAC</groupName> + <baseAddress>0x40007400</baseAddress> + <addressBlock> + <offset>0x0</offset> + <size>0x400</size> + <usage>registers</usage> + </addressBlock> + <interrupt> + <name>TIM6_DAC</name> + <description>TIM6 global interrupt and DAC underrun + interrupt</description> + <value>17</value> + </interrupt> + <registers> + <register> + <name>CR</name> + <displayName>CR</displayName> + <description>control register</description> + <addressOffset>0x0</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>EN1</name> + <description>DAC channel1 enable</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BOFF1</name> + <description>DAC channel1 output buffer + disable</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TEN1</name> + <description>DAC channel1 trigger + enable</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TSEL1</name> + <description>DAC channel1 trigger + selection</description> + <bitOffset>3</bitOffset> + <bitWidth>3</bitWidth> + </field> + <field> + <name>WAVE1</name> + <description>DAC channel1 noise/triangle wave + generation enable</description> + <bitOffset>6</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>MAMP1</name> + <description>DAC channel1 mask/amplitude + selector</description> + <bitOffset>8</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>DMAEN1</name> + <description>DAC channel1 DMA enable</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>DMAUDRIE1</name> + <description>DAC channel1 DMA Underrun Interrupt + enable</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>EN2</name> + <description>DAC channel2 enable</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BOFF2</name> + <description>DAC channel2 output buffer + disable</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TEN2</name> + <description>DAC channel2 trigger + enable</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TSEL2</name> + <description>DAC channel2 trigger + selection</description> + <bitOffset>19</bitOffset> + <bitWidth>3</bitWidth> + </field> + <field> + <name>WAVE2</name> + <description>DAC channel2 noise/triangle wave + generation enable</description> + <bitOffset>22</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>MAMP2</name> + <description>DAC channel2 mask/amplitude + selector</description> + <bitOffset>24</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>DMAEN2</name> + <description>DAC channel2 DMA enable</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>DMAUDRIE2</name> + <description>DAC channel2 DMA underrun interrupt + enable</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>SWTRIGR</name> + <displayName>SWTRIGR</displayName> + <description>software trigger register</description> + <addressOffset>0x4</addressOffset> + <size>0x20</size> + <access>write-only</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>SWTRIG1</name> + <description>DAC channel1 software + trigger</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SWTRIG2</name> + <description>DAC channel2 software + trigger</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>DHR12R1</name> + <displayName>DHR12R1</displayName> + <description>channel1 12-bit right-aligned data holding + register</description> + <addressOffset>0x8</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>DACC1DHR</name> + <description>DAC channel1 12-bit right-aligned + data</description> + <bitOffset>0</bitOffset> + <bitWidth>12</bitWidth> + </field> + </fields> + </register> + <register> + <name>DHR12L1</name> + <displayName>DHR12L1</displayName> + <description>channel1 12-bit left aligned data holding + register</description> + <addressOffset>0xC</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>DACC1DHR</name> + <description>DAC channel1 12-bit left-aligned + data</description> + <bitOffset>4</bitOffset> + <bitWidth>12</bitWidth> + </field> + </fields> + </register> + <register> + <name>DHR8R1</name> + <displayName>DHR8R1</displayName> + <description>channel1 8-bit right aligned data holding + register</description> + <addressOffset>0x10</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>DACC1DHR</name> + <description>DAC channel1 8-bit right-aligned + data</description> + <bitOffset>0</bitOffset> + <bitWidth>8</bitWidth> + </field> + </fields> + </register> + <register> + <name>DOR1</name> + <displayName>DOR1</displayName> + <description>channel1 data output register</description> + <addressOffset>0x2C</addressOffset> + <size>0x20</size> + <access>read-only</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>DACC1DOR</name> + <description>DAC channel1 data output</description> + <bitOffset>0</bitOffset> + <bitWidth>12</bitWidth> + </field> + </fields> + </register> + <register> + <name>SR</name> + <displayName>SR</displayName> + <description>status register</description> + <addressOffset>0x34</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>DMAUDR2</name> + <description>DAC channel2 DMA underrun + flag</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>DMAUDR1</name> + <description>DAC channel1 DMA underrun + flag</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>DHR12R2</name> + <displayName>DHR12R2</displayName> + <description>DAC channel2 12-bit right-aligned data + holding register</description> + <addressOffset>0x14</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>DACC2DHR</name> + <description>DAC channel2 12-bit right-aligned + data</description> + <bitOffset>0</bitOffset> + <bitWidth>12</bitWidth> + </field> + </fields> + </register> + <register> + <name>DHR12L2</name> + <displayName>DHR12L2</displayName> + <description>DAC channel2 12-bit left-aligned data + holding register</description> + <addressOffset>0x18</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>DACC2DHR</name> + <description>DAC channel2 12-bit left-aligned + data</description> + <bitOffset>4</bitOffset> + <bitWidth>12</bitWidth> + </field> + </fields> + </register> + <register> + <name>DHR8R2</name> + <displayName>DHR8R2</displayName> + <description>DAC channel2 8-bit right-aligned data + holding register</description> + <addressOffset>0x1C</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>DACC2DHR</name> + <description>DAC channel2 8-bit right-aligned + data</description> + <bitOffset>0</bitOffset> + <bitWidth>8</bitWidth> + </field> + </fields> + </register> + <register> + <name>DHR12RD</name> + <displayName>DHR12RD</displayName> + <description>DHR12RD</description> + <addressOffset>0x20</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>DACC1DHR</name> + <description>DAC channel1 12-bit right-aligned + data</description> + <bitOffset>0</bitOffset> + <bitWidth>12</bitWidth> + </field> + <field> + <name>DACC2DHR</name> + <description>DAC channel2 12-bit right-aligned + data</description> + <bitOffset>16</bitOffset> + <bitWidth>12</bitWidth> + </field> + </fields> + </register> + <register> + <name>DHR12LD</name> + <displayName>DHR12LD</displayName> + <description>Dual DAC 12-bit left-aligned data holding + register</description> + <addressOffset>0x24</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>DACC1DHR</name> + <description>DAC channel1 12-bit left-aligned + data</description> + <bitOffset>4</bitOffset> + <bitWidth>12</bitWidth> + </field> + <field> + <name>DACC2DHR</name> + <description>DAC channel2 12-bit left-aligned + data</description> + <bitOffset>20</bitOffset> + <bitWidth>12</bitWidth> + </field> + </fields> + </register> + <register> + <name>DHR8RD</name> + <displayName>DHR8RD</displayName> + <description>Dual DAC 8-bit right-aligned data holding + register</description> + <addressOffset>0x28</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>DACC2DHR</name> + <description>DAC channel2 8-bit right-aligned + data</description> + <bitOffset>8</bitOffset> + <bitWidth>8</bitWidth> + </field> + <field> + <name>DACC1DHR</name> + <description>DAC channel1 8-bit right-aligned + data</description> + <bitOffset>0</bitOffset> + <bitWidth>8</bitWidth> + </field> + </fields> + </register> + <register> + <name>DOR2</name> + <displayName>DOR2</displayName> + <description>DAC channel2 data output + register</description> + <addressOffset>0x30</addressOffset> + <size>0x20</size> + <access>read-only</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>DACC2DOR</name> + <description>DAC channel2 data output</description> + <bitOffset>0</bitOffset> + <bitWidth>12</bitWidth> + </field> + </fields> + </register> + </registers> + </peripheral> + <peripheral> + <name>PWR</name> + <description>Power control</description> + <groupName>PWR</groupName> + <baseAddress>0x40007000</baseAddress> + <addressBlock> + <offset>0x0</offset> + <size>0x400</size> + <usage>registers</usage> + </addressBlock> + <registers> + <register> + <name>CR</name> + <displayName>CR</displayName> + <description>power control register</description> + <addressOffset>0x0</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>DBP</name> + <description>Disable backup domain write + protection</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PLS</name> + <description>PVD level selection</description> + <bitOffset>5</bitOffset> + <bitWidth>3</bitWidth> + </field> + <field> + <name>PVDE</name> + <description>Power voltage detector + enable</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CSBF</name> + <description>Clear standby flag</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CWUF</name> + <description>Clear wakeup flag</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PDDS</name> + <description>Power down deepsleep</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>LPDS</name> + <description>Low-power deep sleep</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>CSR</name> + <displayName>CSR</displayName> + <description>power control/status register</description> + <addressOffset>0x4</addressOffset> + <size>0x20</size> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>WUF</name> + <description>Wakeup flag</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>SBF</name> + <description>Standby flag</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>PVDO</name> + <description>PVD output</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>VREFINTRDY</name> + <description>VREFINT reference voltage + ready</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>EWUP1</name> + <description>Enable WKUP pin 1</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>EWUP2</name> + <description>Enable WKUP pin 2</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>EWUP3</name> + <description>Enable WKUP pin 3</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>EWUP4</name> + <description>Enable WKUP pin 4</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>EWUP5</name> + <description>Enable WKUP pin 5</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>EWUP6</name> + <description>Enable WKUP pin 6</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>EWUP7</name> + <description>Enable WKUP pin 7</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>EWUP8</name> + <description>Enable WKUP pin 8</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + </fields> + </register> + </registers> + </peripheral> + <peripheral> + <name>I2C1</name> + <description>Inter-integrated circuit</description> + <groupName>I2C</groupName> + <baseAddress>0x40005400</baseAddress> + <addressBlock> + <offset>0x0</offset> + <size>0x400</size> + <usage>registers</usage> + </addressBlock> + <interrupt> + <name>I2C1</name> + <description>I2C1 global interrupt</description> + <value>23</value> + </interrupt> + <registers> + <register> + <name>CR1</name> + <displayName>CR1</displayName> + <description>Control register 1</description> + <addressOffset>0x0</addressOffset> + <size>0x20</size> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>PE</name> + <description>Peripheral enable</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>TXIE</name> + <description>TX Interrupt enable</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>RXIE</name> + <description>RX Interrupt enable</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>ADDRIE</name> + <description>Address match interrupt enable (slave + only)</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>NACKIE</name> + <description>Not acknowledge received interrupt + enable</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>STOPIE</name> + <description>STOP detection Interrupt + enable</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>TCIE</name> + <description>Transfer Complete interrupt + enable</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>ERRIE</name> + <description>Error interrupts enable</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>DNF</name> + <description>Digital noise filter</description> + <bitOffset>8</bitOffset> + <bitWidth>4</bitWidth> + <access>read-write</access> + </field> + <field> + <name>ANFOFF</name> + <description>Analog noise filter OFF</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>SWRST</name> + <description>Software reset</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + <access>write-only</access> + </field> + <field> + <name>TXDMAEN</name> + <description>DMA transmission requests + enable</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>RXDMAEN</name> + <description>DMA reception requests + enable</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>SBC</name> + <description>Slave byte control</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>NOSTRETCH</name> + <description>Clock stretching disable</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>WUPEN</name> + <description>Wakeup from STOP enable</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>GCEN</name> + <description>General call enable</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>SMBHEN</name> + <description>SMBus Host address enable</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>SMBDEN</name> + <description>SMBus Device Default address + enable</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>ALERTEN</name> + <description>SMBUS alert enable</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>PECEN</name> + <description>PEC enable</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + </fields> + </register> + <register> + <name>CR2</name> + <displayName>CR2</displayName> + <description>Control register 2</description> + <addressOffset>0x4</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>PECBYTE</name> + <description>Packet error checking byte</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>AUTOEND</name> + <description>Automatic end mode (master + mode)</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>RELOAD</name> + <description>NBYTES reload mode</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>NBYTES</name> + <description>Number of bytes</description> + <bitOffset>16</bitOffset> + <bitWidth>8</bitWidth> + </field> + <field> + <name>NACK</name> + <description>NACK generation (slave + mode)</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>STOP</name> + <description>Stop generation (master + mode)</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>START</name> + <description>Start generation</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>HEAD10R</name> + <description>10-bit address header only read + direction (master receiver mode)</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ADD10</name> + <description>10-bit addressing mode (master + mode)</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>RD_WRN</name> + <description>Transfer direction (master + mode)</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SADD8</name> + <description>Slave address bit 9:8 (master + mode)</description> + <bitOffset>8</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>SADD1</name> + <description>Slave address bit 7:1 (master + mode)</description> + <bitOffset>1</bitOffset> + <bitWidth>7</bitWidth> + </field> + <field> + <name>SADD0</name> + <description>Slave address bit 0 (master + mode)</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>OAR1</name> + <displayName>OAR1</displayName> + <description>Own address register 1</description> + <addressOffset>0x8</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>OA1_0</name> + <description>Interface address</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OA1_1</name> + <description>Interface address</description> + <bitOffset>1</bitOffset> + <bitWidth>7</bitWidth> + </field> + <field> + <name>OA1_8</name> + <description>Interface address</description> + <bitOffset>8</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>OA1MODE</name> + <description>Own Address 1 10-bit mode</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OA1EN</name> + <description>Own Address 1 enable</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>OAR2</name> + <displayName>OAR2</displayName> + <description>Own address register 2</description> + <addressOffset>0xC</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>OA2</name> + <description>Interface address</description> + <bitOffset>1</bitOffset> + <bitWidth>7</bitWidth> + </field> + <field> + <name>OA2MSK</name> + <description>Own Address 2 masks</description> + <bitOffset>8</bitOffset> + <bitWidth>3</bitWidth> + </field> + <field> + <name>OA2EN</name> + <description>Own Address 2 enable</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>TIMINGR</name> + <displayName>TIMINGR</displayName> + <description>Timing register</description> + <addressOffset>0x10</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>SCLL</name> + <description>SCL low period (master + mode)</description> + <bitOffset>0</bitOffset> + <bitWidth>8</bitWidth> + </field> + <field> + <name>SCLH</name> + <description>SCL high period (master + mode)</description> + <bitOffset>8</bitOffset> + <bitWidth>8</bitWidth> + </field> + <field> + <name>SDADEL</name> + <description>Data hold time</description> + <bitOffset>16</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>SCLDEL</name> + <description>Data setup time</description> + <bitOffset>20</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>PRESC</name> + <description>Timing prescaler</description> + <bitOffset>28</bitOffset> + <bitWidth>4</bitWidth> + </field> + </fields> + </register> + <register> + <name>TIMEOUTR</name> + <displayName>TIMEOUTR</displayName> + <description>Status register 1</description> + <addressOffset>0x14</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>TIMEOUTA</name> + <description>Bus timeout A</description> + <bitOffset>0</bitOffset> + <bitWidth>12</bitWidth> + </field> + <field> + <name>TIDLE</name> + <description>Idle clock timeout + detection</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TIMOUTEN</name> + <description>Clock timeout enable</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TIMEOUTB</name> + <description>Bus timeout B</description> + <bitOffset>16</bitOffset> + <bitWidth>12</bitWidth> + </field> + <field> + <name>TEXTEN</name> + <description>Extended clock timeout + enable</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>ISR</name> + <displayName>ISR</displayName> + <description>Interrupt and Status register</description> + <addressOffset>0x18</addressOffset> + <size>0x20</size> + <resetValue>0x00000001</resetValue> + <fields> + <field> + <name>ADDCODE</name> + <description>Address match code (Slave + mode)</description> + <bitOffset>17</bitOffset> + <bitWidth>7</bitWidth> + <access>read-only</access> + </field> + <field> + <name>DIR</name> + <description>Transfer direction (Slave + mode)</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>BUSY</name> + <description>Bus busy</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>ALERT</name> + <description>SMBus alert</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>TIMEOUT</name> + <description>Timeout or t_low detection + flag</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>PECERR</name> + <description>PEC Error in reception</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>OVR</name> + <description>Overrun/Underrun (slave + mode)</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>ARLO</name> + <description>Arbitration lost</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>BERR</name> + <description>Bus error</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>TCR</name> + <description>Transfer Complete Reload</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>TC</name> + <description>Transfer Complete (master + mode)</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>STOPF</name> + <description>Stop detection flag</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>NACKF</name> + <description>Not acknowledge received + flag</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>ADDR</name> + <description>Address matched (slave + mode)</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>RXNE</name> + <description>Receive data register not empty + (receivers)</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>TXIS</name> + <description>Transmit interrupt status + (transmitters)</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>TXE</name> + <description>Transmit data register empty + (transmitters)</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + </fields> + </register> + <register> + <name>ICR</name> + <displayName>ICR</displayName> + <description>Interrupt clear register</description> + <addressOffset>0x1C</addressOffset> + <size>0x20</size> + <access>write-only</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>ALERTCF</name> + <description>Alert flag clear</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TIMOUTCF</name> + <description>Timeout detection flag + clear</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PECCF</name> + <description>PEC Error flag clear</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OVRCF</name> + <description>Overrun/Underrun flag + clear</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ARLOCF</name> + <description>Arbitration lost flag + clear</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BERRCF</name> + <description>Bus error flag clear</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>STOPCF</name> + <description>Stop detection flag clear</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>NACKCF</name> + <description>Not Acknowledge flag clear</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ADDRCF</name> + <description>Address Matched flag clear</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>PECR</name> + <displayName>PECR</displayName> + <description>PEC register</description> + <addressOffset>0x20</addressOffset> + <size>0x20</size> + <access>read-only</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>PEC</name> + <description>Packet error checking + register</description> + <bitOffset>0</bitOffset> + <bitWidth>8</bitWidth> + </field> + </fields> + </register> + <register> + <name>RXDR</name> + <displayName>RXDR</displayName> + <description>Receive data register</description> + <addressOffset>0x24</addressOffset> + <size>0x20</size> + <access>read-only</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>RXDATA</name> + <description>8-bit receive data</description> + <bitOffset>0</bitOffset> + <bitWidth>8</bitWidth> + </field> + </fields> + </register> + <register> + <name>TXDR</name> + <displayName>TXDR</displayName> + <description>Transmit data register</description> + <addressOffset>0x28</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>TXDATA</name> + <description>8-bit transmit data</description> + <bitOffset>0</bitOffset> + <bitWidth>8</bitWidth> + </field> + </fields> + </register> + </registers> + </peripheral> + <peripheral derivedFrom="I2C1"> + <name>I2C2</name> + <baseAddress>0x40005800</baseAddress> + <interrupt> + <name>I2C2</name> + <description>I2C2 global interrupt</description> + <value>24</value> + </interrupt> + </peripheral> + <peripheral> + <name>IWDG</name> + <description>Independent watchdog</description> + <groupName>IWDG</groupName> + <baseAddress>0x40003000</baseAddress> + <addressBlock> + <offset>0x0</offset> + <size>0x400</size> + <usage>registers</usage> + </addressBlock> + <registers> + <register> + <name>KR</name> + <displayName>KR</displayName> + <description>Key register</description> + <addressOffset>0x0</addressOffset> + <size>0x20</size> + <access>write-only</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>KEY</name> + <description>Key value</description> + <bitOffset>0</bitOffset> + <bitWidth>16</bitWidth> + </field> + </fields> + </register> + <register> + <name>PR</name> + <displayName>PR</displayName> + <description>Prescaler register</description> + <addressOffset>0x4</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>PR</name> + <description>Prescaler divider</description> + <bitOffset>0</bitOffset> + <bitWidth>3</bitWidth> + </field> + </fields> + </register> + <register> + <name>RLR</name> + <displayName>RLR</displayName> + <description>Reload register</description> + <addressOffset>0x8</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000FFF</resetValue> + <fields> + <field> + <name>RL</name> + <description>Watchdog counter reload + value</description> + <bitOffset>0</bitOffset> + <bitWidth>12</bitWidth> + </field> + </fields> + </register> + <register> + <name>SR</name> + <displayName>SR</displayName> + <description>Status register</description> + <addressOffset>0xC</addressOffset> + <size>0x20</size> + <access>read-only</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>PVU</name> + <description>Watchdog prescaler value + update</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>RVU</name> + <description>Watchdog counter reload value + update</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>WVU</name> + <description>Watchdog counter window value + update</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>WINR</name> + <displayName>WINR</displayName> + <description>Window register</description> + <addressOffset>0x10</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000FFF</resetValue> + <fields> + <field> + <name>WIN</name> + <description>Watchdog counter window + value</description> + <bitOffset>0</bitOffset> + <bitWidth>12</bitWidth> + </field> + </fields> + </register> + </registers> + </peripheral> + <peripheral> + <name>WWDG</name> + <description>Window watchdog</description> + <groupName>WWDG</groupName> + <baseAddress>0x40002C00</baseAddress> + <addressBlock> + <offset>0x0</offset> + <size>0x400</size> + <usage>registers</usage> + </addressBlock> + <interrupt> + <name>WWDG</name> + <description>Window Watchdog interrupt</description> + <value>0</value> + </interrupt> + <registers> + <register> + <name>CR</name> + <displayName>CR</displayName> + <description>Control register</description> + <addressOffset>0x0</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000007F</resetValue> + <fields> + <field> + <name>WDGA</name> + <description>Activation bit</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>T</name> + <description>7-bit counter</description> + <bitOffset>0</bitOffset> + <bitWidth>7</bitWidth> + </field> + </fields> + </register> + <register> + <name>CFR</name> + <displayName>CFR</displayName> + <description>Configuration register</description> + <addressOffset>0x4</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000007F</resetValue> + <fields> + <field> + <name>EWI</name> + <description>Early wakeup interrupt</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>WDGTB</name> + <description>Timer base</description> + <bitOffset>7</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>W</name> + <description>7-bit window value</description> + <bitOffset>0</bitOffset> + <bitWidth>7</bitWidth> + </field> + </fields> + </register> + <register> + <name>SR</name> + <displayName>SR</displayName> + <description>Status register</description> + <addressOffset>0x8</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>EWIF</name> + <description>Early wakeup interrupt + flag</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + </registers> + </peripheral> + <peripheral> + <name>TIM1</name> + <description>Advanced-timers</description> + <groupName>TIM</groupName> + <baseAddress>0x40012C00</baseAddress> + <addressBlock> + <offset>0x0</offset> + <size>0x400</size> + <usage>registers</usage> + </addressBlock> + <interrupt> + <name>TIM1_BRK_UP_TRG_COM</name> + <description>TIM1 break, update, trigger and commutation + interrupt</description> + <value>13</value> + </interrupt> + <interrupt> + <name>TIM1_CC</name> + <description>TIM1 Capture Compare interrupt</description> + <value>14</value> + </interrupt> + <registers> + <register> + <name>CR1</name> + <displayName>CR1</displayName> + <description>control register 1</description> + <addressOffset>0x0</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>CKD</name> + <description>Clock division</description> + <bitOffset>8</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>ARPE</name> + <description>Auto-reload preload enable</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CMS</name> + <description>Center-aligned mode + selection</description> + <bitOffset>5</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>DIR</name> + <description>Direction</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OPM</name> + <description>One-pulse mode</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>URS</name> + <description>Update request source</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>UDIS</name> + <description>Update disable</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CEN</name> + <description>Counter enable</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>CR2</name> + <displayName>CR2</displayName> + <description>control register 2</description> + <addressOffset>0x4</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>OIS4</name> + <description>Output Idle state 4</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OIS3N</name> + <description>Output Idle state 3</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OIS3</name> + <description>Output Idle state 3</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OIS2N</name> + <description>Output Idle state 2</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OIS2</name> + <description>Output Idle state 2</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OIS1N</name> + <description>Output Idle state 1</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OIS1</name> + <description>Output Idle state 1</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TI1S</name> + <description>TI1 selection</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MMS</name> + <description>Master mode selection</description> + <bitOffset>4</bitOffset> + <bitWidth>3</bitWidth> + </field> + <field> + <name>CCDS</name> + <description>Capture/compare DMA + selection</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CCUS</name> + <description>Capture/compare control update + selection</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CCPC</name> + <description>Capture/compare preloaded + control</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>SMCR</name> + <displayName>SMCR</displayName> + <description>slave mode control register</description> + <addressOffset>0x8</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>ETP</name> + <description>External trigger polarity</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ECE</name> + <description>External clock enable</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ETPS</name> + <description>External trigger prescaler</description> + <bitOffset>12</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>ETF</name> + <description>External trigger filter</description> + <bitOffset>8</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>MSM</name> + <description>Master/Slave mode</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TS</name> + <description>Trigger selection</description> + <bitOffset>4</bitOffset> + <bitWidth>3</bitWidth> + </field> + <field> + <name>SMS</name> + <description>Slave mode selection</description> + <bitOffset>0</bitOffset> + <bitWidth>3</bitWidth> + </field> + </fields> + </register> + <register> + <name>DIER</name> + <displayName>DIER</displayName> + <description>DMA/Interrupt enable register</description> + <addressOffset>0xC</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>TDE</name> + <description>Trigger DMA request enable</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>COMDE</name> + <description>COM DMA request enable</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC4DE</name> + <description>Capture/Compare 4 DMA request + enable</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC3DE</name> + <description>Capture/Compare 3 DMA request + enable</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC2DE</name> + <description>Capture/Compare 2 DMA request + enable</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC1DE</name> + <description>Capture/Compare 1 DMA request + enable</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>UDE</name> + <description>Update DMA request enable</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BIE</name> + <description>Break interrupt enable</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TIE</name> + <description>Trigger interrupt enable</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>COMIE</name> + <description>COM interrupt enable</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC4IE</name> + <description>Capture/Compare 4 interrupt + enable</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC3IE</name> + <description>Capture/Compare 3 interrupt + enable</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC2IE</name> + <description>Capture/Compare 2 interrupt + enable</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC1IE</name> + <description>Capture/Compare 1 interrupt + enable</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>UIE</name> + <description>Update interrupt enable</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>SR</name> + <displayName>SR</displayName> + <description>status register</description> + <addressOffset>0x10</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>CC4OF</name> + <description>Capture/Compare 4 overcapture + flag</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC3OF</name> + <description>Capture/Compare 3 overcapture + flag</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC2OF</name> + <description>Capture/compare 2 overcapture + flag</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC1OF</name> + <description>Capture/Compare 1 overcapture + flag</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BIF</name> + <description>Break interrupt flag</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TIF</name> + <description>Trigger interrupt flag</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>COMIF</name> + <description>COM interrupt flag</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC4IF</name> + <description>Capture/Compare 4 interrupt + flag</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC3IF</name> + <description>Capture/Compare 3 interrupt + flag</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC2IF</name> + <description>Capture/Compare 2 interrupt + flag</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC1IF</name> + <description>Capture/compare 1 interrupt + flag</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>UIF</name> + <description>Update interrupt flag</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>EGR</name> + <displayName>EGR</displayName> + <description>event generation register</description> + <addressOffset>0x14</addressOffset> + <size>0x20</size> + <access>write-only</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>BG</name> + <description>Break generation</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TG</name> + <description>Trigger generation</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>COMG</name> + <description>Capture/Compare control update + generation</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC4G</name> + <description>Capture/compare 4 + generation</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC3G</name> + <description>Capture/compare 3 + generation</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC2G</name> + <description>Capture/compare 2 + generation</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC1G</name> + <description>Capture/compare 1 + generation</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>UG</name> + <description>Update generation</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>CCMR1_Output</name> + <displayName>CCMR1_Output</displayName> + <description>capture/compare mode register (output + mode)</description> + <addressOffset>0x18</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>OC2CE</name> + <description>Output Compare 2 clear + enable</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OC2M</name> + <description>Output Compare 2 mode</description> + <bitOffset>12</bitOffset> + <bitWidth>3</bitWidth> + </field> + <field> + <name>OC2PE</name> + <description>Output Compare 2 preload + enable</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OC2FE</name> + <description>Output Compare 2 fast + enable</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC2S</name> + <description>Capture/Compare 2 + selection</description> + <bitOffset>8</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>OC1CE</name> + <description>Output Compare 1 clear + enable</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OC1M</name> + <description>Output Compare 1 mode</description> + <bitOffset>4</bitOffset> + <bitWidth>3</bitWidth> + </field> + <field> + <name>OC1PE</name> + <description>Output Compare 1 preload + enable</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OC1FE</name> + <description>Output Compare 1 fast + enable</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC1S</name> + <description>Capture/Compare 1 + selection</description> + <bitOffset>0</bitOffset> + <bitWidth>2</bitWidth> + </field> + </fields> + </register> + <register> + <name>CCMR1_Input</name> + <displayName>CCMR1_Input</displayName> + <description>capture/compare mode register 1 (input + mode)</description> + <alternateRegister>CCMR1_Output</alternateRegister> + <addressOffset>0x18</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>IC2F</name> + <description>Input capture 2 filter</description> + <bitOffset>12</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>IC2PCS</name> + <description>Input capture 2 prescaler</description> + <bitOffset>10</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>CC2S</name> + <description>Capture/Compare 2 + selection</description> + <bitOffset>8</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>IC1F</name> + <description>Input capture 1 filter</description> + <bitOffset>4</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>IC1PCS</name> + <description>Input capture 1 prescaler</description> + <bitOffset>2</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>CC1S</name> + <description>Capture/Compare 1 + selection</description> + <bitOffset>0</bitOffset> + <bitWidth>2</bitWidth> + </field> + </fields> + </register> + <register> + <name>CCMR2_Output</name> + <displayName>CCMR2_Output</displayName> + <description>capture/compare mode register (output + mode)</description> + <addressOffset>0x1C</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>OC4CE</name> + <description>Output compare 4 clear + enable</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OC4M</name> + <description>Output compare 4 mode</description> + <bitOffset>12</bitOffset> + <bitWidth>3</bitWidth> + </field> + <field> + <name>OC4PE</name> + <description>Output compare 4 preload + enable</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OC4FE</name> + <description>Output compare 4 fast + enable</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC4S</name> + <description>Capture/Compare 4 + selection</description> + <bitOffset>8</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>OC3CE</name> + <description>Output compare 3 clear + enable</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OC3M</name> + <description>Output compare 3 mode</description> + <bitOffset>4</bitOffset> + <bitWidth>3</bitWidth> + </field> + <field> + <name>OC3PE</name> + <description>Output compare 3 preload + enable</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OC3FE</name> + <description>Output compare 3 fast + enable</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC3S</name> + <description>Capture/Compare 3 + selection</description> + <bitOffset>0</bitOffset> + <bitWidth>2</bitWidth> + </field> + </fields> + </register> + <register> + <name>CCMR2_Input</name> + <displayName>CCMR2_Input</displayName> + <description>capture/compare mode register 2 (input + mode)</description> + <alternateRegister>CCMR2_Output</alternateRegister> + <addressOffset>0x1C</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>IC4F</name> + <description>Input capture 4 filter</description> + <bitOffset>12</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>IC4PSC</name> + <description>Input capture 4 prescaler</description> + <bitOffset>10</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>CC4S</name> + <description>Capture/Compare 4 + selection</description> + <bitOffset>8</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>IC3F</name> + <description>Input capture 3 filter</description> + <bitOffset>4</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>IC3PSC</name> + <description>Input capture 3 prescaler</description> + <bitOffset>2</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>CC3S</name> + <description>Capture/compare 3 + selection</description> + <bitOffset>0</bitOffset> + <bitWidth>2</bitWidth> + </field> + </fields> + </register> + <register> + <name>CCER</name> + <displayName>CCER</displayName> + <description>capture/compare enable + register</description> + <addressOffset>0x20</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>CC4P</name> + <description>Capture/Compare 3 output + Polarity</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC4E</name> + <description>Capture/Compare 4 output + enable</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC3NP</name> + <description>Capture/Compare 3 output + Polarity</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC3NE</name> + <description>Capture/Compare 3 complementary output + enable</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC3P</name> + <description>Capture/Compare 3 output + Polarity</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC3E</name> + <description>Capture/Compare 3 output + enable</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC2NP</name> + <description>Capture/Compare 2 output + Polarity</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC2NE</name> + <description>Capture/Compare 2 complementary output + enable</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC2P</name> + <description>Capture/Compare 2 output + Polarity</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC2E</name> + <description>Capture/Compare 2 output + enable</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC1NP</name> + <description>Capture/Compare 1 output + Polarity</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC1NE</name> + <description>Capture/Compare 1 complementary output + enable</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC1P</name> + <description>Capture/Compare 1 output + Polarity</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC1E</name> + <description>Capture/Compare 1 output + enable</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>CNT</name> + <displayName>CNT</displayName> + <description>counter</description> + <addressOffset>0x24</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>CNT</name> + <description>counter value</description> + <bitOffset>0</bitOffset> + <bitWidth>16</bitWidth> + </field> + </fields> + </register> + <register> + <name>PSC</name> + <displayName>PSC</displayName> + <description>prescaler</description> + <addressOffset>0x28</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>PSC</name> + <description>Prescaler value</description> + <bitOffset>0</bitOffset> + <bitWidth>16</bitWidth> + </field> + </fields> + </register> + <register> + <name>ARR</name> + <displayName>ARR</displayName> + <description>auto-reload register</description> + <addressOffset>0x2C</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>ARR</name> + <description>Auto-reload value</description> + <bitOffset>0</bitOffset> + <bitWidth>16</bitWidth> + </field> + </fields> + </register> + <register> + <name>RCR</name> + <displayName>RCR</displayName> + <description>repetition counter register</description> + <addressOffset>0x30</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>REP</name> + <description>Repetition counter value</description> + <bitOffset>0</bitOffset> + <bitWidth>8</bitWidth> + </field> + </fields> + </register> + <register> + <name>CCR1</name> + <displayName>CCR1</displayName> + <description>capture/compare register 1</description> + <addressOffset>0x34</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>CCR1</name> + <description>Capture/Compare 1 value</description> + <bitOffset>0</bitOffset> + <bitWidth>16</bitWidth> + </field> + </fields> + </register> + <register> + <name>CCR2</name> + <displayName>CCR2</displayName> + <description>capture/compare register 2</description> + <addressOffset>0x38</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>CCR2</name> + <description>Capture/Compare 2 value</description> + <bitOffset>0</bitOffset> + <bitWidth>16</bitWidth> + </field> + </fields> + </register> + <register> + <name>CCR3</name> + <displayName>CCR3</displayName> + <description>capture/compare register 3</description> + <addressOffset>0x3C</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>CCR3</name> + <description>Capture/Compare 3 value</description> + <bitOffset>0</bitOffset> + <bitWidth>16</bitWidth> + </field> + </fields> + </register> + <register> + <name>CCR4</name> + <displayName>CCR4</displayName> + <description>capture/compare register 4</description> + <addressOffset>0x40</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>CCR4</name> + <description>Capture/Compare 3 value</description> + <bitOffset>0</bitOffset> + <bitWidth>16</bitWidth> + </field> + </fields> + </register> + <register> + <name>BDTR</name> + <displayName>BDTR</displayName> + <description>break and dead-time register</description> + <addressOffset>0x44</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>MOE</name> + <description>Main output enable</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>AOE</name> + <description>Automatic output enable</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BKP</name> + <description>Break polarity</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BKE</name> + <description>Break enable</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OSSR</name> + <description>Off-state selection for Run + mode</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OSSI</name> + <description>Off-state selection for Idle + mode</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>LOCK</name> + <description>Lock configuration</description> + <bitOffset>8</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>DTG</name> + <description>Dead-time generator setup</description> + <bitOffset>0</bitOffset> + <bitWidth>8</bitWidth> + </field> + </fields> + </register> + <register> + <name>DCR</name> + <displayName>DCR</displayName> + <description>DMA control register</description> + <addressOffset>0x48</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>DBL</name> + <description>DMA burst length</description> + <bitOffset>8</bitOffset> + <bitWidth>5</bitWidth> + </field> + <field> + <name>DBA</name> + <description>DMA base address</description> + <bitOffset>0</bitOffset> + <bitWidth>5</bitWidth> + </field> + </fields> + </register> + <register> + <name>DMAR</name> + <displayName>DMAR</displayName> + <description>DMA address for full transfer</description> + <addressOffset>0x4C</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>DMAB</name> + <description>DMA register for burst + accesses</description> + <bitOffset>0</bitOffset> + <bitWidth>16</bitWidth> + </field> + </fields> + </register> + </registers> + </peripheral> + <peripheral> + <name>TIM2</name> + <description>General-purpose-timers</description> + <groupName>TIM</groupName> + <baseAddress>0x40000000</baseAddress> + <addressBlock> + <offset>0x0</offset> + <size>0x400</size> + <usage>registers</usage> + </addressBlock> + <interrupt> + <name>TIM2</name> + <description>TIM2 global interrupt</description> + <value>15</value> + </interrupt> + <registers> + <register> + <name>CR1</name> + <displayName>CR1</displayName> + <description>control register 1</description> + <addressOffset>0x0</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>CKD</name> + <description>Clock division</description> + <bitOffset>8</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>ARPE</name> + <description>Auto-reload preload enable</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CMS</name> + <description>Center-aligned mode + selection</description> + <bitOffset>5</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>DIR</name> + <description>Direction</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OPM</name> + <description>One-pulse mode</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>URS</name> + <description>Update request source</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>UDIS</name> + <description>Update disable</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CEN</name> + <description>Counter enable</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>CR2</name> + <displayName>CR2</displayName> + <description>control register 2</description> + <addressOffset>0x4</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>TI1S</name> + <description>TI1 selection</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MMS</name> + <description>Master mode selection</description> + <bitOffset>4</bitOffset> + <bitWidth>3</bitWidth> + </field> + <field> + <name>CCDS</name> + <description>Capture/compare DMA + selection</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>SMCR</name> + <displayName>SMCR</displayName> + <description>slave mode control register</description> + <addressOffset>0x8</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>ETP</name> + <description>External trigger polarity</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ECE</name> + <description>External clock enable</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ETPS</name> + <description>External trigger prescaler</description> + <bitOffset>12</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>ETF</name> + <description>External trigger filter</description> + <bitOffset>8</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>MSM</name> + <description>Master/Slave mode</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TS</name> + <description>Trigger selection</description> + <bitOffset>4</bitOffset> + <bitWidth>3</bitWidth> + </field> + <field> + <name>SMS</name> + <description>Slave mode selection</description> + <bitOffset>0</bitOffset> + <bitWidth>3</bitWidth> + </field> + </fields> + </register> + <register> + <name>DIER</name> + <displayName>DIER</displayName> + <description>DMA/Interrupt enable register</description> + <addressOffset>0xC</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>TDE</name> + <description>Trigger DMA request enable</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>COMDE</name> + <description>COM DMA request enable</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC4DE</name> + <description>Capture/Compare 4 DMA request + enable</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC3DE</name> + <description>Capture/Compare 3 DMA request + enable</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC2DE</name> + <description>Capture/Compare 2 DMA request + enable</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC1DE</name> + <description>Capture/Compare 1 DMA request + enable</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>UDE</name> + <description>Update DMA request enable</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TIE</name> + <description>Trigger interrupt enable</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC4IE</name> + <description>Capture/Compare 4 interrupt + enable</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC3IE</name> + <description>Capture/Compare 3 interrupt + enable</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC2IE</name> + <description>Capture/Compare 2 interrupt + enable</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC1IE</name> + <description>Capture/Compare 1 interrupt + enable</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>UIE</name> + <description>Update interrupt enable</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>SR</name> + <displayName>SR</displayName> + <description>status register</description> + <addressOffset>0x10</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>CC4OF</name> + <description>Capture/Compare 4 overcapture + flag</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC3OF</name> + <description>Capture/Compare 3 overcapture + flag</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC2OF</name> + <description>Capture/compare 2 overcapture + flag</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC1OF</name> + <description>Capture/Compare 1 overcapture + flag</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TIF</name> + <description>Trigger interrupt flag</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC4IF</name> + <description>Capture/Compare 4 interrupt + flag</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC3IF</name> + <description>Capture/Compare 3 interrupt + flag</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC2IF</name> + <description>Capture/Compare 2 interrupt + flag</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC1IF</name> + <description>Capture/compare 1 interrupt + flag</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>UIF</name> + <description>Update interrupt flag</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>EGR</name> + <displayName>EGR</displayName> + <description>event generation register</description> + <addressOffset>0x14</addressOffset> + <size>0x20</size> + <access>write-only</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>TG</name> + <description>Trigger generation</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC4G</name> + <description>Capture/compare 4 + generation</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC3G</name> + <description>Capture/compare 3 + generation</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC2G</name> + <description>Capture/compare 2 + generation</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC1G</name> + <description>Capture/compare 1 + generation</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>UG</name> + <description>Update generation</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>CCMR1_Output</name> + <displayName>CCMR1_Output</displayName> + <description>capture/compare mode register 1 (output + mode)</description> + <addressOffset>0x18</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>OC2CE</name> + <description>Output compare 2 clear + enable</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OC2M</name> + <description>Output compare 2 mode</description> + <bitOffset>12</bitOffset> + <bitWidth>3</bitWidth> + </field> + <field> + <name>OC2PE</name> + <description>Output compare 2 preload + enable</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OC2FE</name> + <description>Output compare 2 fast + enable</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC2S</name> + <description>Capture/Compare 2 + selection</description> + <bitOffset>8</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>OC1CE</name> + <description>Output compare 1 clear + enable</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OC1M</name> + <description>Output compare 1 mode</description> + <bitOffset>4</bitOffset> + <bitWidth>3</bitWidth> + </field> + <field> + <name>OC1PE</name> + <description>Output compare 1 preload + enable</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OC1FE</name> + <description>Output compare 1 fast + enable</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC1S</name> + <description>Capture/Compare 1 + selection</description> + <bitOffset>0</bitOffset> + <bitWidth>2</bitWidth> + </field> + </fields> + </register> + <register> + <name>CCMR1_Input</name> + <displayName>CCMR1_Input</displayName> + <description>capture/compare mode register 1 (input + mode)</description> + <alternateRegister>CCMR1_Output</alternateRegister> + <addressOffset>0x18</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>IC2F</name> + <description>Input capture 2 filter</description> + <bitOffset>12</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>IC2PSC</name> + <description>Input capture 2 prescaler</description> + <bitOffset>10</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>CC2S</name> + <description>Capture/compare 2 + selection</description> + <bitOffset>8</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>IC1F</name> + <description>Input capture 1 filter</description> + <bitOffset>4</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>IC1PSC</name> + <description>Input capture 1 prescaler</description> + <bitOffset>2</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>CC1S</name> + <description>Capture/Compare 1 + selection</description> + <bitOffset>0</bitOffset> + <bitWidth>2</bitWidth> + </field> + </fields> + </register> + <register> + <name>CCMR2_Output</name> + <displayName>CCMR2_Output</displayName> + <description>capture/compare mode register 2 (output + mode)</description> + <addressOffset>0x1C</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>OC4CE</name> + <description>Output compare 4 clear + enable</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OC4M</name> + <description>Output compare 4 mode</description> + <bitOffset>12</bitOffset> + <bitWidth>3</bitWidth> + </field> + <field> + <name>OC4PE</name> + <description>Output compare 4 preload + enable</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OC4FE</name> + <description>Output compare 4 fast + enable</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC4S</name> + <description>Capture/Compare 4 + selection</description> + <bitOffset>8</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>OC3CE</name> + <description>Output compare 3 clear + enable</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OC3M</name> + <description>Output compare 3 mode</description> + <bitOffset>4</bitOffset> + <bitWidth>3</bitWidth> + </field> + <field> + <name>OC3PE</name> + <description>Output compare 3 preload + enable</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OC3FE</name> + <description>Output compare 3 fast + enable</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC3S</name> + <description>Capture/Compare 3 + selection</description> + <bitOffset>0</bitOffset> + <bitWidth>2</bitWidth> + </field> + </fields> + </register> + <register> + <name>CCMR2_Input</name> + <displayName>CCMR2_Input</displayName> + <description>capture/compare mode register 2 (input + mode)</description> + <alternateRegister>CCMR2_Output</alternateRegister> + <addressOffset>0x1C</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>IC4F</name> + <description>Input capture 4 filter</description> + <bitOffset>12</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>IC4PSC</name> + <description>Input capture 4 prescaler</description> + <bitOffset>10</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>CC4S</name> + <description>Capture/Compare 4 + selection</description> + <bitOffset>8</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>IC3F</name> + <description>Input capture 3 filter</description> + <bitOffset>4</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>IC3PSC</name> + <description>Input capture 3 prescaler</description> + <bitOffset>2</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>CC3S</name> + <description>Capture/Compare 3 + selection</description> + <bitOffset>0</bitOffset> + <bitWidth>2</bitWidth> + </field> + </fields> + </register> + <register> + <name>CCER</name> + <displayName>CCER</displayName> + <description>capture/compare enable + register</description> + <addressOffset>0x20</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>CC4NP</name> + <description>Capture/Compare 4 output + Polarity</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC4P</name> + <description>Capture/Compare 3 output + Polarity</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC4E</name> + <description>Capture/Compare 4 output + enable</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC3NP</name> + <description>Capture/Compare 3 output + Polarity</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC3P</name> + <description>Capture/Compare 3 output + Polarity</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC3E</name> + <description>Capture/Compare 3 output + enable</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC2NP</name> + <description>Capture/Compare 2 output + Polarity</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC2P</name> + <description>Capture/Compare 2 output + Polarity</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC2E</name> + <description>Capture/Compare 2 output + enable</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC1NP</name> + <description>Capture/Compare 1 output + Polarity</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC1P</name> + <description>Capture/Compare 1 output + Polarity</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC1E</name> + <description>Capture/Compare 1 output + enable</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>CNT</name> + <displayName>CNT</displayName> + <description>counter</description> + <addressOffset>0x24</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>CNT_H</name> + <description>High counter value (TIM2 + only)</description> + <bitOffset>16</bitOffset> + <bitWidth>16</bitWidth> + </field> + <field> + <name>CNT_L</name> + <description>Low counter value</description> + <bitOffset>0</bitOffset> + <bitWidth>16</bitWidth> + </field> + </fields> + </register> + <register> + <name>PSC</name> + <displayName>PSC</displayName> + <description>prescaler</description> + <addressOffset>0x28</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>PSC</name> + <description>Prescaler value</description> + <bitOffset>0</bitOffset> + <bitWidth>16</bitWidth> + </field> + </fields> + </register> + <register> + <name>ARR</name> + <displayName>ARR</displayName> + <description>auto-reload register</description> + <addressOffset>0x2C</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>ARR_H</name> + <description>High Auto-reload value (TIM2 + only)</description> + <bitOffset>16</bitOffset> + <bitWidth>16</bitWidth> + </field> + <field> + <name>ARR_L</name> + <description>Low Auto-reload value</description> + <bitOffset>0</bitOffset> + <bitWidth>16</bitWidth> + </field> + </fields> + </register> + <register> + <name>CCR1</name> + <displayName>CCR1</displayName> + <description>capture/compare register 1</description> + <addressOffset>0x34</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>CCR1_H</name> + <description>High Capture/Compare 1 value (TIM2 + only)</description> + <bitOffset>16</bitOffset> + <bitWidth>16</bitWidth> + </field> + <field> + <name>CCR1_L</name> + <description>Low Capture/Compare 1 + value</description> + <bitOffset>0</bitOffset> + <bitWidth>16</bitWidth> + </field> + </fields> + </register> + <register> + <name>CCR2</name> + <displayName>CCR2</displayName> + <description>capture/compare register 2</description> + <addressOffset>0x38</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>CCR2_H</name> + <description>High Capture/Compare 2 value (TIM2 + only)</description> + <bitOffset>16</bitOffset> + <bitWidth>16</bitWidth> + </field> + <field> + <name>CCR2_L</name> + <description>Low Capture/Compare 2 + value</description> + <bitOffset>0</bitOffset> + <bitWidth>16</bitWidth> + </field> + </fields> + </register> + <register> + <name>CCR3</name> + <displayName>CCR3</displayName> + <description>capture/compare register 3</description> + <addressOffset>0x3C</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>CCR3_H</name> + <description>High Capture/Compare value (TIM2 + only)</description> + <bitOffset>16</bitOffset> + <bitWidth>16</bitWidth> + </field> + <field> + <name>CCR3_L</name> + <description>Low Capture/Compare value</description> + <bitOffset>0</bitOffset> + <bitWidth>16</bitWidth> + </field> + </fields> + </register> + <register> + <name>CCR4</name> + <displayName>CCR4</displayName> + <description>capture/compare register 4</description> + <addressOffset>0x40</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>CCR4_H</name> + <description>High Capture/Compare value (TIM2 + only)</description> + <bitOffset>16</bitOffset> + <bitWidth>16</bitWidth> + </field> + <field> + <name>CCR4_L</name> + <description>Low Capture/Compare value</description> + <bitOffset>0</bitOffset> + <bitWidth>16</bitWidth> + </field> + </fields> + </register> + <register> + <name>DCR</name> + <displayName>DCR</displayName> + <description>DMA control register</description> + <addressOffset>0x48</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>DBL</name> + <description>DMA burst length</description> + <bitOffset>8</bitOffset> + <bitWidth>5</bitWidth> + </field> + <field> + <name>DBA</name> + <description>DMA base address</description> + <bitOffset>0</bitOffset> + <bitWidth>5</bitWidth> + </field> + </fields> + </register> + <register> + <name>DMAR</name> + <displayName>DMAR</displayName> + <description>DMA address for full transfer</description> + <addressOffset>0x4C</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>DMAR</name> + <description>DMA register for burst + accesses</description> + <bitOffset>0</bitOffset> + <bitWidth>16</bitWidth> + </field> + </fields> + </register> + </registers> + </peripheral> + <peripheral derivedFrom="TIM2"> + <name>TIM3</name> + <baseAddress>0x40000400</baseAddress> + <interrupt> + <name>TIM3</name> + <description>TIM3 global interrupt</description> + <value>16</value> + </interrupt> + </peripheral> + <peripheral> + <name>TIM14</name> + <description>General-purpose-timers</description> + <groupName>TIM</groupName> + <baseAddress>0x40002000</baseAddress> + <addressBlock> + <offset>0x0</offset> + <size>0x400</size> + <usage>registers</usage> + </addressBlock> + <interrupt> + <name>TIM14</name> + <description>TIM14 global interrupt</description> + <value>19</value> + </interrupt> + <registers> + <register> + <name>CR1</name> + <displayName>CR1</displayName> + <description>control register 1</description> + <addressOffset>0x0</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>CKD</name> + <description>Clock division</description> + <bitOffset>8</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>ARPE</name> + <description>Auto-reload preload enable</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>URS</name> + <description>Update request source</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>UDIS</name> + <description>Update disable</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CEN</name> + <description>Counter enable</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>DIER</name> + <displayName>DIER</displayName> + <description>DMA/Interrupt enable register</description> + <addressOffset>0xC</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>CC1IE</name> + <description>Capture/Compare 1 interrupt + enable</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>UIE</name> + <description>Update interrupt enable</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>SR</name> + <displayName>SR</displayName> + <description>status register</description> + <addressOffset>0x10</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>CC1OF</name> + <description>Capture/Compare 1 overcapture + flag</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC1IF</name> + <description>Capture/compare 1 interrupt + flag</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>UIF</name> + <description>Update interrupt flag</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>EGR</name> + <displayName>EGR</displayName> + <description>event generation register</description> + <addressOffset>0x14</addressOffset> + <size>0x20</size> + <access>write-only</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>CC1G</name> + <description>Capture/compare 1 + generation</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>UG</name> + <description>Update generation</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>CCMR1_Output</name> + <displayName>CCMR1_Output</displayName> + <description>capture/compare mode register (output + mode)</description> + <addressOffset>0x18</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>CC1S</name> + <description>Capture/Compare 1 + selection</description> + <bitOffset>0</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>OC1FE</name> + <description>Output compare 1 fast + enable</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OC1PE</name> + <description>Output Compare 1 preload + enable</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OC1M</name> + <description>Output Compare 1 mode</description> + <bitOffset>4</bitOffset> + <bitWidth>3</bitWidth> + </field> + </fields> + </register> + <register> + <name>CCMR1_Input</name> + <displayName>CCMR1_Input</displayName> + <description>capture/compare mode register (input + mode)</description> + <alternateRegister>CCMR1_Output</alternateRegister> + <addressOffset>0x18</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>IC1F</name> + <description>Input capture 1 filter</description> + <bitOffset>4</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>IC1PSC</name> + <description>Input capture 1 prescaler</description> + <bitOffset>2</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>CC1S</name> + <description>Capture/Compare 1 + selection</description> + <bitOffset>0</bitOffset> + <bitWidth>2</bitWidth> + </field> + </fields> + </register> + <register> + <name>CCER</name> + <displayName>CCER</displayName> + <description>capture/compare enable + register</description> + <addressOffset>0x20</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>CC1NP</name> + <description>Capture/Compare 1 output + Polarity</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC1P</name> + <description>Capture/Compare 1 output + Polarity</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC1E</name> + <description>Capture/Compare 1 output + enable</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>CNT</name> + <displayName>CNT</displayName> + <description>counter</description> + <addressOffset>0x24</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>CNT</name> + <description>counter value</description> + <bitOffset>0</bitOffset> + <bitWidth>16</bitWidth> + </field> + </fields> + </register> + <register> + <name>PSC</name> + <displayName>PSC</displayName> + <description>prescaler</description> + <addressOffset>0x28</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>PSC</name> + <description>Prescaler value</description> + <bitOffset>0</bitOffset> + <bitWidth>16</bitWidth> + </field> + </fields> + </register> + <register> + <name>ARR</name> + <displayName>ARR</displayName> + <description>auto-reload register</description> + <addressOffset>0x2C</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>ARR</name> + <description>Auto-reload value</description> + <bitOffset>0</bitOffset> + <bitWidth>16</bitWidth> + </field> + </fields> + </register> + <register> + <name>CCR1</name> + <displayName>CCR1</displayName> + <description>capture/compare register 1</description> + <addressOffset>0x34</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>CCR1</name> + <description>Capture/Compare 1 value</description> + <bitOffset>0</bitOffset> + <bitWidth>16</bitWidth> + </field> + </fields> + </register> + <register> + <name>OR</name> + <displayName>OR</displayName> + <description>option register</description> + <addressOffset>0x50</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>RMP</name> + <description>Timer input 1 remap</description> + <bitOffset>0</bitOffset> + <bitWidth>2</bitWidth> + </field> + </fields> + </register> + </registers> + </peripheral> + <peripheral> + <name>TIM6</name> + <description>Basic-timers</description> + <groupName>TIM</groupName> + <baseAddress>0x40001000</baseAddress> + <addressBlock> + <offset>0x0</offset> + <size>0x400</size> + <usage>registers</usage> + </addressBlock> + <registers> + <register> + <name>CR1</name> + <displayName>CR1</displayName> + <description>control register 1</description> + <addressOffset>0x0</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>ARPE</name> + <description>Auto-reload preload enable</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OPM</name> + <description>One-pulse mode</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>URS</name> + <description>Update request source</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>UDIS</name> + <description>Update disable</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CEN</name> + <description>Counter enable</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>CR2</name> + <displayName>CR2</displayName> + <description>control register 2</description> + <addressOffset>0x4</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>MMS</name> + <description>Master mode selection</description> + <bitOffset>4</bitOffset> + <bitWidth>3</bitWidth> + </field> + </fields> + </register> + <register> + <name>DIER</name> + <displayName>DIER</displayName> + <description>DMA/Interrupt enable register</description> + <addressOffset>0xC</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>UDE</name> + <description>Update DMA request enable</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>UIE</name> + <description>Update interrupt enable</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>SR</name> + <displayName>SR</displayName> + <description>status register</description> + <addressOffset>0x10</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>UIF</name> + <description>Update interrupt flag</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>EGR</name> + <displayName>EGR</displayName> + <description>event generation register</description> + <addressOffset>0x14</addressOffset> + <size>0x20</size> + <access>write-only</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>UG</name> + <description>Update generation</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>CNT</name> + <displayName>CNT</displayName> + <description>counter</description> + <addressOffset>0x24</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>CNT</name> + <description>Low counter value</description> + <bitOffset>0</bitOffset> + <bitWidth>16</bitWidth> + </field> + </fields> + </register> + <register> + <name>PSC</name> + <displayName>PSC</displayName> + <description>prescaler</description> + <addressOffset>0x28</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>PSC</name> + <description>Prescaler value</description> + <bitOffset>0</bitOffset> + <bitWidth>16</bitWidth> + </field> + </fields> + </register> + <register> + <name>ARR</name> + <displayName>ARR</displayName> + <description>auto-reload register</description> + <addressOffset>0x2C</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>ARR</name> + <description>Low Auto-reload value</description> + <bitOffset>0</bitOffset> + <bitWidth>16</bitWidth> + </field> + </fields> + </register> + </registers> + </peripheral> + <peripheral derivedFrom="TIM6"> + <name>TIM7</name> + <baseAddress>0x40001400</baseAddress> + <interrupt> + <name>TIM7</name> + <description>TIM7 global interrupt</description> + <value>18</value> + </interrupt> + </peripheral> + <peripheral> + <name>EXTI</name> + <description>External interrupt/event + controller</description> + <groupName>EXTI</groupName> + <baseAddress>0x40010400</baseAddress> + <addressBlock> + <offset>0x0</offset> + <size>0x400</size> + <usage>registers</usage> + </addressBlock> + <interrupt> + <name>PVD</name> + <description>PVD and VDDIO2 supply comparator + interrupt</description> + <value>1</value> + </interrupt> + <interrupt> + <name>EXTI0_1</name> + <description>EXTI Line[1:0] interrupts</description> + <value>5</value> + </interrupt> + <interrupt> + <name>EXTI2_3</name> + <description>EXTI Line[3:2] interrupts</description> + <value>6</value> + </interrupt> + <interrupt> + <name>EXTI4_15</name> + <description>EXTI Line15 and EXTI4 interrupts</description> + <value>7</value> + </interrupt> + <registers> + <register> + <name>IMR</name> + <displayName>IMR</displayName> + <description>Interrupt mask register + (EXTI_IMR)</description> + <addressOffset>0x0</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0F940000</resetValue> + <fields> + <field> + <name>MR0</name> + <description>Interrupt Mask on line 0</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MR1</name> + <description>Interrupt Mask on line 1</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MR2</name> + <description>Interrupt Mask on line 2</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MR3</name> + <description>Interrupt Mask on line 3</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MR4</name> + <description>Interrupt Mask on line 4</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MR5</name> + <description>Interrupt Mask on line 5</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MR6</name> + <description>Interrupt Mask on line 6</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MR7</name> + <description>Interrupt Mask on line 7</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MR8</name> + <description>Interrupt Mask on line 8</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MR9</name> + <description>Interrupt Mask on line 9</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MR10</name> + <description>Interrupt Mask on line 10</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MR11</name> + <description>Interrupt Mask on line 11</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MR12</name> + <description>Interrupt Mask on line 12</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MR13</name> + <description>Interrupt Mask on line 13</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MR14</name> + <description>Interrupt Mask on line 14</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MR15</name> + <description>Interrupt Mask on line 15</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MR16</name> + <description>Interrupt Mask on line 16</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MR17</name> + <description>Interrupt Mask on line 17</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MR18</name> + <description>Interrupt Mask on line 18</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MR19</name> + <description>Interrupt Mask on line 19</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MR20</name> + <description>Interrupt Mask on line 20</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MR21</name> + <description>Interrupt Mask on line 21</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MR22</name> + <description>Interrupt Mask on line 22</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MR23</name> + <description>Interrupt Mask on line 23</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MR24</name> + <description>Interrupt Mask on line 24</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MR25</name> + <description>Interrupt Mask on line 25</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MR26</name> + <description>Interrupt Mask on line 26</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MR27</name> + <description>Interrupt Mask on line 27</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>EMR</name> + <displayName>EMR</displayName> + <description>Event mask register (EXTI_EMR)</description> + <addressOffset>0x4</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>MR0</name> + <description>Event Mask on line 0</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MR1</name> + <description>Event Mask on line 1</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MR2</name> + <description>Event Mask on line 2</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MR3</name> + <description>Event Mask on line 3</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MR4</name> + <description>Event Mask on line 4</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MR5</name> + <description>Event Mask on line 5</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MR6</name> + <description>Event Mask on line 6</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MR7</name> + <description>Event Mask on line 7</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MR8</name> + <description>Event Mask on line 8</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MR9</name> + <description>Event Mask on line 9</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MR10</name> + <description>Event Mask on line 10</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MR11</name> + <description>Event Mask on line 11</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MR12</name> + <description>Event Mask on line 12</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MR13</name> + <description>Event Mask on line 13</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MR14</name> + <description>Event Mask on line 14</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MR15</name> + <description>Event Mask on line 15</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MR16</name> + <description>Event Mask on line 16</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MR17</name> + <description>Event Mask on line 17</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MR18</name> + <description>Event Mask on line 18</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MR19</name> + <description>Event Mask on line 19</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MR20</name> + <description>Event Mask on line 20</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MR21</name> + <description>Event Mask on line 21</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MR22</name> + <description>Event Mask on line 22</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MR23</name> + <description>Event Mask on line 23</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MR24</name> + <description>Event Mask on line 24</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MR25</name> + <description>Event Mask on line 25</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MR26</name> + <description>Event Mask on line 26</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MR27</name> + <description>Event Mask on line 27</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>RTSR</name> + <displayName>RTSR</displayName> + <description>Rising Trigger selection register + (EXTI_RTSR)</description> + <addressOffset>0x8</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>TR0</name> + <description>Rising trigger event configuration of + line 0</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TR1</name> + <description>Rising trigger event configuration of + line 1</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TR2</name> + <description>Rising trigger event configuration of + line 2</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TR3</name> + <description>Rising trigger event configuration of + line 3</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TR4</name> + <description>Rising trigger event configuration of + line 4</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TR5</name> + <description>Rising trigger event configuration of + line 5</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TR6</name> + <description>Rising trigger event configuration of + line 6</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TR7</name> + <description>Rising trigger event configuration of + line 7</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TR8</name> + <description>Rising trigger event configuration of + line 8</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TR9</name> + <description>Rising trigger event configuration of + line 9</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TR10</name> + <description>Rising trigger event configuration of + line 10</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TR11</name> + <description>Rising trigger event configuration of + line 11</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TR12</name> + <description>Rising trigger event configuration of + line 12</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TR13</name> + <description>Rising trigger event configuration of + line 13</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TR14</name> + <description>Rising trigger event configuration of + line 14</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TR15</name> + <description>Rising trigger event configuration of + line 15</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TR16</name> + <description>Rising trigger event configuration of + line 16</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TR17</name> + <description>Rising trigger event configuration of + line 17</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TR19</name> + <description>Rising trigger event configuration of + line 19</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>FTSR</name> + <displayName>FTSR</displayName> + <description>Falling Trigger selection register + (EXTI_FTSR)</description> + <addressOffset>0xC</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>TR0</name> + <description>Falling trigger event configuration of + line 0</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TR1</name> + <description>Falling trigger event configuration of + line 1</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TR2</name> + <description>Falling trigger event configuration of + line 2</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TR3</name> + <description>Falling trigger event configuration of + line 3</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TR4</name> + <description>Falling trigger event configuration of + line 4</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TR5</name> + <description>Falling trigger event configuration of + line 5</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TR6</name> + <description>Falling trigger event configuration of + line 6</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TR7</name> + <description>Falling trigger event configuration of + line 7</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TR8</name> + <description>Falling trigger event configuration of + line 8</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TR9</name> + <description>Falling trigger event configuration of + line 9</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TR10</name> + <description>Falling trigger event configuration of + line 10</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TR11</name> + <description>Falling trigger event configuration of + line 11</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TR12</name> + <description>Falling trigger event configuration of + line 12</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TR13</name> + <description>Falling trigger event configuration of + line 13</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TR14</name> + <description>Falling trigger event configuration of + line 14</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TR15</name> + <description>Falling trigger event configuration of + line 15</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TR16</name> + <description>Falling trigger event configuration of + line 16</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TR17</name> + <description>Falling trigger event configuration of + line 17</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TR19</name> + <description>Falling trigger event configuration of + line 19</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>SWIER</name> + <displayName>SWIER</displayName> + <description>Software interrupt event register + (EXTI_SWIER)</description> + <addressOffset>0x10</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>SWIER0</name> + <description>Software Interrupt on line + 0</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SWIER1</name> + <description>Software Interrupt on line + 1</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SWIER2</name> + <description>Software Interrupt on line + 2</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SWIER3</name> + <description>Software Interrupt on line + 3</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SWIER4</name> + <description>Software Interrupt on line + 4</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SWIER5</name> + <description>Software Interrupt on line + 5</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SWIER6</name> + <description>Software Interrupt on line + 6</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SWIER7</name> + <description>Software Interrupt on line + 7</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SWIER8</name> + <description>Software Interrupt on line + 8</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SWIER9</name> + <description>Software Interrupt on line + 9</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SWIER10</name> + <description>Software Interrupt on line + 10</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SWIER11</name> + <description>Software Interrupt on line + 11</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SWIER12</name> + <description>Software Interrupt on line + 12</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SWIER13</name> + <description>Software Interrupt on line + 13</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SWIER14</name> + <description>Software Interrupt on line + 14</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SWIER15</name> + <description>Software Interrupt on line + 15</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SWIER16</name> + <description>Software Interrupt on line + 16</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SWIER17</name> + <description>Software Interrupt on line + 17</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SWIER19</name> + <description>Software Interrupt on line + 19</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>PR</name> + <displayName>PR</displayName> + <description>Pending register (EXTI_PR)</description> + <addressOffset>0x14</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>PIF31</name> + <description>Pending interrupt flag on line + 31</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PIF22</name> + <description>Pending interrupt flag on line + 22</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PIF21</name> + <description>Pending interrupt flag on line + 21</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PIF20</name> + <description>Pending interrupt flag on line + 20</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PIF19</name> + <description>Pending interrupt flag on line + 19</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PIF17</name> + <description>Pending interrupt flag on line + 17</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PIF16</name> + <description>Pending interrupt flag on line + 16</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PIF15</name> + <description>Pending interrupt flag on line + 15</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PIF14</name> + <description>Pending interrupt flag on line + 14</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PIF13</name> + <description>Pending interrupt flag on line + 13</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PIF12</name> + <description>Pending interrupt flag on line + 12</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PIF11</name> + <description>Pending interrupt flag on line + 11</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PIF10</name> + <description>Pending interrupt flag on line + 10</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PIF9</name> + <description>Pending interrupt flag on line + 9</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PIF8</name> + <description>Pending interrupt flag on line + 8</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PIF7</name> + <description>Pending interrupt flag on line + 7</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PIF6</name> + <description>Pending interrupt flag on line + 6</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PIF5</name> + <description>Pending interrupt flag on line + 5</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PIF4</name> + <description>Pending interrupt flag on line + 4</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PIF3</name> + <description>Pending interrupt flag on line + 3</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PIF2</name> + <description>Pending interrupt flag on line + 2</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PIF1</name> + <description>Pending interrupt flag on line + 1</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PIF0</name> + <description>Pending interrupt flag on line + 0</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + </registers> + </peripheral> + <peripheral> + <name>NVIC</name> + <description>Nested Vectored Interrupt + Controller</description> + <groupName>NVIC</groupName> + <baseAddress>0xE000E100</baseAddress> + <addressBlock> + <offset>0x0</offset> + <size>0x33D</size> + <usage>registers</usage> + </addressBlock> + <registers> + <register> + <name>ISER</name> + <displayName>ISER</displayName> + <description>Interrupt Set Enable Register</description> + <addressOffset>0x0</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>SETENA</name> + <description>SETENA</description> + <bitOffset>0</bitOffset> + <bitWidth>32</bitWidth> + </field> + </fields> + </register> + <register> + <name>ICER</name> + <displayName>ICER</displayName> + <description>Interrupt Clear Enable + Register</description> + <addressOffset>0x80</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>CLRENA</name> + <description>CLRENA</description> + <bitOffset>0</bitOffset> + <bitWidth>32</bitWidth> + </field> + </fields> + </register> + <register> + <name>ISPR</name> + <displayName>ISPR</displayName> + <description>Interrupt Set-Pending Register</description> + <addressOffset>0x100</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>SETPEND</name> + <description>SETPEND</description> + <bitOffset>0</bitOffset> + <bitWidth>32</bitWidth> + </field> + </fields> + </register> + <register> + <name>ICPR</name> + <displayName>ICPR</displayName> + <description>Interrupt Clear-Pending + Register</description> + <addressOffset>0x180</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>CLRPEND</name> + <description>CLRPEND</description> + <bitOffset>0</bitOffset> + <bitWidth>32</bitWidth> + </field> + </fields> + </register> + <register> + <name>IPR0</name> + <displayName>IPR0</displayName> + <description>Interrupt Priority Register 0</description> + <addressOffset>0x300</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>PRI_00</name> + <description>PRI_00</description> + <bitOffset>6</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PRI_01</name> + <description>PRI_01</description> + <bitOffset>14</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PRI_02</name> + <description>PRI_02</description> + <bitOffset>22</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PRI_03</name> + <description>PRI_03</description> + <bitOffset>30</bitOffset> + <bitWidth>2</bitWidth> + </field> + </fields> + </register> + <register> + <name>IPR1</name> + <displayName>IPR1</displayName> + <description>Interrupt Priority Register 1</description> + <addressOffset>0x304</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>PRI_40</name> + <description>PRI_40</description> + <bitOffset>6</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PRI_41</name> + <description>PRI_41</description> + <bitOffset>14</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PRI_42</name> + <description>PRI_42</description> + <bitOffset>22</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PRI_43</name> + <description>PRI_43</description> + <bitOffset>30</bitOffset> + <bitWidth>2</bitWidth> + </field> + </fields> + </register> + <register> + <name>IPR2</name> + <displayName>IPR2</displayName> + <description>Interrupt Priority Register 2</description> + <addressOffset>0x308</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>PRI_80</name> + <description>PRI_80</description> + <bitOffset>6</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PRI_81</name> + <description>PRI_81</description> + <bitOffset>14</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PRI_82</name> + <description>PRI_82</description> + <bitOffset>22</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PRI_83</name> + <description>PRI_83</description> + <bitOffset>30</bitOffset> + <bitWidth>2</bitWidth> + </field> + </fields> + </register> + <register> + <name>IPR3</name> + <displayName>IPR3</displayName> + <description>Interrupt Priority Register 3</description> + <addressOffset>0x30C</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>PRI_120</name> + <description>PRI_120</description> + <bitOffset>6</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PRI_121</name> + <description>PRI_121</description> + <bitOffset>14</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PRI_122</name> + <description>PRI_122</description> + <bitOffset>22</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PRI_123</name> + <description>PRI_123</description> + <bitOffset>30</bitOffset> + <bitWidth>2</bitWidth> + </field> + </fields> + </register> + <register> + <name>IPR4</name> + <displayName>IPR4</displayName> + <description>Interrupt Priority Register 4</description> + <addressOffset>0x310</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>PRI_160</name> + <description>PRI_160</description> + <bitOffset>6</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PRI_161</name> + <description>PRI_161</description> + <bitOffset>14</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PRI_162</name> + <description>PRI_162</description> + <bitOffset>22</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PRI_163</name> + <description>PRI_163</description> + <bitOffset>30</bitOffset> + <bitWidth>2</bitWidth> + </field> + </fields> + </register> + <register> + <name>IPR5</name> + <displayName>IPR5</displayName> + <description>Interrupt Priority Register 5</description> + <addressOffset>0x314</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>PRI_200</name> + <description>PRI_200</description> + <bitOffset>6</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PRI_201</name> + <description>PRI_201</description> + <bitOffset>14</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PRI_202</name> + <description>PRI_202</description> + <bitOffset>22</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PRI_203</name> + <description>PRI_203</description> + <bitOffset>30</bitOffset> + <bitWidth>2</bitWidth> + </field> + </fields> + </register> + <register> + <name>IPR6</name> + <displayName>IPR6</displayName> + <description>Interrupt Priority Register 6</description> + <addressOffset>0x318</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>PRI_240</name> + <description>PRI_240</description> + <bitOffset>6</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PRI_241</name> + <description>PRI_241</description> + <bitOffset>14</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PRI_242</name> + <description>PRI_242</description> + <bitOffset>22</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PRI_243</name> + <description>PRI_243</description> + <bitOffset>30</bitOffset> + <bitWidth>2</bitWidth> + </field> + </fields> + </register> + <register> + <name>IPR7</name> + <displayName>IPR7</displayName> + <description>Interrupt Priority Register 7</description> + <addressOffset>0x31C</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>PRI_280</name> + <description>PRI_280</description> + <bitOffset>6</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PRI_281</name> + <description>PRI_281</description> + <bitOffset>14</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PRI_282</name> + <description>PRI_282</description> + <bitOffset>22</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PRI_283</name> + <description>PRI_283</description> + <bitOffset>30</bitOffset> + <bitWidth>2</bitWidth> + </field> + </fields> + </register> + </registers> + </peripheral> + <peripheral> + <name>DMA1</name> + <description>DMA controller</description> + <groupName>DMA</groupName> + <baseAddress>0x40020000</baseAddress> + <addressBlock> + <offset>0x0</offset> + <size>0x400</size> + <usage>registers</usage> + </addressBlock> + <interrupt> + <name>DMA1_CH1</name> + <description>DMA1 channel 1 interrupt</description> + <value>9</value> + </interrupt> + <registers> + <register> + <name>ISR</name> + <displayName>ISR</displayName> + <description>DMA interrupt status register + (DMA_ISR)</description> + <addressOffset>0x0</addressOffset> + <size>0x20</size> + <access>read-only</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>GIF1</name> + <description>Channel 1 Global interrupt + flag</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TCIF1</name> + <description>Channel 1 Transfer Complete + flag</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>HTIF1</name> + <description>Channel 1 Half Transfer Complete + flag</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TEIF1</name> + <description>Channel 1 Transfer Error + flag</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>GIF2</name> + <description>Channel 2 Global interrupt + flag</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TCIF2</name> + <description>Channel 2 Transfer Complete + flag</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>HTIF2</name> + <description>Channel 2 Half Transfer Complete + flag</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TEIF2</name> + <description>Channel 2 Transfer Error + flag</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>GIF3</name> + <description>Channel 3 Global interrupt + flag</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TCIF3</name> + <description>Channel 3 Transfer Complete + flag</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>HTIF3</name> + <description>Channel 3 Half Transfer Complete + flag</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TEIF3</name> + <description>Channel 3 Transfer Error + flag</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>GIF4</name> + <description>Channel 4 Global interrupt + flag</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TCIF4</name> + <description>Channel 4 Transfer Complete + flag</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>HTIF4</name> + <description>Channel 4 Half Transfer Complete + flag</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TEIF4</name> + <description>Channel 4 Transfer Error + flag</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>GIF5</name> + <description>Channel 5 Global interrupt + flag</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TCIF5</name> + <description>Channel 5 Transfer Complete + flag</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>HTIF5</name> + <description>Channel 5 Half Transfer Complete + flag</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TEIF5</name> + <description>Channel 5 Transfer Error + flag</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>GIF6</name> + <description>Channel 6 Global interrupt + flag</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TCIF6</name> + <description>Channel 6 Transfer Complete + flag</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>HTIF6</name> + <description>Channel 6 Half Transfer Complete + flag</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TEIF6</name> + <description>Channel 6 Transfer Error + flag</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>GIF7</name> + <description>Channel 7 Global interrupt + flag</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TCIF7</name> + <description>Channel 7 Transfer Complete + flag</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>HTIF7</name> + <description>Channel 7 Half Transfer Complete + flag</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TEIF7</name> + <description>Channel 7 Transfer Error + flag</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>IFCR</name> + <displayName>IFCR</displayName> + <description>DMA interrupt flag clear register + (DMA_IFCR)</description> + <addressOffset>0x4</addressOffset> + <size>0x20</size> + <access>write-only</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>CGIF1</name> + <description>Channel 1 Global interrupt + clear</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CTCIF1</name> + <description>Channel 1 Transfer Complete + clear</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CHTIF1</name> + <description>Channel 1 Half Transfer + clear</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CTEIF1</name> + <description>Channel 1 Transfer Error + clear</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CGIF2</name> + <description>Channel 2 Global interrupt + clear</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CTCIF2</name> + <description>Channel 2 Transfer Complete + clear</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CHTIF2</name> + <description>Channel 2 Half Transfer + clear</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CTEIF2</name> + <description>Channel 2 Transfer Error + clear</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CGIF3</name> + <description>Channel 3 Global interrupt + clear</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CTCIF3</name> + <description>Channel 3 Transfer Complete + clear</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CHTIF3</name> + <description>Channel 3 Half Transfer + clear</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CTEIF3</name> + <description>Channel 3 Transfer Error + clear</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CGIF4</name> + <description>Channel 4 Global interrupt + clear</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CTCIF4</name> + <description>Channel 4 Transfer Complete + clear</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CHTIF4</name> + <description>Channel 4 Half Transfer + clear</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CTEIF4</name> + <description>Channel 4 Transfer Error + clear</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CGIF5</name> + <description>Channel 5 Global interrupt + clear</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CTCIF5</name> + <description>Channel 5 Transfer Complete + clear</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CHTIF5</name> + <description>Channel 5 Half Transfer + clear</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CTEIF5</name> + <description>Channel 5 Transfer Error + clear</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CGIF6</name> + <description>Channel 6 Global interrupt + clear</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CTCIF6</name> + <description>Channel 6 Transfer Complete + clear</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CHTIF6</name> + <description>Channel 6 Half Transfer + clear</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CTEIF6</name> + <description>Channel 6 Transfer Error + clear</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CGIF7</name> + <description>Channel 7 Global interrupt + clear</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CTCIF7</name> + <description>Channel 7 Transfer Complete + clear</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CHTIF7</name> + <description>Channel 7 Half Transfer + clear</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CTEIF7</name> + <description>Channel 7 Transfer Error + clear</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>CCR1</name> + <displayName>CCR1</displayName> + <description>DMA channel configuration register + (DMA_CCR)</description> + <addressOffset>0x8</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>EN</name> + <description>Channel enable</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TCIE</name> + <description>Transfer complete interrupt + enable</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>HTIE</name> + <description>Half Transfer interrupt + enable</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TEIE</name> + <description>Transfer error interrupt + enable</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>DIR</name> + <description>Data transfer direction</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CIRC</name> + <description>Circular mode</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PINC</name> + <description>Peripheral increment mode</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MINC</name> + <description>Memory increment mode</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PSIZE</name> + <description>Peripheral size</description> + <bitOffset>8</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>MSIZE</name> + <description>Memory size</description> + <bitOffset>10</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PL</name> + <description>Channel Priority level</description> + <bitOffset>12</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>MEM2MEM</name> + <description>Memory to memory mode</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>CNDTR1</name> + <displayName>CNDTR1</displayName> + <description>DMA channel 1 number of data + register</description> + <addressOffset>0xC</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>NDT</name> + <description>Number of data to transfer</description> + <bitOffset>0</bitOffset> + <bitWidth>16</bitWidth> + </field> + </fields> + </register> + <register> + <name>CPAR1</name> + <displayName>CPAR1</displayName> + <description>DMA channel 1 peripheral address + register</description> + <addressOffset>0x10</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>PA</name> + <description>Peripheral address</description> + <bitOffset>0</bitOffset> + <bitWidth>32</bitWidth> + </field> + </fields> + </register> + <register> + <name>CMAR1</name> + <displayName>CMAR1</displayName> + <description>DMA channel 1 memory address + register</description> + <addressOffset>0x14</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>MA</name> + <description>Memory address</description> + <bitOffset>0</bitOffset> + <bitWidth>32</bitWidth> + </field> + </fields> + </register> + <register> + <name>CCR2</name> + <displayName>CCR2</displayName> + <description>DMA channel configuration register + (DMA_CCR)</description> + <addressOffset>0x1C</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>EN</name> + <description>Channel enable</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TCIE</name> + <description>Transfer complete interrupt + enable</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>HTIE</name> + <description>Half Transfer interrupt + enable</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TEIE</name> + <description>Transfer error interrupt + enable</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>DIR</name> + <description>Data transfer direction</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CIRC</name> + <description>Circular mode</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PINC</name> + <description>Peripheral increment mode</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MINC</name> + <description>Memory increment mode</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PSIZE</name> + <description>Peripheral size</description> + <bitOffset>8</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>MSIZE</name> + <description>Memory size</description> + <bitOffset>10</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PL</name> + <description>Channel Priority level</description> + <bitOffset>12</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>MEM2MEM</name> + <description>Memory to memory mode</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>CNDTR2</name> + <displayName>CNDTR2</displayName> + <description>DMA channel 2 number of data + register</description> + <addressOffset>0x20</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>NDT</name> + <description>Number of data to transfer</description> + <bitOffset>0</bitOffset> + <bitWidth>16</bitWidth> + </field> + </fields> + </register> + <register> + <name>CPAR2</name> + <displayName>CPAR2</displayName> + <description>DMA channel 2 peripheral address + register</description> + <addressOffset>0x24</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>PA</name> + <description>Peripheral address</description> + <bitOffset>0</bitOffset> + <bitWidth>32</bitWidth> + </field> + </fields> + </register> + <register> + <name>CMAR2</name> + <displayName>CMAR2</displayName> + <description>DMA channel 2 memory address + register</description> + <addressOffset>0x28</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>MA</name> + <description>Memory address</description> + <bitOffset>0</bitOffset> + <bitWidth>32</bitWidth> + </field> + </fields> + </register> + <register> + <name>CCR3</name> + <displayName>CCR3</displayName> + <description>DMA channel configuration register + (DMA_CCR)</description> + <addressOffset>0x30</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>EN</name> + <description>Channel enable</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TCIE</name> + <description>Transfer complete interrupt + enable</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>HTIE</name> + <description>Half Transfer interrupt + enable</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TEIE</name> + <description>Transfer error interrupt + enable</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>DIR</name> + <description>Data transfer direction</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CIRC</name> + <description>Circular mode</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PINC</name> + <description>Peripheral increment mode</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MINC</name> + <description>Memory increment mode</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PSIZE</name> + <description>Peripheral size</description> + <bitOffset>8</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>MSIZE</name> + <description>Memory size</description> + <bitOffset>10</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PL</name> + <description>Channel Priority level</description> + <bitOffset>12</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>MEM2MEM</name> + <description>Memory to memory mode</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>CNDTR3</name> + <displayName>CNDTR3</displayName> + <description>DMA channel 3 number of data + register</description> + <addressOffset>0x34</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>NDT</name> + <description>Number of data to transfer</description> + <bitOffset>0</bitOffset> + <bitWidth>16</bitWidth> + </field> + </fields> + </register> + <register> + <name>CPAR3</name> + <displayName>CPAR3</displayName> + <description>DMA channel 3 peripheral address + register</description> + <addressOffset>0x38</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>PA</name> + <description>Peripheral address</description> + <bitOffset>0</bitOffset> + <bitWidth>32</bitWidth> + </field> + </fields> + </register> + <register> + <name>CMAR3</name> + <displayName>CMAR3</displayName> + <description>DMA channel 3 memory address + register</description> + <addressOffset>0x3C</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>MA</name> + <description>Memory address</description> + <bitOffset>0</bitOffset> + <bitWidth>32</bitWidth> + </field> + </fields> + </register> + <register> + <name>CCR4</name> + <displayName>CCR4</displayName> + <description>DMA channel configuration register + (DMA_CCR)</description> + <addressOffset>0x44</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>EN</name> + <description>Channel enable</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TCIE</name> + <description>Transfer complete interrupt + enable</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>HTIE</name> + <description>Half Transfer interrupt + enable</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TEIE</name> + <description>Transfer error interrupt + enable</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>DIR</name> + <description>Data transfer direction</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CIRC</name> + <description>Circular mode</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PINC</name> + <description>Peripheral increment mode</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MINC</name> + <description>Memory increment mode</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PSIZE</name> + <description>Peripheral size</description> + <bitOffset>8</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>MSIZE</name> + <description>Memory size</description> + <bitOffset>10</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PL</name> + <description>Channel Priority level</description> + <bitOffset>12</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>MEM2MEM</name> + <description>Memory to memory mode</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>CNDTR4</name> + <displayName>CNDTR4</displayName> + <description>DMA channel 4 number of data + register</description> + <addressOffset>0x48</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>NDT</name> + <description>Number of data to transfer</description> + <bitOffset>0</bitOffset> + <bitWidth>16</bitWidth> + </field> + </fields> + </register> + <register> + <name>CPAR4</name> + <displayName>CPAR4</displayName> + <description>DMA channel 4 peripheral address + register</description> + <addressOffset>0x4C</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>PA</name> + <description>Peripheral address</description> + <bitOffset>0</bitOffset> + <bitWidth>32</bitWidth> + </field> + </fields> + </register> + <register> + <name>CMAR4</name> + <displayName>CMAR4</displayName> + <description>DMA channel 4 memory address + register</description> + <addressOffset>0x50</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>MA</name> + <description>Memory address</description> + <bitOffset>0</bitOffset> + <bitWidth>32</bitWidth> + </field> + </fields> + </register> + <register> + <name>CCR5</name> + <displayName>CCR5</displayName> + <description>DMA channel configuration register + (DMA_CCR)</description> + <addressOffset>0x58</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>EN</name> + <description>Channel enable</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TCIE</name> + <description>Transfer complete interrupt + enable</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>HTIE</name> + <description>Half Transfer interrupt + enable</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TEIE</name> + <description>Transfer error interrupt + enable</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>DIR</name> + <description>Data transfer direction</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CIRC</name> + <description>Circular mode</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PINC</name> + <description>Peripheral increment mode</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MINC</name> + <description>Memory increment mode</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PSIZE</name> + <description>Peripheral size</description> + <bitOffset>8</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>MSIZE</name> + <description>Memory size</description> + <bitOffset>10</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PL</name> + <description>Channel Priority level</description> + <bitOffset>12</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>MEM2MEM</name> + <description>Memory to memory mode</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>CNDTR5</name> + <displayName>CNDTR5</displayName> + <description>DMA channel 5 number of data + register</description> + <addressOffset>0x5C</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>NDT</name> + <description>Number of data to transfer</description> + <bitOffset>0</bitOffset> + <bitWidth>16</bitWidth> + </field> + </fields> + </register> + <register> + <name>CPAR5</name> + <displayName>CPAR5</displayName> + <description>DMA channel 5 peripheral address + register</description> + <addressOffset>0x60</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>PA</name> + <description>Peripheral address</description> + <bitOffset>0</bitOffset> + <bitWidth>32</bitWidth> + </field> + </fields> + </register> + <register> + <name>CMAR5</name> + <displayName>CMAR5</displayName> + <description>DMA channel 5 memory address + register</description> + <addressOffset>0x64</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>MA</name> + <description>Memory address</description> + <bitOffset>0</bitOffset> + <bitWidth>32</bitWidth> + </field> + </fields> + </register> + <register> + <name>CCR6</name> + <displayName>CCR6</displayName> + <description>DMA channel configuration register + (DMA_CCR)</description> + <addressOffset>0x6C</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>EN</name> + <description>Channel enable</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TCIE</name> + <description>Transfer complete interrupt + enable</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>HTIE</name> + <description>Half Transfer interrupt + enable</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TEIE</name> + <description>Transfer error interrupt + enable</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>DIR</name> + <description>Data transfer direction</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CIRC</name> + <description>Circular mode</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PINC</name> + <description>Peripheral increment mode</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MINC</name> + <description>Memory increment mode</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PSIZE</name> + <description>Peripheral size</description> + <bitOffset>8</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>MSIZE</name> + <description>Memory size</description> + <bitOffset>10</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PL</name> + <description>Channel Priority level</description> + <bitOffset>12</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>MEM2MEM</name> + <description>Memory to memory mode</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>CNDTR6</name> + <displayName>CNDTR6</displayName> + <description>DMA channel 6 number of data + register</description> + <addressOffset>0x70</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>NDT</name> + <description>Number of data to transfer</description> + <bitOffset>0</bitOffset> + <bitWidth>16</bitWidth> + </field> + </fields> + </register> + <register> + <name>CPAR6</name> + <displayName>CPAR6</displayName> + <description>DMA channel 6 peripheral address + register</description> + <addressOffset>0x74</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>PA</name> + <description>Peripheral address</description> + <bitOffset>0</bitOffset> + <bitWidth>32</bitWidth> + </field> + </fields> + </register> + <register> + <name>CMAR6</name> + <displayName>CMAR6</displayName> + <description>DMA channel 6 memory address + register</description> + <addressOffset>0x78</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>MA</name> + <description>Memory address</description> + <bitOffset>0</bitOffset> + <bitWidth>32</bitWidth> + </field> + </fields> + </register> + <register> + <name>CCR7</name> + <displayName>CCR7</displayName> + <description>DMA channel configuration register + (DMA_CCR)</description> + <addressOffset>0x80</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>EN</name> + <description>Channel enable</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TCIE</name> + <description>Transfer complete interrupt + enable</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>HTIE</name> + <description>Half Transfer interrupt + enable</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TEIE</name> + <description>Transfer error interrupt + enable</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>DIR</name> + <description>Data transfer direction</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CIRC</name> + <description>Circular mode</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PINC</name> + <description>Peripheral increment mode</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MINC</name> + <description>Memory increment mode</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PSIZE</name> + <description>Peripheral size</description> + <bitOffset>8</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>MSIZE</name> + <description>Memory size</description> + <bitOffset>10</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>PL</name> + <description>Channel Priority level</description> + <bitOffset>12</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>MEM2MEM</name> + <description>Memory to memory mode</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>CNDTR7</name> + <displayName>CNDTR7</displayName> + <description>DMA channel 7 number of data + register</description> + <addressOffset>0x84</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>NDT</name> + <description>Number of data to transfer</description> + <bitOffset>0</bitOffset> + <bitWidth>16</bitWidth> + </field> + </fields> + </register> + <register> + <name>CPAR7</name> + <displayName>CPAR7</displayName> + <description>DMA channel 7 peripheral address + register</description> + <addressOffset>0x88</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>PA</name> + <description>Peripheral address</description> + <bitOffset>0</bitOffset> + <bitWidth>32</bitWidth> + </field> + </fields> + </register> + <register> + <name>CMAR7</name> + <displayName>CMAR7</displayName> + <description>DMA channel 7 memory address + register</description> + <addressOffset>0x8C</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>MA</name> + <description>Memory address</description> + <bitOffset>0</bitOffset> + <bitWidth>32</bitWidth> + </field> + </fields> + </register> + </registers> + </peripheral> + <peripheral> + <name>RCC</name> + <description>Reset and clock control</description> + <groupName>RCC</groupName> + <baseAddress>0x40021000</baseAddress> + <addressBlock> + <offset>0x0</offset> + <size>0x400</size> + <usage>registers</usage> + </addressBlock> + <interrupt> + <name>RCC_CRS</name> + <description>RCC and CRS global interrupts</description> + <value>4</value> + </interrupt> + <registers> + <register> + <name>CR</name> + <displayName>CR</displayName> + <description>Clock control register</description> + <addressOffset>0x0</addressOffset> + <size>0x20</size> + <resetValue>0x00000083</resetValue> + <fields> + <field> + <name>HSION</name> + <description>Internal High Speed clock + enable</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>HSIRDY</name> + <description>Internal High Speed clock ready + flag</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>HSITRIM</name> + <description>Internal High Speed clock + trimming</description> + <bitOffset>3</bitOffset> + <bitWidth>5</bitWidth> + <access>read-write</access> + </field> + <field> + <name>HSICAL</name> + <description>Internal High Speed clock + Calibration</description> + <bitOffset>8</bitOffset> + <bitWidth>8</bitWidth> + <access>read-only</access> + </field> + <field> + <name>HSEON</name> + <description>External High Speed clock + enable</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>HSERDY</name> + <description>External High Speed clock ready + flag</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>HSEBYP</name> + <description>External High Speed clock + Bypass</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>CSSON</name> + <description>Clock Security System + enable</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>PLLON</name> + <description>PLL enable</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>PLLRDY</name> + <description>PLL clock ready flag</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + </fields> + </register> + <register> + <name>CFGR</name> + <displayName>CFGR</displayName> + <description>Clock configuration register + (RCC_CFGR)</description> + <addressOffset>0x4</addressOffset> + <size>0x20</size> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>SW</name> + <description>System clock Switch</description> + <bitOffset>0</bitOffset> + <bitWidth>2</bitWidth> + <access>read-write</access> + </field> + <field> + <name>SWS</name> + <description>System Clock Switch Status</description> + <bitOffset>2</bitOffset> + <bitWidth>2</bitWidth> + <access>read-only</access> + </field> + <field> + <name>HPRE</name> + <description>AHB prescaler</description> + <bitOffset>4</bitOffset> + <bitWidth>4</bitWidth> + <access>read-write</access> + </field> + <field> + <name>PPRE</name> + <description>APB Low speed prescaler + (APB1)</description> + <bitOffset>8</bitOffset> + <bitWidth>3</bitWidth> + <access>read-write</access> + </field> + <field> + <name>ADCPRE</name> + <description>ADC prescaler</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>PLLSRC</name> + <description>PLL input clock source</description> + <bitOffset>15</bitOffset> + <bitWidth>2</bitWidth> + <access>read-write</access> + </field> + <field> + <name>PLLXTPRE</name> + <description>HSE divider for PLL entry</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>PLLMUL</name> + <description>PLL Multiplication Factor</description> + <bitOffset>18</bitOffset> + <bitWidth>4</bitWidth> + <access>read-write</access> + </field> + <field> + <name>MCO</name> + <description>Microcontroller clock + output</description> + <bitOffset>24</bitOffset> + <bitWidth>3</bitWidth> + <access>read-write</access> + </field> + <field> + <name>MCOPRE</name> + <description>Microcontroller Clock Output + Prescaler</description> + <bitOffset>28</bitOffset> + <bitWidth>3</bitWidth> + <access>read-write</access> + </field> + <field> + <name>PLLNODIV</name> + <description>PLL clock not divided for + MCO</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + </fields> + </register> + <register> + <name>CIR</name> + <displayName>CIR</displayName> + <description>Clock interrupt register + (RCC_CIR)</description> + <addressOffset>0x8</addressOffset> + <size>0x20</size> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>LSIRDYF</name> + <description>LSI Ready Interrupt flag</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>LSERDYF</name> + <description>LSE Ready Interrupt flag</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>HSIRDYF</name> + <description>HSI Ready Interrupt flag</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>HSERDYF</name> + <description>HSE Ready Interrupt flag</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>PLLRDYF</name> + <description>PLL Ready Interrupt flag</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>HSI14RDYF</name> + <description>HSI14 ready interrupt flag</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>HSI48RDYF</name> + <description>HSI48 ready interrupt flag</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>CSSF</name> + <description>Clock Security System Interrupt + flag</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>LSIRDYIE</name> + <description>LSI Ready Interrupt Enable</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>LSERDYIE</name> + <description>LSE Ready Interrupt Enable</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>HSIRDYIE</name> + <description>HSI Ready Interrupt Enable</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>HSERDYIE</name> + <description>HSE Ready Interrupt Enable</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>PLLRDYIE</name> + <description>PLL Ready Interrupt Enable</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>HSI14RDYE</name> + <description>HSI14 ready interrupt + enable</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>HSI48RDYIE</name> + <description>HSI48 ready interrupt + enable</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>LSIRDYC</name> + <description>LSI Ready Interrupt Clear</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + <access>write-only</access> + </field> + <field> + <name>LSERDYC</name> + <description>LSE Ready Interrupt Clear</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + <access>write-only</access> + </field> + <field> + <name>HSIRDYC</name> + <description>HSI Ready Interrupt Clear</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + <access>write-only</access> + </field> + <field> + <name>HSERDYC</name> + <description>HSE Ready Interrupt Clear</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + <access>write-only</access> + </field> + <field> + <name>PLLRDYC</name> + <description>PLL Ready Interrupt Clear</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + <access>write-only</access> + </field> + <field> + <name>HSI14RDYC</name> + <description>HSI 14 MHz Ready Interrupt + Clear</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + <access>write-only</access> + </field> + <field> + <name>HSI48RDYC</name> + <description>HSI48 Ready Interrupt + Clear</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + <access>write-only</access> + </field> + <field> + <name>CSSC</name> + <description>Clock security system interrupt + clear</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + <access>write-only</access> + </field> + </fields> + </register> + <register> + <name>APB2RSTR</name> + <displayName>APB2RSTR</displayName> + <description>APB2 peripheral reset register + (RCC_APB2RSTR)</description> + <addressOffset>0xC</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>SYSCFGRST</name> + <description>SYSCFG and COMP reset</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ADCRST</name> + <description>ADC interface reset</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TIM1RST</name> + <description>TIM1 timer reset</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SPI1RST</name> + <description>SPI 1 reset</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>USART1RST</name> + <description>USART1 reset</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TIM15RST</name> + <description>TIM15 timer reset</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TIM16RST</name> + <description>TIM16 timer reset</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TIM17RST</name> + <description>TIM17 timer reset</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>DBGMCURST</name> + <description>Debug MCU reset</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>APB1RSTR</name> + <displayName>APB1RSTR</displayName> + <description>APB1 peripheral reset register + (RCC_APB1RSTR)</description> + <addressOffset>0x10</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>TIM2RST</name> + <description>Timer 2 reset</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TIM3RST</name> + <description>Timer 3 reset</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TIM6RST</name> + <description>Timer 6 reset</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TIM7RST</name> + <description>TIM7 timer reset</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TIM14RST</name> + <description>Timer 14 reset</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>WWDGRST</name> + <description>Window watchdog reset</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SPI2RST</name> + <description>SPI2 reset</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>USART2RST</name> + <description>USART 2 reset</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>USART3RST</name> + <description>USART3 reset</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>USART4RST</name> + <description>USART4 reset</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>I2C1RST</name> + <description>I2C1 reset</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>I2C2RST</name> + <description>I2C2 reset</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>USBRST</name> + <description>USB interface reset</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CANRST</name> + <description>CAN interface reset</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CRSRST</name> + <description>Clock Recovery System interface + reset</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PWRRST</name> + <description>Power interface reset</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>DACRST</name> + <description>DAC interface reset</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CECRST</name> + <description>HDMI CEC reset</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>AHBENR</name> + <displayName>AHBENR</displayName> + <description>AHB Peripheral Clock enable register + (RCC_AHBENR)</description> + <addressOffset>0x14</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000014</resetValue> + <fields> + <field> + <name>DMA1EN</name> + <description>DMA1 clock enable</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SRAMEN</name> + <description>SRAM interface clock + enable</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FLITFEN</name> + <description>FLITF clock enable</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CRCEN</name> + <description>CRC clock enable</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>IOPAEN</name> + <description>I/O port A clock enable</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>IOPBEN</name> + <description>I/O port B clock enable</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>IOPCEN</name> + <description>I/O port C clock enable</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>IOPDEN</name> + <description>I/O port D clock enable</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>IOPFEN</name> + <description>I/O port F clock enable</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TSCEN</name> + <description>Touch sensing controller clock + enable</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>APB2ENR</name> + <displayName>APB2ENR</displayName> + <description>APB2 peripheral clock enable register + (RCC_APB2ENR)</description> + <addressOffset>0x18</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>SYSCFGEN</name> + <description>SYSCFG clock enable</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ADCEN</name> + <description>ADC 1 interface clock + enable</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TIM1EN</name> + <description>TIM1 Timer clock enable</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SPI1EN</name> + <description>SPI 1 clock enable</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>USART1EN</name> + <description>USART1 clock enable</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TIM15EN</name> + <description>TIM15 timer clock enable</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TIM16EN</name> + <description>TIM16 timer clock enable</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TIM17EN</name> + <description>TIM17 timer clock enable</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>DBGMCUEN</name> + <description>MCU debug module clock + enable</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>APB1ENR</name> + <displayName>APB1ENR</displayName> + <description>APB1 peripheral clock enable register + (RCC_APB1ENR)</description> + <addressOffset>0x1C</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>TIM2EN</name> + <description>Timer 2 clock enable</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TIM3EN</name> + <description>Timer 3 clock enable</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TIM6EN</name> + <description>Timer 6 clock enable</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TIM7EN</name> + <description>TIM7 timer clock enable</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TIM14EN</name> + <description>Timer 14 clock enable</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>WWDGEN</name> + <description>Window watchdog clock + enable</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SPI2EN</name> + <description>SPI 2 clock enable</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>USART2EN</name> + <description>USART 2 clock enable</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>USART3EN</name> + <description>USART3 clock enable</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>USART4EN</name> + <description>USART4 clock enable</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>I2C1EN</name> + <description>I2C 1 clock enable</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>I2C2EN</name> + <description>I2C 2 clock enable</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>USBRST</name> + <description>USB interface clock enable</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CANEN</name> + <description>CAN interface clock enable</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CRSEN</name> + <description>Clock Recovery System interface clock + enable</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PWREN</name> + <description>Power interface clock + enable</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>DACEN</name> + <description>DAC interface clock enable</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CECEN</name> + <description>HDMI CEC interface clock + enable</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>BDCR</name> + <displayName>BDCR</displayName> + <description>Backup domain control register + (RCC_BDCR)</description> + <addressOffset>0x20</addressOffset> + <size>0x20</size> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>LSEON</name> + <description>External Low Speed oscillator + enable</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>LSERDY</name> + <description>External Low Speed oscillator + ready</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>LSEBYP</name> + <description>External Low Speed oscillator + bypass</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>LSEDRV</name> + <description>LSE oscillator drive + capability</description> + <bitOffset>3</bitOffset> + <bitWidth>2</bitWidth> + <access>read-write</access> + </field> + <field> + <name>RTCSEL</name> + <description>RTC clock source selection</description> + <bitOffset>8</bitOffset> + <bitWidth>2</bitWidth> + <access>read-write</access> + </field> + <field> + <name>RTCEN</name> + <description>RTC clock enable</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>BDRST</name> + <description>Backup domain software + reset</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + </fields> + </register> + <register> + <name>CSR</name> + <displayName>CSR</displayName> + <description>Control/status register + (RCC_CSR)</description> + <addressOffset>0x24</addressOffset> + <size>0x20</size> + <resetValue>0x0C000000</resetValue> + <fields> + <field> + <name>LSION</name> + <description>Internal low speed oscillator + enable</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>LSIRDY</name> + <description>Internal low speed oscillator + ready</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>RMVF</name> + <description>Remove reset flag</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>OBLRSTF</name> + <description>Option byte loader reset + flag</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>PINRSTF</name> + <description>PIN reset flag</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>PORRSTF</name> + <description>POR/PDR reset flag</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>SFTRSTF</name> + <description>Software reset flag</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>IWDGRSTF</name> + <description>Independent watchdog reset + flag</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>WWDGRSTF</name> + <description>Window watchdog reset flag</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>LPWRRSTF</name> + <description>Low-power reset flag</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + </fields> + </register> + <register> + <name>AHBRSTR</name> + <displayName>AHBRSTR</displayName> + <description>AHB peripheral reset register</description> + <addressOffset>0x28</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>IOPARST</name> + <description>I/O port A reset</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>IOPBRST</name> + <description>I/O port B reset</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>IOPCRST</name> + <description>I/O port C reset</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>IOPDRST</name> + <description>I/O port D reset</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>IOPFRST</name> + <description>I/O port F reset</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TSCRST</name> + <description>Touch sensing controller + reset</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>CFGR2</name> + <displayName>CFGR2</displayName> + <description>Clock configuration register 2</description> + <addressOffset>0x2C</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>PREDIV</name> + <description>PREDIV division factor</description> + <bitOffset>0</bitOffset> + <bitWidth>4</bitWidth> + </field> + </fields> + </register> + <register> + <name>CFGR3</name> + <displayName>CFGR3</displayName> + <description>Clock configuration register 3</description> + <addressOffset>0x30</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>USART1SW</name> + <description>USART1 clock source + selection</description> + <bitOffset>0</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>I2C1SW</name> + <description>I2C1 clock source + selection</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CECSW</name> + <description>HDMI CEC clock source + selection</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>USBSW</name> + <description>USB clock source selection</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ADCSW</name> + <description>ADC clock source selection</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>USART2SW</name> + <description>USART2 clock source + selection</description> + <bitOffset>16</bitOffset> + <bitWidth>2</bitWidth> + </field> + </fields> + </register> + <register> + <name>CR2</name> + <displayName>CR2</displayName> + <description>Clock control register 2</description> + <addressOffset>0x34</addressOffset> + <size>0x20</size> + <resetValue>0x00000080</resetValue> + <fields> + <field> + <name>HSI14ON</name> + <description>HSI14 clock enable</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>HSI14RDY</name> + <description>HR14 clock ready flag</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>HSI14DIS</name> + <description>HSI14 clock request from ADC + disable</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>HSI14TRIM</name> + <description>HSI14 clock trimming</description> + <bitOffset>3</bitOffset> + <bitWidth>5</bitWidth> + <access>read-write</access> + </field> + <field> + <name>HSI14CAL</name> + <description>HSI14 clock calibration</description> + <bitOffset>8</bitOffset> + <bitWidth>8</bitWidth> + <access>read-only</access> + </field> + <field> + <name>HSI48ON</name> + <description>HSI48 clock enable</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>HSI48RDY</name> + <description>HSI48 clock ready flag</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>HSI48CAL</name> + <description>HSI48 factory clock + calibration</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + </fields> + </register> + </registers> + </peripheral> + <peripheral> + <name>SYSCFG_COMP</name> + <description>System configuration controller</description> + <groupName>SYSCFG</groupName> + <baseAddress>0x40010000</baseAddress> + <addressBlock> + <offset>0x0</offset> + <size>0x21</size> + <usage>registers</usage> + </addressBlock> + <registers> + <register> + <name>SYSCFG_CFGR1</name> + <displayName>SYSCFG_CFGR1</displayName> + <description>configuration register 1</description> + <addressOffset>0x0</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>MEM_MODE</name> + <description>Memory mapping selection + bits</description> + <bitOffset>0</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>ADC_DMA_RMP</name> + <description>ADC DMA remapping bit</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>USART1_TX_DMA_RMP</name> + <description>USART1_TX DMA remapping + bit</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>USART1_RX_DMA_RMP</name> + <description>USART1_RX DMA request remapping + bit</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TIM16_DMA_RMP</name> + <description>TIM16 DMA request remapping + bit</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TIM17_DMA_RMP</name> + <description>TIM17 DMA request remapping + bit</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>I2C_PB6_FM</name> + <description>Fast Mode Plus (FM plus) driving + capability activation bits.</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>I2C_PB7_FM</name> + <description>Fast Mode Plus (FM+) driving capability + activation bits.</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>I2C_PB8_FM</name> + <description>Fast Mode Plus (FM+) driving capability + activation bits.</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>I2C_PB9_FM</name> + <description>Fast Mode Plus (FM+) driving capability + activation bits.</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>I2C1_FM_plus</name> + <description>FM+ driving capability activation for + I2C1</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>I2C2_FM_plus</name> + <description>FM+ driving capability activation for + I2C2</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SPI2_DMA_RMP</name> + <description>SPI2 DMA request remapping + bit</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>USART2_DMA_RMP</name> + <description>USART2 DMA request remapping + bit</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>USART3_DMA_RMP</name> + <description>USART3 DMA request remapping + bit</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>I2C1_DMA_RMP</name> + <description>I2C1 DMA request remapping + bit</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TIM1_DMA_RMP</name> + <description>TIM1 DMA request remapping + bit</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TIM2_DMA_RMP</name> + <description>TIM2 DMA request remapping + bit</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TIM3_DMA_RMP</name> + <description>TIM3 DMA request remapping + bit</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>SYSCFG_EXTICR1</name> + <displayName>SYSCFG_EXTICR1</displayName> + <description>external interrupt configuration register + 1</description> + <addressOffset>0x8</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>EXTI3</name> + <description>EXTI 3 configuration bits</description> + <bitOffset>12</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>EXTI2</name> + <description>EXTI 2 configuration bits</description> + <bitOffset>8</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>EXTI1</name> + <description>EXTI 1 configuration bits</description> + <bitOffset>4</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>EXTI0</name> + <description>EXTI 0 configuration bits</description> + <bitOffset>0</bitOffset> + <bitWidth>4</bitWidth> + </field> + </fields> + </register> + <register> + <name>SYSCFG_EXTICR2</name> + <displayName>SYSCFG_EXTICR2</displayName> + <description>external interrupt configuration register + 2</description> + <addressOffset>0xC</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>EXTI7</name> + <description>EXTI 7 configuration bits</description> + <bitOffset>12</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>EXTI6</name> + <description>EXTI 6 configuration bits</description> + <bitOffset>8</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>EXTI5</name> + <description>EXTI 5 configuration bits</description> + <bitOffset>4</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>EXTI4</name> + <description>EXTI 4 configuration bits</description> + <bitOffset>0</bitOffset> + <bitWidth>4</bitWidth> + </field> + </fields> + </register> + <register> + <name>SYSCFG_EXTICR3</name> + <displayName>SYSCFG_EXTICR3</displayName> + <description>external interrupt configuration register + 3</description> + <addressOffset>0x10</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>EXTI11</name> + <description>EXTI 11 configuration bits</description> + <bitOffset>12</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>EXTI10</name> + <description>EXTI 10 configuration bits</description> + <bitOffset>8</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>EXTI9</name> + <description>EXTI 9 configuration bits</description> + <bitOffset>4</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>EXTI8</name> + <description>EXTI 8 configuration bits</description> + <bitOffset>0</bitOffset> + <bitWidth>4</bitWidth> + </field> + </fields> + </register> + <register> + <name>SYSCFG_EXTICR4</name> + <displayName>SYSCFG_EXTICR4</displayName> + <description>external interrupt configuration register + 4</description> + <addressOffset>0x14</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>EXTI15</name> + <description>EXTI 15 configuration bits</description> + <bitOffset>12</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>EXTI14</name> + <description>EXTI 14 configuration bits</description> + <bitOffset>8</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>EXTI13</name> + <description>EXTI 13 configuration bits</description> + <bitOffset>4</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>EXTI12</name> + <description>EXTI 12 configuration bits</description> + <bitOffset>0</bitOffset> + <bitWidth>4</bitWidth> + </field> + </fields> + </register> + <register> + <name>SYSCFG_CFGR2</name> + <displayName>SYSCFG_CFGR2</displayName> + <description>configuration register 2</description> + <addressOffset>0x18</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>SRAM_PEF</name> + <description>SRAM parity flag</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PVD_LOCK</name> + <description>PVD lock enable bit</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SRAM_PARITY_LOCK</name> + <description>SRAM parity lock bit</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>LOCUP_LOCK</name> + <description>Cortex-M0 LOCKUP bit enable + bit</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>COMP_CSR</name> + <displayName>COMP_CSR</displayName> + <description>control and status register</description> + <addressOffset>0x1C</addressOffset> + <size>0x20</size> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>COMP1EN</name> + <description>Comparator 1 enable</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>COMP1_INP_DAC</name> + <description>COMP1_INP_DAC</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>COMP1MODE</name> + <description>Comparator 1 mode</description> + <bitOffset>2</bitOffset> + <bitWidth>2</bitWidth> + <access>read-write</access> + </field> + <field> + <name>COMP1INSEL</name> + <description>Comparator 1 inverting input + selection</description> + <bitOffset>4</bitOffset> + <bitWidth>3</bitWidth> + <access>read-write</access> + </field> + <field> + <name>COMP1OUTSEL</name> + <description>Comparator 1 output + selection</description> + <bitOffset>8</bitOffset> + <bitWidth>3</bitWidth> + <access>read-write</access> + </field> + <field> + <name>COMP1POL</name> + <description>Comparator 1 output + polarity</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>COMP1HYST</name> + <description>Comparator 1 hysteresis</description> + <bitOffset>12</bitOffset> + <bitWidth>2</bitWidth> + <access>read-write</access> + </field> + <field> + <name>COMP1OUT</name> + <description>Comparator 1 output</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>COMP1LOCK</name> + <description>Comparator 1 lock</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>COMP2EN</name> + <description>Comparator 2 enable</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>COMP2MODE</name> + <description>Comparator 2 mode</description> + <bitOffset>18</bitOffset> + <bitWidth>2</bitWidth> + <access>read-write</access> + </field> + <field> + <name>COMP2INSEL</name> + <description>Comparator 2 inverting input + selection</description> + <bitOffset>20</bitOffset> + <bitWidth>3</bitWidth> + <access>read-write</access> + </field> + <field> + <name>WNDWEN</name> + <description>Window mode enable</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>COMP2OUTSEL</name> + <description>Comparator 2 output + selection</description> + <bitOffset>24</bitOffset> + <bitWidth>3</bitWidth> + <access>read-write</access> + </field> + <field> + <name>COMP2POL</name> + <description>Comparator 2 output + polarity</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>COMP2HYST</name> + <description>Comparator 2 hysteresis</description> + <bitOffset>28</bitOffset> + <bitWidth>2</bitWidth> + <access>read-write</access> + </field> + <field> + <name>COMP2OUT</name> + <description>Comparator 2 output</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>COMP2LOCK</name> + <description>Comparator 2 lock</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + </fields> + </register> + </registers> + </peripheral> + <peripheral> + <name>ADC</name> + <description>Analog-to-digital converter</description> + <groupName>ADC</groupName> + <baseAddress>0x40012400</baseAddress> + <addressBlock> + <offset>0x0</offset> + <size>0x400</size> + <usage>registers</usage> + </addressBlock> + <interrupt> + <name>ADC_COMP</name> + <description>ADC and comparator interrupts</description> + <value>12</value> + </interrupt> + <registers> + <register> + <name>ISR</name> + <displayName>ISR</displayName> + <description>interrupt and status register</description> + <addressOffset>0x0</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>AWD</name> + <description>Analog watchdog flag</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OVR</name> + <description>ADC overrun</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>EOS</name> + <description>End of sequence flag</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>EOC</name> + <description>End of conversion flag</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>EOSMP</name> + <description>End of sampling flag</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ADRDY</name> + <description>ADC ready</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>IER</name> + <displayName>IER</displayName> + <description>interrupt enable register</description> + <addressOffset>0x4</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>AWDIE</name> + <description>Analog watchdog interrupt + enable</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OVRIE</name> + <description>Overrun interrupt enable</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>EOSIE</name> + <description>End of conversion sequence interrupt + enable</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>EOCIE</name> + <description>End of conversion interrupt + enable</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>EOSMPIE</name> + <description>End of sampling flag interrupt + enable</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ADRDYIE</name> + <description>ADC ready interrupt enable</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>CR</name> + <displayName>CR</displayName> + <description>control register</description> + <addressOffset>0x8</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>ADCAL</name> + <description>ADC calibration</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ADSTP</name> + <description>ADC stop conversion + command</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ADSTART</name> + <description>ADC start conversion + command</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ADDIS</name> + <description>ADC disable command</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ADEN</name> + <description>ADC enable command</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>CFGR1</name> + <displayName>CFGR1</displayName> + <description>configuration register 1</description> + <addressOffset>0xC</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>AWDCH</name> + <description>Analog watchdog channel + selection</description> + <bitOffset>26</bitOffset> + <bitWidth>5</bitWidth> + </field> + <field> + <name>AWDEN</name> + <description>Analog watchdog enable</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>AWDSGL</name> + <description>Enable the watchdog on a single channel + or on all channels</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>DISCEN</name> + <description>Discontinuous mode</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>AUTOFF</name> + <description>Auto-off mode</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>AUTDLY</name> + <description>Auto-delayed conversion + mode</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CONT</name> + <description>Single / continuous conversion + mode</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OVRMOD</name> + <description>Overrun management mode</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>EXTEN</name> + <description>External trigger enable and polarity + selection</description> + <bitOffset>10</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>EXTSEL</name> + <description>External trigger selection</description> + <bitOffset>6</bitOffset> + <bitWidth>3</bitWidth> + </field> + <field> + <name>ALIGN</name> + <description>Data alignment</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>RES</name> + <description>Data resolution</description> + <bitOffset>3</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>SCANDIR</name> + <description>Scan sequence direction</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>DMACFG</name> + <description>Direct memery access + configuration</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>DMAEN</name> + <description>Direct memory access + enable</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>CFGR2</name> + <displayName>CFGR2</displayName> + <description>configuration register 2</description> + <addressOffset>0x10</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00008000</resetValue> + <fields> + <field> + <name>JITOFF_D4</name> + <description>JITOFF_D4</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>JITOFF_D2</name> + <description>JITOFF_D2</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>SMPR</name> + <displayName>SMPR</displayName> + <description>sampling time register</description> + <addressOffset>0x14</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>SMPR</name> + <description>Sampling time selection</description> + <bitOffset>0</bitOffset> + <bitWidth>3</bitWidth> + </field> + </fields> + </register> + <register> + <name>TR</name> + <displayName>TR</displayName> + <description>watchdog threshold register</description> + <addressOffset>0x20</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000FFF</resetValue> + <fields> + <field> + <name>HT</name> + <description>Analog watchdog higher + threshold</description> + <bitOffset>16</bitOffset> + <bitWidth>12</bitWidth> + </field> + <field> + <name>LT</name> + <description>Analog watchdog lower + threshold</description> + <bitOffset>0</bitOffset> + <bitWidth>12</bitWidth> + </field> + </fields> + </register> + <register> + <name>CHSELR</name> + <displayName>CHSELR</displayName> + <description>channel selection register</description> + <addressOffset>0x28</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>CHSEL18</name> + <description>Channel-x selection</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CHSEL17</name> + <description>Channel-x selection</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CHSEL16</name> + <description>Channel-x selection</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CHSEL15</name> + <description>Channel-x selection</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CHSEL14</name> + <description>Channel-x selection</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CHSEL13</name> + <description>Channel-x selection</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CHSEL12</name> + <description>Channel-x selection</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CHSEL11</name> + <description>Channel-x selection</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CHSEL10</name> + <description>Channel-x selection</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CHSEL9</name> + <description>Channel-x selection</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CHSEL8</name> + <description>Channel-x selection</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CHSEL7</name> + <description>Channel-x selection</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CHSEL6</name> + <description>Channel-x selection</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CHSEL5</name> + <description>Channel-x selection</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CHSEL4</name> + <description>Channel-x selection</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CHSEL3</name> + <description>Channel-x selection</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CHSEL2</name> + <description>Channel-x selection</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CHSEL1</name> + <description>Channel-x selection</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CHSEL0</name> + <description>Channel-x selection</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>DR</name> + <displayName>DR</displayName> + <description>data register</description> + <addressOffset>0x40</addressOffset> + <size>0x20</size> + <access>read-only</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>DATA</name> + <description>Converted data</description> + <bitOffset>0</bitOffset> + <bitWidth>16</bitWidth> + </field> + </fields> + </register> + <register> + <name>CCR</name> + <displayName>CCR</displayName> + <description>common configuration register</description> + <addressOffset>0x308</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>VBATEN</name> + <description>VBAT enable</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TSEN</name> + <description>Temperature sensor enable</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>VREFEN</name> + <description>Temperature sensor and VREFINT + enable</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + </registers> + </peripheral> + <peripheral> + <name>USART1</name> + <description>Universal synchronous asynchronous receiver + transmitter</description> + <groupName>USART</groupName> + <baseAddress>0x40013800</baseAddress> + <addressBlock> + <offset>0x0</offset> + <size>0x400</size> + <usage>registers</usage> + </addressBlock> + <interrupt> + <name>USART1</name> + <description>USART1 global interrupt</description> + <value>27</value> + </interrupt> + <registers> + <register> + <name>CR1</name> + <displayName>CR1</displayName> + <description>Control register 1</description> + <addressOffset>0x0</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>UE</name> + <description>USART enable</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>UESM</name> + <description>USART enable in Stop mode</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>RE</name> + <description>Receiver enable</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TE</name> + <description>Transmitter enable</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>IDLEIE</name> + <description>IDLE interrupt enable</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>RXNEIE</name> + <description>RXNE interrupt enable</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TCIE</name> + <description>Transmission complete interrupt + enable</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TXEIE</name> + <description>interrupt enable</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PEIE</name> + <description>PE interrupt enable</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PS</name> + <description>Parity selection</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PCE</name> + <description>Parity control enable</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>WAKE</name> + <description>Receiver wakeup method</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>M</name> + <description>Word length</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MME</name> + <description>Mute mode enable</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CMIE</name> + <description>Character match interrupt + enable</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OVER8</name> + <description>Oversampling mode</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>DEDT</name> + <description>Driver Enable deassertion + time</description> + <bitOffset>16</bitOffset> + <bitWidth>5</bitWidth> + </field> + <field> + <name>DEAT</name> + <description>Driver Enable assertion + time</description> + <bitOffset>21</bitOffset> + <bitWidth>5</bitWidth> + </field> + <field> + <name>RTOIE</name> + <description>Receiver timeout interrupt + enable</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>EOBIE</name> + <description>End of Block interrupt + enable</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>M1</name> + <description>Word length</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>CR2</name> + <displayName>CR2</displayName> + <description>Control register 2</description> + <addressOffset>0x4</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>ADD4</name> + <description>Address of the USART node</description> + <bitOffset>28</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>ADD0</name> + <description>Address of the USART node</description> + <bitOffset>24</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>RTOEN</name> + <description>Receiver timeout enable</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ABRMOD</name> + <description>Auto baud rate mode</description> + <bitOffset>21</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>ABREN</name> + <description>Auto baud rate enable</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MSBFIRST</name> + <description>Most significant bit first</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>DATAINV</name> + <description>Binary data inversion</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TXINV</name> + <description>TX pin active level + inversion</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>RXINV</name> + <description>RX pin active level + inversion</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SWAP</name> + <description>Swap TX/RX pins</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>LINEN</name> + <description>LIN mode enable</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>STOP</name> + <description>STOP bits</description> + <bitOffset>12</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>CLKEN</name> + <description>Clock enable</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CPOL</name> + <description>Clock polarity</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CPHA</name> + <description>Clock phase</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>LBCL</name> + <description>Last bit clock pulse</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>LBDIE</name> + <description>LIN break detection interrupt + enable</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>LBDL</name> + <description>LIN break detection length</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ADDM7</name> + <description>7-bit Address Detection/4-bit Address + Detection</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>CR3</name> + <displayName>CR3</displayName> + <description>Control register 3</description> + <addressOffset>0x8</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>WUFIE</name> + <description>Wakeup from Stop mode interrupt + enable</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>WUS</name> + <description>Wakeup from Stop mode interrupt flag + selection</description> + <bitOffset>20</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>SCARCNT</name> + <description>Smartcard auto-retry count</description> + <bitOffset>17</bitOffset> + <bitWidth>3</bitWidth> + </field> + <field> + <name>DEP</name> + <description>Driver enable polarity + selection</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>DEM</name> + <description>Driver enable mode</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>DDRE</name> + <description>DMA Disable on Reception + Error</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OVRDIS</name> + <description>Overrun Disable</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ONEBIT</name> + <description>One sample bit method + enable</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CTSIE</name> + <description>CTS interrupt enable</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CTSE</name> + <description>CTS enable</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>RTSE</name> + <description>RTS enable</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>DMAT</name> + <description>DMA enable transmitter</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>DMAR</name> + <description>DMA enable receiver</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SCEN</name> + <description>Smartcard mode enable</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>NACK</name> + <description>Smartcard NACK enable</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>HDSEL</name> + <description>Half-duplex selection</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>IRLP</name> + <description>IrDA low-power</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>IREN</name> + <description>IrDA mode enable</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>EIE</name> + <description>Error interrupt enable</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>BRR</name> + <displayName>BRR</displayName> + <description>Baud rate register</description> + <addressOffset>0xC</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>DIV_Mantissa</name> + <description>mantissa of USARTDIV</description> + <bitOffset>4</bitOffset> + <bitWidth>12</bitWidth> + </field> + <field> + <name>DIV_Fraction</name> + <description>fraction of USARTDIV</description> + <bitOffset>0</bitOffset> + <bitWidth>4</bitWidth> + </field> + </fields> + </register> + <register> + <name>GTPR</name> + <displayName>GTPR</displayName> + <description>Guard time and prescaler + register</description> + <addressOffset>0x10</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>GT</name> + <description>Guard time value</description> + <bitOffset>8</bitOffset> + <bitWidth>8</bitWidth> + </field> + <field> + <name>PSC</name> + <description>Prescaler value</description> + <bitOffset>0</bitOffset> + <bitWidth>8</bitWidth> + </field> + </fields> + </register> + <register> + <name>RTOR</name> + <displayName>RTOR</displayName> + <description>Receiver timeout register</description> + <addressOffset>0x14</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>BLEN</name> + <description>Block Length</description> + <bitOffset>24</bitOffset> + <bitWidth>8</bitWidth> + </field> + <field> + <name>RTO</name> + <description>Receiver timeout value</description> + <bitOffset>0</bitOffset> + <bitWidth>24</bitWidth> + </field> + </fields> + </register> + <register> + <name>RQR</name> + <displayName>RQR</displayName> + <description>Request register</description> + <addressOffset>0x18</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>TXFRQ</name> + <description>Transmit data flush + request</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>RXFRQ</name> + <description>Receive data flush request</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MMRQ</name> + <description>Mute mode request</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SBKRQ</name> + <description>Send break request</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ABRRQ</name> + <description>Auto baud rate request</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>ISR</name> + <displayName>ISR</displayName> + <description>Interrupt & status + register</description> + <addressOffset>0x1C</addressOffset> + <size>0x20</size> + <access>read-only</access> + <resetValue>0x00C0</resetValue> + <fields> + <field> + <name>REACK</name> + <description>Receive enable acknowledge + flag</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TEACK</name> + <description>Transmit enable acknowledge + flag</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>WUF</name> + <description>Wakeup from Stop mode flag</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>RWU</name> + <description>Receiver wakeup from Mute + mode</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SBKF</name> + <description>Send break flag</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CMF</name> + <description>character match flag</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BUSY</name> + <description>Busy flag</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ABRF</name> + <description>Auto baud rate flag</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ABRE</name> + <description>Auto baud rate error</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>EOBF</name> + <description>End of block flag</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>RTOF</name> + <description>Receiver timeout</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CTS</name> + <description>CTS flag</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CTSIF</name> + <description>CTS interrupt flag</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>LBDF</name> + <description>LIN break detection flag</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TXE</name> + <description>Transmit data register + empty</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TC</name> + <description>Transmission complete</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>RXNE</name> + <description>Read data register not + empty</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>IDLE</name> + <description>Idle line detected</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ORE</name> + <description>Overrun error</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>NF</name> + <description>Noise detected flag</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FE</name> + <description>Framing error</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PE</name> + <description>Parity error</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>ICR</name> + <displayName>ICR</displayName> + <description>Interrupt flag clear register</description> + <addressOffset>0x20</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>WUCF</name> + <description>Wakeup from Stop mode clear + flag</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CMCF</name> + <description>Character match clear flag</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>EOBCF</name> + <description>End of timeout clear flag</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>RTOCF</name> + <description>Receiver timeout clear + flag</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CTSCF</name> + <description>CTS clear flag</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>LBDCF</name> + <description>LIN break detection clear + flag</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TCCF</name> + <description>Transmission complete clear + flag</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>IDLECF</name> + <description>Idle line detected clear + flag</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ORECF</name> + <description>Overrun error clear flag</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>NCF</name> + <description>Noise detected clear flag</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FECF</name> + <description>Framing error clear flag</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PECF</name> + <description>Parity error clear flag</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>RDR</name> + <displayName>RDR</displayName> + <description>Receive data register</description> + <addressOffset>0x24</addressOffset> + <size>0x20</size> + <access>read-only</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>RDR</name> + <description>Receive data value</description> + <bitOffset>0</bitOffset> + <bitWidth>9</bitWidth> + </field> + </fields> + </register> + <register> + <name>TDR</name> + <displayName>TDR</displayName> + <description>Transmit data register</description> + <addressOffset>0x28</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>TDR</name> + <description>Transmit data value</description> + <bitOffset>0</bitOffset> + <bitWidth>9</bitWidth> + </field> + </fields> + </register> + </registers> + </peripheral> + <peripheral derivedFrom="USART1"> + <name>USART2</name> + <baseAddress>0x40004400</baseAddress> + <interrupt> + <name>USART2</name> + <description>USART2 global interrupt</description> + <value>28</value> + </interrupt> + </peripheral> + <peripheral derivedFrom="USART1"> + <name>USART3</name> + <baseAddress>0x40004800</baseAddress> + <interrupt> + <name>USART3_4</name> + <description>USART3 and USART4 global + interrupt</description> + <value>29</value> + </interrupt> + </peripheral> + <peripheral derivedFrom="USART1"> + <name>USART4</name> + <baseAddress>0x40004C00</baseAddress> + </peripheral> + <peripheral> + <name>RTC</name> + <description>Real-time clock</description> + <groupName>RTC</groupName> + <baseAddress>0x40002800</baseAddress> + <addressBlock> + <offset>0x0</offset> + <size>0x400</size> + <usage>registers</usage> + </addressBlock> + <interrupt> + <name>RTC</name> + <description>RTC interrupts</description> + <value>2</value> + </interrupt> + <registers> + <register> + <name>TR</name> + <displayName>TR</displayName> + <description>time register</description> + <addressOffset>0x0</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>PM</name> + <description>AM/PM notation</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>HT</name> + <description>Hour tens in BCD format</description> + <bitOffset>20</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>HU</name> + <description>Hour units in BCD format</description> + <bitOffset>16</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>MNT</name> + <description>Minute tens in BCD format</description> + <bitOffset>12</bitOffset> + <bitWidth>3</bitWidth> + </field> + <field> + <name>MNU</name> + <description>Minute units in BCD format</description> + <bitOffset>8</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>ST</name> + <description>Second tens in BCD format</description> + <bitOffset>4</bitOffset> + <bitWidth>3</bitWidth> + </field> + <field> + <name>SU</name> + <description>Second units in BCD format</description> + <bitOffset>0</bitOffset> + <bitWidth>4</bitWidth> + </field> + </fields> + </register> + <register> + <name>DR</name> + <displayName>DR</displayName> + <description>date register</description> + <addressOffset>0x4</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00002101</resetValue> + <fields> + <field> + <name>YT</name> + <description>Year tens in BCD format</description> + <bitOffset>20</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>YU</name> + <description>Year units in BCD format</description> + <bitOffset>16</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>WDU</name> + <description>Week day units</description> + <bitOffset>13</bitOffset> + <bitWidth>3</bitWidth> + </field> + <field> + <name>MT</name> + <description>Month tens in BCD format</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MU</name> + <description>Month units in BCD format</description> + <bitOffset>8</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>DT</name> + <description>Date tens in BCD format</description> + <bitOffset>4</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>DU</name> + <description>Date units in BCD format</description> + <bitOffset>0</bitOffset> + <bitWidth>4</bitWidth> + </field> + </fields> + </register> + <register> + <name>CR</name> + <displayName>CR</displayName> + <description>control register</description> + <addressOffset>0x8</addressOffset> + <size>0x20</size> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>TSEDGE</name> + <description>Time-stamp event active + edge</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>REFCKON</name> + <description>RTC_REFIN reference clock detection + enable (50 or 60 Hz)</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>BYPSHAD</name> + <description>Bypass the shadow + registers</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>FMT</name> + <description>Hour format</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>ALRAE</name> + <description>Alarm A enable</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>TSE</name> + <description>timestamp enable</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>ALRAIE</name> + <description>Alarm A interrupt enable</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>TSIE</name> + <description>Time-stamp interrupt + enable</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>ADD1H</name> + <description>Add 1 hour (summer time + change)</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + <access>write-only</access> + </field> + <field> + <name>SUB1H</name> + <description>Subtract 1 hour (winter time + change)</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + <access>write-only</access> + </field> + <field> + <name>BKP</name> + <description>Backup</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>COSEL</name> + <description>Calibration output + selection</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>POL</name> + <description>Output polarity</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>OSEL</name> + <description>Output selection</description> + <bitOffset>21</bitOffset> + <bitWidth>2</bitWidth> + <access>read-write</access> + </field> + <field> + <name>COE</name> + <description>Calibration output enable</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + </fields> + </register> + <register> + <name>ISR</name> + <displayName>ISR</displayName> + <description>initialization and status + register</description> + <addressOffset>0xC</addressOffset> + <size>0x20</size> + <resetValue>0x00000007</resetValue> + <fields> + <field> + <name>ALRAWF</name> + <description>Alarm A write flag</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>SHPF</name> + <description>Shift operation pending</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>INITS</name> + <description>Initialization status flag</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>RSF</name> + <description>Registers synchronization + flag</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>INITF</name> + <description>Initialization flag</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>INIT</name> + <description>Initialization mode</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>ALRAF</name> + <description>Alarm A flag</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>TSF</name> + <description>Time-stamp flag</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>TSOVF</name> + <description>Time-stamp overflow flag</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>TAMP1F</name> + <description>RTC_TAMP1 detection flag</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>TAMP2F</name> + <description>RTC_TAMP2 detection flag</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>RECALPF</name> + <description>Recalibration pending Flag</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + </fields> + </register> + <register> + <name>PRER</name> + <displayName>PRER</displayName> + <description>prescaler register</description> + <addressOffset>0x10</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x007F00FF</resetValue> + <fields> + <field> + <name>PREDIV_A</name> + <description>Asynchronous prescaler + factor</description> + <bitOffset>16</bitOffset> + <bitWidth>7</bitWidth> + </field> + <field> + <name>PREDIV_S</name> + <description>Synchronous prescaler + factor</description> + <bitOffset>0</bitOffset> + <bitWidth>15</bitWidth> + </field> + </fields> + </register> + <register> + <name>ALRMAR</name> + <displayName>ALRMAR</displayName> + <description>alarm A register</description> + <addressOffset>0x1C</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>MSK4</name> + <description>Alarm A date mask</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>WDSEL</name> + <description>Week day selection</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>DT</name> + <description>Date tens in BCD format.</description> + <bitOffset>28</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>DU</name> + <description>Date units or day in BCD + format.</description> + <bitOffset>24</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>MSK3</name> + <description>Alarm A hours mask</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PM</name> + <description>AM/PM notation</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>HT</name> + <description>Hour tens in BCD format.</description> + <bitOffset>20</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>HU</name> + <description>Hour units in BCD format.</description> + <bitOffset>16</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>MSK2</name> + <description>Alarm A minutes mask</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MNT</name> + <description>Minute tens in BCD format.</description> + <bitOffset>12</bitOffset> + <bitWidth>3</bitWidth> + </field> + <field> + <name>MNU</name> + <description>Minute units in BCD + format.</description> + <bitOffset>8</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>MSK1</name> + <description>Alarm A seconds mask</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ST</name> + <description>Second tens in BCD format.</description> + <bitOffset>4</bitOffset> + <bitWidth>3</bitWidth> + </field> + <field> + <name>SU</name> + <description>Second units in BCD + format.</description> + <bitOffset>0</bitOffset> + <bitWidth>4</bitWidth> + </field> + </fields> + </register> + <register> + <name>WPR</name> + <displayName>WPR</displayName> + <description>write protection register</description> + <addressOffset>0x24</addressOffset> + <size>0x20</size> + <access>write-only</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>KEY</name> + <description>Write protection key</description> + <bitOffset>0</bitOffset> + <bitWidth>8</bitWidth> + </field> + </fields> + </register> + <register> + <name>SSR</name> + <displayName>SSR</displayName> + <description>sub second register</description> + <addressOffset>0x28</addressOffset> + <size>0x20</size> + <access>read-only</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>SS</name> + <description>Sub second value</description> + <bitOffset>0</bitOffset> + <bitWidth>16</bitWidth> + </field> + </fields> + </register> + <register> + <name>SHIFTR</name> + <displayName>SHIFTR</displayName> + <description>shift control register</description> + <addressOffset>0x2C</addressOffset> + <size>0x20</size> + <access>write-only</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>ADD1S</name> + <description>Add one second</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SUBFS</name> + <description>Subtract a fraction of a + second</description> + <bitOffset>0</bitOffset> + <bitWidth>15</bitWidth> + </field> + </fields> + </register> + <register> + <name>TSTR</name> + <displayName>TSTR</displayName> + <description>timestamp time register</description> + <addressOffset>0x30</addressOffset> + <size>0x20</size> + <access>read-only</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>PM</name> + <description>AM/PM notation</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>HT</name> + <description>Hour tens in BCD format.</description> + <bitOffset>20</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>HU</name> + <description>Hour units in BCD format.</description> + <bitOffset>16</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>MNT</name> + <description>Minute tens in BCD format.</description> + <bitOffset>12</bitOffset> + <bitWidth>3</bitWidth> + </field> + <field> + <name>MNU</name> + <description>Minute units in BCD + format.</description> + <bitOffset>8</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>ST</name> + <description>Second tens in BCD format.</description> + <bitOffset>4</bitOffset> + <bitWidth>3</bitWidth> + </field> + <field> + <name>SU</name> + <description>Second units in BCD + format.</description> + <bitOffset>0</bitOffset> + <bitWidth>4</bitWidth> + </field> + </fields> + </register> + <register> + <name>TSDR</name> + <displayName>TSDR</displayName> + <description>timestamp date register</description> + <addressOffset>0x34</addressOffset> + <size>0x20</size> + <access>read-only</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>WDU</name> + <description>Week day units</description> + <bitOffset>13</bitOffset> + <bitWidth>3</bitWidth> + </field> + <field> + <name>MT</name> + <description>Month tens in BCD format</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MU</name> + <description>Month units in BCD format</description> + <bitOffset>8</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>DT</name> + <description>Date tens in BCD format</description> + <bitOffset>4</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>DU</name> + <description>Date units in BCD format</description> + <bitOffset>0</bitOffset> + <bitWidth>4</bitWidth> + </field> + </fields> + </register> + <register> + <name>TSSSR</name> + <displayName>TSSSR</displayName> + <description>time-stamp sub second register</description> + <addressOffset>0x38</addressOffset> + <size>0x20</size> + <access>read-only</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>SS</name> + <description>Sub second value</description> + <bitOffset>0</bitOffset> + <bitWidth>16</bitWidth> + </field> + </fields> + </register> + <register> + <name>CALR</name> + <displayName>CALR</displayName> + <description>calibration register</description> + <addressOffset>0x3C</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>CALP</name> + <description>Increase frequency of RTC by 488.5 + ppm</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CALW8</name> + <description>Use an 8-second calibration cycle + period</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CALW16</name> + <description>Use a 16-second calibration cycle + period</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CALM</name> + <description>Calibration minus</description> + <bitOffset>0</bitOffset> + <bitWidth>9</bitWidth> + </field> + </fields> + </register> + <register> + <name>TAFCR</name> + <displayName>TAFCR</displayName> + <description>tamper and alternate function configuration + register</description> + <addressOffset>0x40</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>PC15MODE</name> + <description>PC15 mode</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PC15VALUE</name> + <description>PC15 value</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PC14MODE</name> + <description>PC14 mode</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PC14VALUE</name> + <description>PC14 value</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PC13MODE</name> + <description>PC13 mode</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PC13VALUE</name> + <description>RTC_ALARM output type/PC13 + value</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TAMP_PUDIS</name> + <description>RTC_TAMPx pull-up disable</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TAMP_PRCH</name> + <description>RTC_TAMPx precharge + duration</description> + <bitOffset>13</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>TAMPFLT</name> + <description>RTC_TAMPx filter count</description> + <bitOffset>11</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>TAMPFREQ</name> + <description>Tamper sampling frequency</description> + <bitOffset>8</bitOffset> + <bitWidth>3</bitWidth> + </field> + <field> + <name>TAMPTS</name> + <description>Activate timestamp on tamper detection + event</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TAMP2_TRG</name> + <description>Active level for RTC_TAMP2 + input</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TAMP2E</name> + <description>RTC_TAMP2 input detection + enable</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TAMPIE</name> + <description>Tamper interrupt enable</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TAMP1TRG</name> + <description>Active level for RTC_TAMP1 + input</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TAMP1E</name> + <description>RTC_TAMP1 input detection + enable</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>ALRMASSR</name> + <displayName>ALRMASSR</displayName> + <description>alarm A sub second register</description> + <addressOffset>0x44</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>MASKSS</name> + <description>Mask the most-significant bits starting + at this bit</description> + <bitOffset>24</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>SS</name> + <description>Sub seconds value</description> + <bitOffset>0</bitOffset> + <bitWidth>15</bitWidth> + </field> + </fields> + </register> + <register> + <name>BKP0R</name> + <displayName>BKP0R</displayName> + <description>backup register</description> + <addressOffset>0x50</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>BKP</name> + <description>BKP</description> + <bitOffset>0</bitOffset> + <bitWidth>32</bitWidth> + </field> + </fields> + </register> + <register> + <name>BKP1R</name> + <displayName>BKP1R</displayName> + <description>backup register</description> + <addressOffset>0x54</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>BKP</name> + <description>BKP</description> + <bitOffset>0</bitOffset> + <bitWidth>32</bitWidth> + </field> + </fields> + </register> + <register> + <name>BKP2R</name> + <displayName>BKP2R</displayName> + <description>backup register</description> + <addressOffset>0x58</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>BKP</name> + <description>BKP</description> + <bitOffset>0</bitOffset> + <bitWidth>32</bitWidth> + </field> + </fields> + </register> + <register> + <name>BKP3R</name> + <displayName>BKP3R</displayName> + <description>backup register</description> + <addressOffset>0x5C</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>BKP</name> + <description>BKP</description> + <bitOffset>0</bitOffset> + <bitWidth>32</bitWidth> + </field> + </fields> + </register> + <register> + <name>BKP4R</name> + <displayName>BKP4R</displayName> + <description>backup register</description> + <addressOffset>0x60</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>BKP</name> + <description>BKP</description> + <bitOffset>0</bitOffset> + <bitWidth>32</bitWidth> + </field> + </fields> + </register> + </registers> + </peripheral> + <peripheral> + <name>TIM15</name> + <description>General-purpose-timers</description> + <groupName>TIM</groupName> + <baseAddress>0x40014000</baseAddress> + <addressBlock> + <offset>0x0</offset> + <size>0x400</size> + <usage>registers</usage> + </addressBlock> + <interrupt> + <name>TIM15</name> + <description>TIM15 global interrupt</description> + <value>20</value> + </interrupt> + <registers> + <register> + <name>CR1</name> + <displayName>CR1</displayName> + <description>control register 1</description> + <addressOffset>0x0</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>CKD</name> + <description>Clock division</description> + <bitOffset>8</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>ARPE</name> + <description>Auto-reload preload enable</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OPM</name> + <description>One-pulse mode</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>URS</name> + <description>Update request source</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>UDIS</name> + <description>Update disable</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CEN</name> + <description>Counter enable</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>CR2</name> + <displayName>CR2</displayName> + <description>control register 2</description> + <addressOffset>0x4</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>OIS2</name> + <description>Output Idle state 2</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OIS1N</name> + <description>Output Idle state 1</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OIS1</name> + <description>Output Idle state 1</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MMS</name> + <description>Master mode selection</description> + <bitOffset>4</bitOffset> + <bitWidth>3</bitWidth> + </field> + <field> + <name>CCDS</name> + <description>Capture/compare DMA + selection</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CCUS</name> + <description>Capture/compare control update + selection</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CCPC</name> + <description>Capture/compare preloaded + control</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>SMCR</name> + <displayName>SMCR</displayName> + <description>slave mode control register</description> + <addressOffset>0x8</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>MSM</name> + <description>Master/Slave mode</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TS</name> + <description>Trigger selection</description> + <bitOffset>4</bitOffset> + <bitWidth>3</bitWidth> + </field> + <field> + <name>SMS</name> + <description>Slave mode selection</description> + <bitOffset>0</bitOffset> + <bitWidth>3</bitWidth> + </field> + </fields> + </register> + <register> + <name>DIER</name> + <displayName>DIER</displayName> + <description>DMA/Interrupt enable register</description> + <addressOffset>0xC</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>TDE</name> + <description>Trigger DMA request enable</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC2DE</name> + <description>Capture/Compare 2 DMA request + enable</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC1DE</name> + <description>Capture/Compare 1 DMA request + enable</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>UDE</name> + <description>Update DMA request enable</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BIE</name> + <description>Break interrupt enable</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TIE</name> + <description>Trigger interrupt enable</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>COMIE</name> + <description>COM interrupt enable</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC2IE</name> + <description>Capture/Compare 2 interrupt + enable</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC1IE</name> + <description>Capture/Compare 1 interrupt + enable</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>UIE</name> + <description>Update interrupt enable</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>SR</name> + <displayName>SR</displayName> + <description>status register</description> + <addressOffset>0x10</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>CC2OF</name> + <description>Capture/compare 2 overcapture + flag</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC1OF</name> + <description>Capture/Compare 1 overcapture + flag</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BIF</name> + <description>Break interrupt flag</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TIF</name> + <description>Trigger interrupt flag</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>COMIF</name> + <description>COM interrupt flag</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC2IF</name> + <description>Capture/Compare 2 interrupt + flag</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC1IF</name> + <description>Capture/compare 1 interrupt + flag</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>UIF</name> + <description>Update interrupt flag</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>EGR</name> + <displayName>EGR</displayName> + <description>event generation register</description> + <addressOffset>0x14</addressOffset> + <size>0x20</size> + <access>write-only</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>BG</name> + <description>Break generation</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TG</name> + <description>Trigger generation</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>COMG</name> + <description>Capture/Compare control update + generation</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC2G</name> + <description>Capture/compare 2 + generation</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC1G</name> + <description>Capture/compare 1 + generation</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>UG</name> + <description>Update generation</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>CCMR1_Output</name> + <displayName>CCMR1_Output</displayName> + <description>capture/compare mode register (output + mode)</description> + <addressOffset>0x18</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>OC2M</name> + <description>Output Compare 2 mode</description> + <bitOffset>12</bitOffset> + <bitWidth>3</bitWidth> + </field> + <field> + <name>OC2PE</name> + <description>Output Compare 2 preload + enable</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OC2FE</name> + <description>Output Compare 2 fast + enable</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC2S</name> + <description>Capture/Compare 2 + selection</description> + <bitOffset>8</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>OC1M</name> + <description>Output Compare 1 mode</description> + <bitOffset>4</bitOffset> + <bitWidth>3</bitWidth> + </field> + <field> + <name>OC1PE</name> + <description>Output Compare 1 preload + enable</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OC1FE</name> + <description>Output Compare 1 fast + enable</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC1S</name> + <description>Capture/Compare 1 + selection</description> + <bitOffset>0</bitOffset> + <bitWidth>2</bitWidth> + </field> + </fields> + </register> + <register> + <name>CCMR1_Input</name> + <displayName>CCMR1_Input</displayName> + <description>capture/compare mode register 1 (input + mode)</description> + <alternateRegister>CCMR1_Output</alternateRegister> + <addressOffset>0x18</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>IC2F</name> + <description>Input capture 2 filter</description> + <bitOffset>12</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>IC2PSC</name> + <description>Input capture 2 prescaler</description> + <bitOffset>10</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>CC2S</name> + <description>Capture/Compare 2 + selection</description> + <bitOffset>8</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>IC1F</name> + <description>Input capture 1 filter</description> + <bitOffset>4</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>IC1PSC</name> + <description>Input capture 1 prescaler</description> + <bitOffset>2</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>CC1S</name> + <description>Capture/Compare 1 + selection</description> + <bitOffset>0</bitOffset> + <bitWidth>2</bitWidth> + </field> + </fields> + </register> + <register> + <name>CCER</name> + <displayName>CCER</displayName> + <description>capture/compare enable + register</description> + <addressOffset>0x20</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>CC2NP</name> + <description>Capture/Compare 2 output + Polarity</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC2P</name> + <description>Capture/Compare 2 output + Polarity</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC2E</name> + <description>Capture/Compare 2 output + enable</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC1NP</name> + <description>Capture/Compare 1 output + Polarity</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC1NE</name> + <description>Capture/Compare 1 complementary output + enable</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC1P</name> + <description>Capture/Compare 1 output + Polarity</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC1E</name> + <description>Capture/Compare 1 output + enable</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>CNT</name> + <displayName>CNT</displayName> + <description>counter</description> + <addressOffset>0x24</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>CNT</name> + <description>counter value</description> + <bitOffset>0</bitOffset> + <bitWidth>16</bitWidth> + </field> + </fields> + </register> + <register> + <name>PSC</name> + <displayName>PSC</displayName> + <description>prescaler</description> + <addressOffset>0x28</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>PSC</name> + <description>Prescaler value</description> + <bitOffset>0</bitOffset> + <bitWidth>16</bitWidth> + </field> + </fields> + </register> + <register> + <name>ARR</name> + <displayName>ARR</displayName> + <description>auto-reload register</description> + <addressOffset>0x2C</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>ARR</name> + <description>Auto-reload value</description> + <bitOffset>0</bitOffset> + <bitWidth>16</bitWidth> + </field> + </fields> + </register> + <register> + <name>RCR</name> + <displayName>RCR</displayName> + <description>repetition counter register</description> + <addressOffset>0x30</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>REP</name> + <description>Repetition counter value</description> + <bitOffset>0</bitOffset> + <bitWidth>8</bitWidth> + </field> + </fields> + </register> + <register> + <name>CCR1</name> + <displayName>CCR1</displayName> + <description>capture/compare register 1</description> + <addressOffset>0x34</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>CCR1</name> + <description>Capture/Compare 1 value</description> + <bitOffset>0</bitOffset> + <bitWidth>16</bitWidth> + </field> + </fields> + </register> + <register> + <name>CCR2</name> + <displayName>CCR2</displayName> + <description>capture/compare register 2</description> + <addressOffset>0x38</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>CCR2</name> + <description>Capture/Compare 2 value</description> + <bitOffset>0</bitOffset> + <bitWidth>16</bitWidth> + </field> + </fields> + </register> + <register> + <name>BDTR</name> + <displayName>BDTR</displayName> + <description>break and dead-time register</description> + <addressOffset>0x44</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>MOE</name> + <description>Main output enable</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>AOE</name> + <description>Automatic output enable</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BKP</name> + <description>Break polarity</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BKE</name> + <description>Break enable</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OSSR</name> + <description>Off-state selection for Run + mode</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OSSI</name> + <description>Off-state selection for Idle + mode</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>LOCK</name> + <description>Lock configuration</description> + <bitOffset>8</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>DTG</name> + <description>Dead-time generator setup</description> + <bitOffset>0</bitOffset> + <bitWidth>8</bitWidth> + </field> + </fields> + </register> + <register> + <name>DCR</name> + <displayName>DCR</displayName> + <description>DMA control register</description> + <addressOffset>0x48</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>DBL</name> + <description>DMA burst length</description> + <bitOffset>8</bitOffset> + <bitWidth>5</bitWidth> + </field> + <field> + <name>DBA</name> + <description>DMA base address</description> + <bitOffset>0</bitOffset> + <bitWidth>5</bitWidth> + </field> + </fields> + </register> + <register> + <name>DMAR</name> + <displayName>DMAR</displayName> + <description>DMA address for full transfer</description> + <addressOffset>0x4C</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>DMAB</name> + <description>DMA register for burst + accesses</description> + <bitOffset>0</bitOffset> + <bitWidth>16</bitWidth> + </field> + </fields> + </register> + </registers> + </peripheral> + <peripheral> + <name>TIM16</name> + <description>General-purpose-timers</description> + <groupName>TIM</groupName> + <baseAddress>0x40014400</baseAddress> + <addressBlock> + <offset>0x0</offset> + <size>0x400</size> + <usage>registers</usage> + </addressBlock> + <interrupt> + <name>TIM16</name> + <description>TIM16 global interrupt</description> + <value>21</value> + </interrupt> + <registers> + <register> + <name>CR1</name> + <displayName>CR1</displayName> + <description>control register 1</description> + <addressOffset>0x0</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>CKD</name> + <description>Clock division</description> + <bitOffset>8</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>ARPE</name> + <description>Auto-reload preload enable</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OPM</name> + <description>One-pulse mode</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>URS</name> + <description>Update request source</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>UDIS</name> + <description>Update disable</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CEN</name> + <description>Counter enable</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>CR2</name> + <displayName>CR2</displayName> + <description>control register 2</description> + <addressOffset>0x4</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>OIS1N</name> + <description>Output Idle state 1</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OIS1</name> + <description>Output Idle state 1</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CCDS</name> + <description>Capture/compare DMA + selection</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CCUS</name> + <description>Capture/compare control update + selection</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CCPC</name> + <description>Capture/compare preloaded + control</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>DIER</name> + <displayName>DIER</displayName> + <description>DMA/Interrupt enable register</description> + <addressOffset>0xC</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>TDE</name> + <description>Trigger DMA request enable</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC1DE</name> + <description>Capture/Compare 1 DMA request + enable</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>UDE</name> + <description>Update DMA request enable</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BIE</name> + <description>Break interrupt enable</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TIE</name> + <description>Trigger interrupt enable</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>COMIE</name> + <description>COM interrupt enable</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC1IE</name> + <description>Capture/Compare 1 interrupt + enable</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>UIE</name> + <description>Update interrupt enable</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>SR</name> + <displayName>SR</displayName> + <description>status register</description> + <addressOffset>0x10</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>CC1OF</name> + <description>Capture/Compare 1 overcapture + flag</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BIF</name> + <description>Break interrupt flag</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TIF</name> + <description>Trigger interrupt flag</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>COMIF</name> + <description>COM interrupt flag</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC1IF</name> + <description>Capture/compare 1 interrupt + flag</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>UIF</name> + <description>Update interrupt flag</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>EGR</name> + <displayName>EGR</displayName> + <description>event generation register</description> + <addressOffset>0x14</addressOffset> + <size>0x20</size> + <access>write-only</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>BG</name> + <description>Break generation</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TG</name> + <description>Trigger generation</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>COMG</name> + <description>Capture/Compare control update + generation</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC1G</name> + <description>Capture/compare 1 + generation</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>UG</name> + <description>Update generation</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>CCMR1_Output</name> + <displayName>CCMR1_Output</displayName> + <description>capture/compare mode register (output + mode)</description> + <addressOffset>0x18</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>OC1M</name> + <description>Output Compare 1 mode</description> + <bitOffset>4</bitOffset> + <bitWidth>3</bitWidth> + </field> + <field> + <name>OC1PE</name> + <description>Output Compare 1 preload + enable</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OC1FE</name> + <description>Output Compare 1 fast + enable</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC1S</name> + <description>Capture/Compare 1 + selection</description> + <bitOffset>0</bitOffset> + <bitWidth>2</bitWidth> + </field> + </fields> + </register> + <register> + <name>CCMR1_Input</name> + <displayName>CCMR1_Input</displayName> + <description>capture/compare mode register 1 (input + mode)</description> + <alternateRegister>CCMR1_Output</alternateRegister> + <addressOffset>0x18</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>IC1F</name> + <description>Input capture 1 filter</description> + <bitOffset>4</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>IC1PSC</name> + <description>Input capture 1 prescaler</description> + <bitOffset>2</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>CC1S</name> + <description>Capture/Compare 1 + selection</description> + <bitOffset>0</bitOffset> + <bitWidth>2</bitWidth> + </field> + </fields> + </register> + <register> + <name>CCER</name> + <displayName>CCER</displayName> + <description>capture/compare enable + register</description> + <addressOffset>0x20</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>CC1NP</name> + <description>Capture/Compare 1 output + Polarity</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC1NE</name> + <description>Capture/Compare 1 complementary output + enable</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC1P</name> + <description>Capture/Compare 1 output + Polarity</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CC1E</name> + <description>Capture/Compare 1 output + enable</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>CNT</name> + <displayName>CNT</displayName> + <description>counter</description> + <addressOffset>0x24</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>CNT</name> + <description>counter value</description> + <bitOffset>0</bitOffset> + <bitWidth>16</bitWidth> + </field> + </fields> + </register> + <register> + <name>PSC</name> + <displayName>PSC</displayName> + <description>prescaler</description> + <addressOffset>0x28</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>PSC</name> + <description>Prescaler value</description> + <bitOffset>0</bitOffset> + <bitWidth>16</bitWidth> + </field> + </fields> + </register> + <register> + <name>ARR</name> + <displayName>ARR</displayName> + <description>auto-reload register</description> + <addressOffset>0x2C</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>ARR</name> + <description>Auto-reload value</description> + <bitOffset>0</bitOffset> + <bitWidth>16</bitWidth> + </field> + </fields> + </register> + <register> + <name>RCR</name> + <displayName>RCR</displayName> + <description>repetition counter register</description> + <addressOffset>0x30</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>REP</name> + <description>Repetition counter value</description> + <bitOffset>0</bitOffset> + <bitWidth>8</bitWidth> + </field> + </fields> + </register> + <register> + <name>CCR1</name> + <displayName>CCR1</displayName> + <description>capture/compare register 1</description> + <addressOffset>0x34</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>CCR1</name> + <description>Capture/Compare 1 value</description> + <bitOffset>0</bitOffset> + <bitWidth>16</bitWidth> + </field> + </fields> + </register> + <register> + <name>BDTR</name> + <displayName>BDTR</displayName> + <description>break and dead-time register</description> + <addressOffset>0x44</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>MOE</name> + <description>Main output enable</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>AOE</name> + <description>Automatic output enable</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BKP</name> + <description>Break polarity</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BKE</name> + <description>Break enable</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OSSR</name> + <description>Off-state selection for Run + mode</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OSSI</name> + <description>Off-state selection for Idle + mode</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>LOCK</name> + <description>Lock configuration</description> + <bitOffset>8</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>DTG</name> + <description>Dead-time generator setup</description> + <bitOffset>0</bitOffset> + <bitWidth>8</bitWidth> + </field> + </fields> + </register> + <register> + <name>DCR</name> + <displayName>DCR</displayName> + <description>DMA control register</description> + <addressOffset>0x48</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>DBL</name> + <description>DMA burst length</description> + <bitOffset>8</bitOffset> + <bitWidth>5</bitWidth> + </field> + <field> + <name>DBA</name> + <description>DMA base address</description> + <bitOffset>0</bitOffset> + <bitWidth>5</bitWidth> + </field> + </fields> + </register> + <register> + <name>DMAR</name> + <displayName>DMAR</displayName> + <description>DMA address for full transfer</description> + <addressOffset>0x4C</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>DMAB</name> + <description>DMA register for burst + accesses</description> + <bitOffset>0</bitOffset> + <bitWidth>16</bitWidth> + </field> + </fields> + </register> + </registers> + </peripheral> + <peripheral derivedFrom="TIM16"> + <name>TIM17</name> + <baseAddress>0x40014800</baseAddress> + <interrupt> + <name>TIM17</name> + <description>TIM17 global interrupt</description> + <value>22</value> + </interrupt> + </peripheral> + <peripheral> + <name>TSC</name> + <description>Touch sensing controller</description> + <groupName>TSC</groupName> + <baseAddress>0x40024000</baseAddress> + <addressBlock> + <offset>0x0</offset> + <size>0x400</size> + <usage>registers</usage> + </addressBlock> + <interrupt> + <name>TSC</name> + <description>Touch sensing interrupt</description> + <value>8</value> + </interrupt> + <registers> + <register> + <name>CR</name> + <displayName>CR</displayName> + <description>control register</description> + <addressOffset>0x0</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>CTPH</name> + <description>Charge transfer pulse high</description> + <bitOffset>28</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>CTPL</name> + <description>Charge transfer pulse low</description> + <bitOffset>24</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>SSD</name> + <description>Spread spectrum deviation</description> + <bitOffset>17</bitOffset> + <bitWidth>7</bitWidth> + </field> + <field> + <name>SSE</name> + <description>Spread spectrum enable</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SSPSC</name> + <description>Spread spectrum prescaler</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PGPSC</name> + <description>pulse generator prescaler</description> + <bitOffset>12</bitOffset> + <bitWidth>3</bitWidth> + </field> + <field> + <name>MCV</name> + <description>Max count value</description> + <bitOffset>5</bitOffset> + <bitWidth>3</bitWidth> + </field> + <field> + <name>IODEF</name> + <description>I/O Default mode</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SYNCPOL</name> + <description>Synchronization pin + polarity</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>AM</name> + <description>Acquisition mode</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>START</name> + <description>Start a new acquisition</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TSCE</name> + <description>Touch sensing controller + enable</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>IER</name> + <displayName>IER</displayName> + <description>interrupt enable register</description> + <addressOffset>0x4</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>MCEIE</name> + <description>Max count error interrupt + enable</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>EOAIE</name> + <description>End of acquisition interrupt + enable</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>ICR</name> + <displayName>ICR</displayName> + <description>interrupt clear register</description> + <addressOffset>0x8</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>MCEIC</name> + <description>Max count error interrupt + clear</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>EOAIC</name> + <description>End of acquisition interrupt + clear</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>ISR</name> + <displayName>ISR</displayName> + <description>interrupt status register</description> + <addressOffset>0xC</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>MCEF</name> + <description>Max count error flag</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>EOAF</name> + <description>End of acquisition flag</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>IOHCR</name> + <displayName>IOHCR</displayName> + <description>I/O hysteresis control + register</description> + <addressOffset>0x10</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0xFFFFFFFF</resetValue> + <fields> + <field> + <name>G6_IO4</name> + <description>G6_IO4 Schmitt trigger hysteresis + mode</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G6_IO3</name> + <description>G6_IO3 Schmitt trigger hysteresis + mode</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G6_IO2</name> + <description>G6_IO2 Schmitt trigger hysteresis + mode</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G6_IO1</name> + <description>G6_IO1 Schmitt trigger hysteresis + mode</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G5_IO4</name> + <description>G5_IO4 Schmitt trigger hysteresis + mode</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G5_IO3</name> + <description>G5_IO3 Schmitt trigger hysteresis + mode</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G5_IO2</name> + <description>G5_IO2 Schmitt trigger hysteresis + mode</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G5_IO1</name> + <description>G5_IO1 Schmitt trigger hysteresis + mode</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G4_IO4</name> + <description>G4_IO4 Schmitt trigger hysteresis + mode</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G4_IO3</name> + <description>G4_IO3 Schmitt trigger hysteresis + mode</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G4_IO2</name> + <description>G4_IO2 Schmitt trigger hysteresis + mode</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G4_IO1</name> + <description>G4_IO1 Schmitt trigger hysteresis + mode</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G3_IO4</name> + <description>G3_IO4 Schmitt trigger hysteresis + mode</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G3_IO3</name> + <description>G3_IO3 Schmitt trigger hysteresis + mode</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G3_IO2</name> + <description>G3_IO2 Schmitt trigger hysteresis + mode</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G3_IO1</name> + <description>G3_IO1 Schmitt trigger hysteresis + mode</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G2_IO4</name> + <description>G2_IO4 Schmitt trigger hysteresis + mode</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G2_IO3</name> + <description>G2_IO3 Schmitt trigger hysteresis + mode</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G2_IO2</name> + <description>G2_IO2 Schmitt trigger hysteresis + mode</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G2_IO1</name> + <description>G2_IO1 Schmitt trigger hysteresis + mode</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G1_IO4</name> + <description>G1_IO4 Schmitt trigger hysteresis + mode</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G1_IO3</name> + <description>G1_IO3 Schmitt trigger hysteresis + mode</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G1_IO2</name> + <description>G1_IO2 Schmitt trigger hysteresis + mode</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G1_IO1</name> + <description>G1_IO1 Schmitt trigger hysteresis + mode</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>IOASCR</name> + <displayName>IOASCR</displayName> + <description>I/O analog switch control + register</description> + <addressOffset>0x18</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>G6_IO4</name> + <description>G6_IO4 analog switch + enable</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G6_IO3</name> + <description>G6_IO3 analog switch + enable</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G6_IO2</name> + <description>G6_IO2 analog switch + enable</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G6_IO1</name> + <description>G6_IO1 analog switch + enable</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G5_IO4</name> + <description>G5_IO4 analog switch + enable</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G5_IO3</name> + <description>G5_IO3 analog switch + enable</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G5_IO2</name> + <description>G5_IO2 analog switch + enable</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G5_IO1</name> + <description>G5_IO1 analog switch + enable</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G4_IO4</name> + <description>G4_IO4 analog switch + enable</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G4_IO3</name> + <description>G4_IO3 analog switch + enable</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G4_IO2</name> + <description>G4_IO2 analog switch + enable</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G4_IO1</name> + <description>G4_IO1 analog switch + enable</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G3_IO4</name> + <description>G3_IO4 analog switch + enable</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G3_IO3</name> + <description>G3_IO3 analog switch + enable</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G3_IO2</name> + <description>G3_IO2 analog switch + enable</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G3_IO1</name> + <description>G3_IO1 analog switch + enable</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G2_IO4</name> + <description>G2_IO4 analog switch + enable</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G2_IO3</name> + <description>G2_IO3 analog switch + enable</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G2_IO2</name> + <description>G2_IO2 analog switch + enable</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G2_IO1</name> + <description>G2_IO1 analog switch + enable</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G1_IO4</name> + <description>G1_IO4 analog switch + enable</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G1_IO3</name> + <description>G1_IO3 analog switch + enable</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G1_IO2</name> + <description>G1_IO2 analog switch + enable</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G1_IO1</name> + <description>G1_IO1 analog switch + enable</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>IOSCR</name> + <displayName>IOSCR</displayName> + <description>I/O sampling control register</description> + <addressOffset>0x20</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>G6_IO4</name> + <description>G6_IO4 sampling mode</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G6_IO3</name> + <description>G6_IO3 sampling mode</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G6_IO2</name> + <description>G6_IO2 sampling mode</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G6_IO1</name> + <description>G6_IO1 sampling mode</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G5_IO4</name> + <description>G5_IO4 sampling mode</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G5_IO3</name> + <description>G5_IO3 sampling mode</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G5_IO2</name> + <description>G5_IO2 sampling mode</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G5_IO1</name> + <description>G5_IO1 sampling mode</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G4_IO4</name> + <description>G4_IO4 sampling mode</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G4_IO3</name> + <description>G4_IO3 sampling mode</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G4_IO2</name> + <description>G4_IO2 sampling mode</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G4_IO1</name> + <description>G4_IO1 sampling mode</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G3_IO4</name> + <description>G3_IO4 sampling mode</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G3_IO3</name> + <description>G3_IO3 sampling mode</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G3_IO2</name> + <description>G3_IO2 sampling mode</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G3_IO1</name> + <description>G3_IO1 sampling mode</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G2_IO4</name> + <description>G2_IO4 sampling mode</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G2_IO3</name> + <description>G2_IO3 sampling mode</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G2_IO2</name> + <description>G2_IO2 sampling mode</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G2_IO1</name> + <description>G2_IO1 sampling mode</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G1_IO4</name> + <description>G1_IO4 sampling mode</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G1_IO3</name> + <description>G1_IO3 sampling mode</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G1_IO2</name> + <description>G1_IO2 sampling mode</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G1_IO1</name> + <description>G1_IO1 sampling mode</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>IOCCR</name> + <displayName>IOCCR</displayName> + <description>I/O channel control register</description> + <addressOffset>0x28</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>G6_IO4</name> + <description>G6_IO4 channel mode</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G6_IO3</name> + <description>G6_IO3 channel mode</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G6_IO2</name> + <description>G6_IO2 channel mode</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G6_IO1</name> + <description>G6_IO1 channel mode</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G5_IO4</name> + <description>G5_IO4 channel mode</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G5_IO3</name> + <description>G5_IO3 channel mode</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G5_IO2</name> + <description>G5_IO2 channel mode</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G5_IO1</name> + <description>G5_IO1 channel mode</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G4_IO4</name> + <description>G4_IO4 channel mode</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G4_IO3</name> + <description>G4_IO3 channel mode</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G4_IO2</name> + <description>G4_IO2 channel mode</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G4_IO1</name> + <description>G4_IO1 channel mode</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G3_IO4</name> + <description>G3_IO4 channel mode</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G3_IO3</name> + <description>G3_IO3 channel mode</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G3_IO2</name> + <description>G3_IO2 channel mode</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G3_IO1</name> + <description>G3_IO1 channel mode</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G2_IO4</name> + <description>G2_IO4 channel mode</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G2_IO3</name> + <description>G2_IO3 channel mode</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G2_IO2</name> + <description>G2_IO2 channel mode</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G2_IO1</name> + <description>G2_IO1 channel mode</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G1_IO4</name> + <description>G1_IO4 channel mode</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G1_IO3</name> + <description>G1_IO3 channel mode</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G1_IO2</name> + <description>G1_IO2 channel mode</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>G1_IO1</name> + <description>G1_IO1 channel mode</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>IOGCSR</name> + <displayName>IOGCSR</displayName> + <description>I/O group control status + register</description> + <addressOffset>0x30</addressOffset> + <size>0x20</size> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>G8S</name> + <description>Analog I/O group x status</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>G7S</name> + <description>Analog I/O group x status</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>G6S</name> + <description>Analog I/O group x status</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>G5S</name> + <description>Analog I/O group x status</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>G4S</name> + <description>Analog I/O group x status</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>G3S</name> + <description>Analog I/O group x status</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>G2S</name> + <description>Analog I/O group x status</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>G1S</name> + <description>Analog I/O group x status</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>G8E</name> + <description>Analog I/O group x enable</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>G7E</name> + <description>Analog I/O group x enable</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>G6E</name> + <description>Analog I/O group x enable</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>G5E</name> + <description>Analog I/O group x enable</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>G4E</name> + <description>Analog I/O group x enable</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>G3E</name> + <description>Analog I/O group x enable</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>G2E</name> + <description>Analog I/O group x enable</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>G1E</name> + <description>Analog I/O group x enable</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + </fields> + </register> + <register> + <name>IOG1CR</name> + <displayName>IOG1CR</displayName> + <description>I/O group x counter register</description> + <addressOffset>0x34</addressOffset> + <size>0x20</size> + <access>read-only</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>CNT</name> + <description>Counter value</description> + <bitOffset>0</bitOffset> + <bitWidth>14</bitWidth> + </field> + </fields> + </register> + <register> + <name>IOG2CR</name> + <displayName>IOG2CR</displayName> + <description>I/O group x counter register</description> + <addressOffset>0x38</addressOffset> + <size>0x20</size> + <access>read-only</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>CNT</name> + <description>Counter value</description> + <bitOffset>0</bitOffset> + <bitWidth>14</bitWidth> + </field> + </fields> + </register> + <register> + <name>IOG3CR</name> + <displayName>IOG3CR</displayName> + <description>I/O group x counter register</description> + <addressOffset>0x3C</addressOffset> + <size>0x20</size> + <access>read-only</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>CNT</name> + <description>Counter value</description> + <bitOffset>0</bitOffset> + <bitWidth>14</bitWidth> + </field> + </fields> + </register> + <register> + <name>IOG4CR</name> + <displayName>IOG4CR</displayName> + <description>I/O group x counter register</description> + <addressOffset>0x40</addressOffset> + <size>0x20</size> + <access>read-only</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>CNT</name> + <description>Counter value</description> + <bitOffset>0</bitOffset> + <bitWidth>14</bitWidth> + </field> + </fields> + </register> + <register> + <name>IOG5CR</name> + <displayName>IOG5CR</displayName> + <description>I/O group x counter register</description> + <addressOffset>0x44</addressOffset> + <size>0x20</size> + <access>read-only</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>CNT</name> + <description>Counter value</description> + <bitOffset>0</bitOffset> + <bitWidth>14</bitWidth> + </field> + </fields> + </register> + <register> + <name>IOG6CR</name> + <displayName>IOG6CR</displayName> + <description>I/O group x counter register</description> + <addressOffset>0x48</addressOffset> + <size>0x20</size> + <access>read-only</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>CNT</name> + <description>Counter value</description> + <bitOffset>0</bitOffset> + <bitWidth>14</bitWidth> + </field> + </fields> + </register> + </registers> + </peripheral> + <peripheral> + <name>CEC</name> + <description>HDMI-CEC controller</description> + <groupName>CEC</groupName> + <baseAddress>0x40007800</baseAddress> + <addressBlock> + <offset>0x0</offset> + <size>0x400</size> + <usage>registers</usage> + </addressBlock> + <interrupt> + <name>CEC_CAN</name> + <description>CEC and CAN global interrupt</description> + <value>30</value> + </interrupt> + <registers> + <register> + <name>CR</name> + <displayName>CR</displayName> + <description>control register</description> + <addressOffset>0x0</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>TXEOM</name> + <description>Tx End Of Message</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TXSOM</name> + <description>Tx start of message</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CECEN</name> + <description>CEC Enable</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>CFGR</name> + <displayName>CFGR</displayName> + <description>configuration register</description> + <addressOffset>0x4</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>LBPEGEN</name> + <description>Generate Error-Bit on Long Bit Period + Error</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BREGEN</name> + <description>Generate error-bit on bit rising + error</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BRESTP</name> + <description>Rx-stop on bit rising + error</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>RXTOL</name> + <description>Rx-Tolerance</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SFT</name> + <description>Signal Free Time</description> + <bitOffset>5</bitOffset> + <bitWidth>3</bitWidth> + </field> + <field> + <name>LSTN</name> + <description>Listen mode</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OAR</name> + <description>Own Address</description> + <bitOffset>0</bitOffset> + <bitWidth>4</bitWidth> + </field> + </fields> + </register> + <register> + <name>TXDR</name> + <displayName>TXDR</displayName> + <description>Tx data register</description> + <addressOffset>0x8</addressOffset> + <size>0x20</size> + <access>write-only</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>TXD</name> + <description>Tx Data register</description> + <bitOffset>0</bitOffset> + <bitWidth>8</bitWidth> + </field> + </fields> + </register> + <register> + <name>RXDR</name> + <displayName>RXDR</displayName> + <description>Rx Data Register</description> + <addressOffset>0xC</addressOffset> + <size>0x20</size> + <access>read-only</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>RXDR</name> + <description>CEC Rx Data Register</description> + <bitOffset>0</bitOffset> + <bitWidth>8</bitWidth> + </field> + </fields> + </register> + <register> + <name>ISR</name> + <displayName>ISR</displayName> + <description>Interrupt and Status Register</description> + <addressOffset>0x10</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>TXACKE</name> + <description>Tx-Missing acknowledge + error</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TXERR</name> + <description>Tx-Error</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TXUDR</name> + <description>Tx-Buffer Underrun</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TXEND</name> + <description>End of Transmission</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TXBR</name> + <description>Tx-Byte Request</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ARBLST</name> + <description>Arbitration Lost</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>RXACKE</name> + <description>Rx-Missing Acknowledge</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>LBPE</name> + <description>Rx-Long Bit Period Error</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SBPE</name> + <description>Rx-Short Bit period error</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BRE</name> + <description>Rx-Bit rising error</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>RXOVR</name> + <description>Rx-Overrun</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>RXEND</name> + <description>End Of Reception</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>RXBR</name> + <description>Rx-Byte Received</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>IER</name> + <displayName>IER</displayName> + <description>interrupt enable register</description> + <addressOffset>0x14</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>TXACKIE</name> + <description>Tx-Missing Acknowledge Error Interrupt + Enable</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TXERRIE</name> + <description>Tx-Error Interrupt Enable</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TXUDRIE</name> + <description>Tx-Underrun interrupt + enable</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TXENDIE</name> + <description>Tx-End of message interrupt + enable</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TXBRIE</name> + <description>Tx-Byte Request Interrupt + Enable</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ARBLSTIE</name> + <description>Arbitration Lost Interrupt + Enable</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>RXACKIE</name> + <description>Rx-Missing Acknowledge Error Interrupt + Enable</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>LBPEIE</name> + <description>Long Bit Period Error Interrupt + Enable</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SBPEIE</name> + <description>Short Bit Period Error Interrupt + Enable</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BREIE</name> + <description>Bit Rising Error Interrupt + Enable</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>RXOVRIE</name> + <description>Rx-Buffer Overrun Interrupt + Enable</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>RXENDIE</name> + <description>End Of Reception Interrupt + Enable</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>RXBRIE</name> + <description>Rx-Byte Received Interrupt + Enable</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + </registers> + </peripheral> + <peripheral> + <name>Flash</name> + <description>Flash</description> + <groupName>Flash</groupName> + <baseAddress>0x40022000</baseAddress> + <addressBlock> + <offset>0x0</offset> + <size>0x400</size> + <usage>registers</usage> + </addressBlock> + <interrupt> + <name>FLASH</name> + <description>Flash global interrupt</description> + <value>3</value> + </interrupt> + <registers> + <register> + <name>ACR</name> + <displayName>ACR</displayName> + <description>Flash access control register</description> + <addressOffset>0x0</addressOffset> + <size>0x20</size> + <resetValue>0x00000030</resetValue> + <fields> + <field> + <name>LATENCY</name> + <description>LATENCY</description> + <bitOffset>0</bitOffset> + <bitWidth>3</bitWidth> + <access>read-write</access> + </field> + <field> + <name>PRFTBE</name> + <description>PRFTBE</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>PRFTBS</name> + <description>PRFTBS</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + </fields> + </register> + <register> + <name>KEYR</name> + <displayName>KEYR</displayName> + <description>Flash key register</description> + <addressOffset>0x4</addressOffset> + <size>0x20</size> + <access>write-only</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FKEYR</name> + <description>Flash Key</description> + <bitOffset>0</bitOffset> + <bitWidth>32</bitWidth> + </field> + </fields> + </register> + <register> + <name>OPTKEYR</name> + <displayName>OPTKEYR</displayName> + <description>Flash option key register</description> + <addressOffset>0x8</addressOffset> + <size>0x20</size> + <access>write-only</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>OPTKEYR</name> + <description>Option byte key</description> + <bitOffset>0</bitOffset> + <bitWidth>32</bitWidth> + </field> + </fields> + </register> + <register> + <name>SR</name> + <displayName>SR</displayName> + <description>Flash status register</description> + <addressOffset>0xC</addressOffset> + <size>0x20</size> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>EOP</name> + <description>End of operation</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>WRPRT</name> + <description>Write protection error</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>PGERR</name> + <description>Programming error</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>BSY</name> + <description>Busy</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + </fields> + </register> + <register> + <name>CR</name> + <displayName>CR</displayName> + <description>Flash control register</description> + <addressOffset>0x10</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000080</resetValue> + <fields> + <field> + <name>FORCE_OPTLOAD</name> + <description>Force option byte loading</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>EOPIE</name> + <description>End of operation interrupt + enable</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ERRIE</name> + <description>Error interrupt enable</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OPTWRE</name> + <description>Option bytes write enable</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>LOCK</name> + <description>Lock</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>STRT</name> + <description>Start</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OPTER</name> + <description>Option byte erase</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>OPTPG</name> + <description>Option byte programming</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>MER</name> + <description>Mass erase</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PER</name> + <description>Page erase</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PG</name> + <description>Programming</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>AR</name> + <displayName>AR</displayName> + <description>Flash address register</description> + <addressOffset>0x14</addressOffset> + <size>0x20</size> + <access>write-only</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FAR</name> + <description>Flash address</description> + <bitOffset>0</bitOffset> + <bitWidth>32</bitWidth> + </field> + </fields> + </register> + <register> + <name>OBR</name> + <displayName>OBR</displayName> + <description>Option byte register</description> + <addressOffset>0x1C</addressOffset> + <size>0x20</size> + <access>read-only</access> + <resetValue>0x03FFFFF2</resetValue> + <fields> + <field> + <name>OPTERR</name> + <description>Option byte error</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>RDPRT</name> + <description>Read protection level + status</description> + <bitOffset>1</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>WDG_SW</name> + <description>WDG_SW</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>nRST_STOP</name> + <description>nRST_STOP</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>nRST_STDBY</name> + <description>nRST_STDBY</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>nBOOT0</name> + <description>nBOOT0</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>nBOOT1</name> + <description>BOOT1</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>VDDA_MONITOR</name> + <description>VDDA_MONITOR</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>RAM_PARITY_CHECK</name> + <description>RAM_PARITY_CHECK</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BOOT_SEL</name> + <description>BOOT_SEL</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>Data0</name> + <description>Data0</description> + <bitOffset>16</bitOffset> + <bitWidth>8</bitWidth> + </field> + <field> + <name>Data1</name> + <description>Data1</description> + <bitOffset>24</bitOffset> + <bitWidth>8</bitWidth> + </field> + </fields> + </register> + <register> + <name>WRPR</name> + <displayName>WRPR</displayName> + <description>Write protection register</description> + <addressOffset>0x20</addressOffset> + <size>0x20</size> + <access>read-only</access> + <resetValue>0xFFFFFFFF</resetValue> + <fields> + <field> + <name>WRP</name> + <description>Write protect</description> + <bitOffset>0</bitOffset> + <bitWidth>32</bitWidth> + </field> + </fields> + </register> + </registers> + </peripheral> + <peripheral> + <name>DBGMCU</name> + <description>Debug support</description> + <groupName>DBGMCU</groupName> + <baseAddress>0x40015800</baseAddress> + <addressBlock> + <offset>0x0</offset> + <size>0x400</size> + <usage>registers</usage> + </addressBlock> + <registers> + <register> + <name>IDCODE</name> + <displayName>IDCODE</displayName> + <description>MCU Device ID Code Register</description> + <addressOffset>0x0</addressOffset> + <size>0x20</size> + <access>read-only</access> + <resetValue>0x0</resetValue> + <fields> + <field> + <name>DEV_ID</name> + <description>Device Identifier</description> + <bitOffset>0</bitOffset> + <bitWidth>12</bitWidth> + </field> + <field> + <name>DIV_ID</name> + <description>Division Identifier</description> + <bitOffset>12</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>REV_ID</name> + <description>Revision Identifier</description> + <bitOffset>16</bitOffset> + <bitWidth>16</bitWidth> + </field> + </fields> + </register> + <register> + <name>CR</name> + <displayName>CR</displayName> + <description>Debug MCU Configuration + Register</description> + <addressOffset>0x4</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0</resetValue> + <fields> + <field> + <name>DBG_STOP</name> + <description>Debug Stop Mode</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>DBG_STANDBY</name> + <description>Debug Standby Mode</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>APB1_FZ</name> + <displayName>APB1_FZ</displayName> + <description>Debug MCU APB1 freeze register</description> + <addressOffset>0x8</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0</resetValue> + <fields> + <field> + <name>DBG_TIM2_STOP</name> + <description>TIM2 counter stopped when core is + halted</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>DBG_TIM3_STOP</name> + <description>TIM3 counter stopped when core is + halted</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>DBG_TIM6_STOP</name> + <description>TIM6 counter stopped when core is + halted</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>DBG_TIM7_STOP</name> + <description>TIM7 counter stopped when core is + halted</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>DBG_TIM14_STOP</name> + <description>TIM14 counter stopped when core is + halted</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>DBG_RTC_STOP</name> + <description>Debug RTC stopped when core is + halted</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>DBG_WWDG_STOP</name> + <description>Debug window watchdog stopped when core + is halted</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>DBG_IWDG_STOP</name> + <description>Debug independent watchdog stopped when + core is halted</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>DBG_I2C1_SMBUS_TIMEOUT</name> + <description>SMBUS timeout mode stopped when core is + halted</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>DBG_CAN_STOP</name> + <description>CAN stopped when core is + halted</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>APB2_FZ</name> + <displayName>APB2_FZ</displayName> + <description>Debug MCU APB2 freeze register</description> + <addressOffset>0xC</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0</resetValue> + <fields> + <field> + <name>DBG_TIM1_STOP</name> + <description>TIM1 counter stopped when core is + halted</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>DBG_TIM15_STOP</name> + <description>TIM15 counter stopped when core is + halted</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>DBG_TIM16_STOP</name> + <description>TIM16 counter stopped when core is + halted</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>DBG_TIM17_STOP</name> + <description>TIM17 counter stopped when core is + halted</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + </registers> + </peripheral> + <peripheral> + <name>USB</name> + <description>Universal serial bus full-speed device + interface</description> + <groupName>USB</groupName> + <baseAddress>0x40005C00</baseAddress> + <addressBlock> + <offset>0x0</offset> + <size>0x400</size> + <usage>registers</usage> + </addressBlock> + <interrupt> + <name>USB</name> + <description>USB global interrupt</description> + <value>31</value> + </interrupt> + <registers> + <register> + <name>EP0R</name> + <displayName>EP0R</displayName> + <description>endpoint 0 register</description> + <addressOffset>0x0</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>EA</name> + <description>Endpoint address</description> + <bitOffset>0</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>STAT_TX</name> + <description>Status bits, for transmission + transfers</description> + <bitOffset>4</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>DTOG_TX</name> + <description>Data Toggle, for transmission + transfers</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CTR_TX</name> + <description>Correct Transfer for + transmission</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>EP_KIND</name> + <description>Endpoint kind</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>EP_TYPE</name> + <description>Endpoint type</description> + <bitOffset>9</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>SETUP</name> + <description>Setup transaction + completed</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>STAT_RX</name> + <description>Status bits, for reception + transfers</description> + <bitOffset>12</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>DTOG_RX</name> + <description>Data Toggle, for reception + transfers</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CTR_RX</name> + <description>Correct transfer for + reception</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>EP1R</name> + <displayName>EP1R</displayName> + <description>endpoint 1 register</description> + <addressOffset>0x4</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>EA</name> + <description>Endpoint address</description> + <bitOffset>0</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>STAT_TX</name> + <description>Status bits, for transmission + transfers</description> + <bitOffset>4</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>DTOG_TX</name> + <description>Data Toggle, for transmission + transfers</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CTR_TX</name> + <description>Correct Transfer for + transmission</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>EP_KIND</name> + <description>Endpoint kind</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>EP_TYPE</name> + <description>Endpoint type</description> + <bitOffset>9</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>SETUP</name> + <description>Setup transaction + completed</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>STAT_RX</name> + <description>Status bits, for reception + transfers</description> + <bitOffset>12</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>DTOG_RX</name> + <description>Data Toggle, for reception + transfers</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CTR_RX</name> + <description>Correct transfer for + reception</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>EP2R</name> + <displayName>EP2R</displayName> + <description>endpoint 2 register</description> + <addressOffset>0x8</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>EA</name> + <description>Endpoint address</description> + <bitOffset>0</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>STAT_TX</name> + <description>Status bits, for transmission + transfers</description> + <bitOffset>4</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>DTOG_TX</name> + <description>Data Toggle, for transmission + transfers</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CTR_TX</name> + <description>Correct Transfer for + transmission</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>EP_KIND</name> + <description>Endpoint kind</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>EP_TYPE</name> + <description>Endpoint type</description> + <bitOffset>9</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>SETUP</name> + <description>Setup transaction + completed</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>STAT_RX</name> + <description>Status bits, for reception + transfers</description> + <bitOffset>12</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>DTOG_RX</name> + <description>Data Toggle, for reception + transfers</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CTR_RX</name> + <description>Correct transfer for + reception</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>EP3R</name> + <displayName>EP3R</displayName> + <description>endpoint 3 register</description> + <addressOffset>0xC</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>EA</name> + <description>Endpoint address</description> + <bitOffset>0</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>STAT_TX</name> + <description>Status bits, for transmission + transfers</description> + <bitOffset>4</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>DTOG_TX</name> + <description>Data Toggle, for transmission + transfers</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CTR_TX</name> + <description>Correct Transfer for + transmission</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>EP_KIND</name> + <description>Endpoint kind</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>EP_TYPE</name> + <description>Endpoint type</description> + <bitOffset>9</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>SETUP</name> + <description>Setup transaction + completed</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>STAT_RX</name> + <description>Status bits, for reception + transfers</description> + <bitOffset>12</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>DTOG_RX</name> + <description>Data Toggle, for reception + transfers</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CTR_RX</name> + <description>Correct transfer for + reception</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>EP4R</name> + <displayName>EP4R</displayName> + <description>endpoint 4 register</description> + <addressOffset>0x10</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>EA</name> + <description>Endpoint address</description> + <bitOffset>0</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>STAT_TX</name> + <description>Status bits, for transmission + transfers</description> + <bitOffset>4</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>DTOG_TX</name> + <description>Data Toggle, for transmission + transfers</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CTR_TX</name> + <description>Correct Transfer for + transmission</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>EP_KIND</name> + <description>Endpoint kind</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>EP_TYPE</name> + <description>Endpoint type</description> + <bitOffset>9</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>SETUP</name> + <description>Setup transaction + completed</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>STAT_RX</name> + <description>Status bits, for reception + transfers</description> + <bitOffset>12</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>DTOG_RX</name> + <description>Data Toggle, for reception + transfers</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CTR_RX</name> + <description>Correct transfer for + reception</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>EP5R</name> + <displayName>EP5R</displayName> + <description>endpoint 5 register</description> + <addressOffset>0x14</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>EA</name> + <description>Endpoint address</description> + <bitOffset>0</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>STAT_TX</name> + <description>Status bits, for transmission + transfers</description> + <bitOffset>4</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>DTOG_TX</name> + <description>Data Toggle, for transmission + transfers</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CTR_TX</name> + <description>Correct Transfer for + transmission</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>EP_KIND</name> + <description>Endpoint kind</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>EP_TYPE</name> + <description>Endpoint type</description> + <bitOffset>9</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>SETUP</name> + <description>Setup transaction + completed</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>STAT_RX</name> + <description>Status bits, for reception + transfers</description> + <bitOffset>12</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>DTOG_RX</name> + <description>Data Toggle, for reception + transfers</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CTR_RX</name> + <description>Correct transfer for + reception</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>EP6R</name> + <displayName>EP6R</displayName> + <description>endpoint 6 register</description> + <addressOffset>0x18</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>EA</name> + <description>Endpoint address</description> + <bitOffset>0</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>STAT_TX</name> + <description>Status bits, for transmission + transfers</description> + <bitOffset>4</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>DTOG_TX</name> + <description>Data Toggle, for transmission + transfers</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CTR_TX</name> + <description>Correct Transfer for + transmission</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>EP_KIND</name> + <description>Endpoint kind</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>EP_TYPE</name> + <description>Endpoint type</description> + <bitOffset>9</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>SETUP</name> + <description>Setup transaction + completed</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>STAT_RX</name> + <description>Status bits, for reception + transfers</description> + <bitOffset>12</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>DTOG_RX</name> + <description>Data Toggle, for reception + transfers</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CTR_RX</name> + <description>Correct transfer for + reception</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>EP7R</name> + <displayName>EP7R</displayName> + <description>endpoint 7 register</description> + <addressOffset>0x1C</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>EA</name> + <description>Endpoint address</description> + <bitOffset>0</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>STAT_TX</name> + <description>Status bits, for transmission + transfers</description> + <bitOffset>4</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>DTOG_TX</name> + <description>Data Toggle, for transmission + transfers</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CTR_TX</name> + <description>Correct Transfer for + transmission</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>EP_KIND</name> + <description>Endpoint kind</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>EP_TYPE</name> + <description>Endpoint type</description> + <bitOffset>9</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>SETUP</name> + <description>Setup transaction + completed</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>STAT_RX</name> + <description>Status bits, for reception + transfers</description> + <bitOffset>12</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>DTOG_RX</name> + <description>Data Toggle, for reception + transfers</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CTR_RX</name> + <description>Correct transfer for + reception</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>CNTR</name> + <displayName>CNTR</displayName> + <description>control register</description> + <addressOffset>0x40</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000003</resetValue> + <fields> + <field> + <name>FRES</name> + <description>Force USB Reset</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PDWN</name> + <description>Power down</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>LPMODE</name> + <description>Low-power mode</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FSUSP</name> + <description>Force suspend</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>RESUME</name> + <description>Resume request</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>L1RESUME</name> + <description>LPM L1 Resume request</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>L1REQM</name> + <description>LPM L1 state request interrupt + mask</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ESOFM</name> + <description>Expected start of frame interrupt + mask</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SOFM</name> + <description>Start of frame interrupt + mask</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>RESETM</name> + <description>USB reset interrupt mask</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SUSPM</name> + <description>Suspend mode interrupt + mask</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>WKUPM</name> + <description>Wakeup interrupt mask</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ERRM</name> + <description>Error interrupt mask</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PMAOVRM</name> + <description>Packet memory area over / underrun + interrupt mask</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CTRM</name> + <description>Correct transfer interrupt + mask</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>ISTR</name> + <displayName>ISTR</displayName> + <description>interrupt status register</description> + <addressOffset>0x44</addressOffset> + <size>0x20</size> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>EP_ID</name> + <description>Endpoint Identifier</description> + <bitOffset>0</bitOffset> + <bitWidth>4</bitWidth> + <access>read-only</access> + </field> + <field> + <name>DIR</name> + <description>Direction of transaction</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>L1REQ</name> + <description>LPM L1 state request</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>ESOF</name> + <description>Expected start frame</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>SOF</name> + <description>start of frame</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>RESET</name> + <description>reset request</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>SUSP</name> + <description>Suspend mode request</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>WKUP</name> + <description>Wakeup</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>ERR</name> + <description>Error</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>PMAOVR</name> + <description>Packet memory area over / + underrun</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>CTR</name> + <description>Correct transfer</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + </fields> + </register> + <register> + <name>FNR</name> + <displayName>FNR</displayName> + <description>frame number register</description> + <addressOffset>0x48</addressOffset> + <size>0x20</size> + <access>read-only</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>FN</name> + <description>Frame number</description> + <bitOffset>0</bitOffset> + <bitWidth>11</bitWidth> + </field> + <field> + <name>LSOF</name> + <description>Lost SOF</description> + <bitOffset>11</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>LCK</name> + <description>Locked</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>RXDM</name> + <description>Receive data - line status</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>RXDP</name> + <description>Receive data + line status</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>DADDR</name> + <displayName>DADDR</displayName> + <description>device address</description> + <addressOffset>0x4C</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>ADD</name> + <description>Device address</description> + <bitOffset>0</bitOffset> + <bitWidth>7</bitWidth> + </field> + <field> + <name>EF</name> + <description>Enable function</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>BTABLE</name> + <displayName>BTABLE</displayName> + <description>Buffer table address</description> + <addressOffset>0x50</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>BTABLE</name> + <description>Buffer table</description> + <bitOffset>3</bitOffset> + <bitWidth>13</bitWidth> + </field> + </fields> + </register> + <register> + <name>LPMCSR</name> + <displayName>LPMCSR</displayName> + <description>LPM control and status + register</description> + <addressOffset>0x54</addressOffset> + <size>0x20</size> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>LPMEN</name> + <description>LPM support enable</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>LPMACK</name> + <description>LPM Token acknowledge + enable</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>REMWAKE</name> + <description>bRemoteWake value</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>BESL</name> + <description>BESL value</description> + <bitOffset>4</bitOffset> + <bitWidth>4</bitWidth> + <access>read-only</access> + </field> + </fields> + </register> + <register> + <name>BCDR</name> + <displayName>BCDR</displayName> + <description>Battery charging detector</description> + <addressOffset>0x58</addressOffset> + <size>0x20</size> + <resetValue>0x0000</resetValue> + <fields> + <field> + <name>BCDEN</name> + <description>Battery charging detector (BCD) + enable</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>DCDEN</name> + <description>Data contact detection (DCD) mode + enable</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>PDEN</name> + <description>Primary detection (PD) mode + enable</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>SDEN</name> + <description>Secondary detection (SD) mode + enable</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>DCDET</name> + <description>Data contact detection (DCD) + status</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>PDET</name> + <description>Primary detection (PD) + status</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>SDET</name> + <description>Secondary detection (SD) + status</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>PS2DET</name> + <description>DM pull-up detection + status</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>DPPU</name> + <description>DP pull-up control</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + </fields> + </register> + </registers> + </peripheral> + <peripheral> + <name>CRS</name> + <description>Clock recovery system</description> + <groupName>CRS</groupName> + <baseAddress>0x40006C00</baseAddress> + <addressBlock> + <offset>0x0</offset> + <size>0x400</size> + <usage>registers</usage> + </addressBlock> + <registers> + <register> + <name>CR</name> + <displayName>CR</displayName> + <description>control register</description> + <addressOffset>0x0</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00002000</resetValue> + <fields> + <field> + <name>TRIM</name> + <description>HSI48 oscillator smooth + trimming</description> + <bitOffset>8</bitOffset> + <bitWidth>6</bitWidth> + </field> + <field> + <name>SWSYNC</name> + <description>Generate software SYNC + event</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>AUTOTRIMEN</name> + <description>Automatic trimming enable</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CEN</name> + <description>Frequency error counter + enable</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ESYNCIE</name> + <description>Expected SYNC interrupt + enable</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ERRIE</name> + <description>Synchronization or trimming error + interrupt enable</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SYNCWARNIE</name> + <description>SYNC warning interrupt + enable</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SYNCOKIE</name> + <description>SYNC event OK interrupt + enable</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>CFGR</name> + <displayName>CFGR</displayName> + <description>configuration register</description> + <addressOffset>0x4</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x2022BB7F</resetValue> + <fields> + <field> + <name>SYNCPOL</name> + <description>SYNC polarity selection</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SYNCSRC</name> + <description>SYNC signal source + selection</description> + <bitOffset>28</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>SYNCDIV</name> + <description>SYNC divider</description> + <bitOffset>24</bitOffset> + <bitWidth>3</bitWidth> + </field> + <field> + <name>FELIM</name> + <description>Frequency error limit</description> + <bitOffset>16</bitOffset> + <bitWidth>8</bitWidth> + </field> + <field> + <name>RELOAD</name> + <description>Counter reload value</description> + <bitOffset>0</bitOffset> + <bitWidth>16</bitWidth> + </field> + </fields> + </register> + <register> + <name>ISR</name> + <displayName>ISR</displayName> + <description>interrupt and status register</description> + <addressOffset>0x8</addressOffset> + <size>0x20</size> + <access>read-only</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FECAP</name> + <description>Frequency error capture</description> + <bitOffset>16</bitOffset> + <bitWidth>16</bitWidth> + </field> + <field> + <name>FEDIR</name> + <description>Frequency error direction</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TRIMOVF</name> + <description>Trimming overflow or + underflow</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SYNCMISS</name> + <description>SYNC missed</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SYNCERR</name> + <description>SYNC error</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ESYNCF</name> + <description>Expected SYNC flag</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ERRF</name> + <description>Error flag</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SYNCWARNF</name> + <description>SYNC warning flag</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SYNCOKF</name> + <description>SYNC event OK flag</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>ICR</name> + <displayName>ICR</displayName> + <description>interrupt flag clear register</description> + <addressOffset>0xC</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>ESYNCC</name> + <description>Expected SYNC clear flag</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ERRC</name> + <description>Error clear flag</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SYNCWARNC</name> + <description>SYNC warning clear flag</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SYNCOKC</name> + <description>SYNC event OK clear flag</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + </registers> + </peripheral> + <peripheral> + <name>CAN</name> + <description>Controller area network</description> + <groupName>CAN</groupName> + <baseAddress>0x40006400</baseAddress> + <addressBlock> + <offset>0x0</offset> + <size>0x400</size> + <usage>registers</usage> + </addressBlock> + <registers> + <register> + <name>CAN_MCR</name> + <displayName>CAN_MCR</displayName> + <description>CAN_MCR</description> + <addressOffset>0x0</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>DBF</name> + <description>DBF</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>RESET</name> + <description>RESET</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TTCM</name> + <description>TTCM</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ABOM</name> + <description>ABOM</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>AWUM</name> + <description>AWUM</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>NART</name> + <description>NART</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>RFLM</name> + <description>RFLM</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TXFP</name> + <description>TXFP</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SLEEP</name> + <description>SLEEP</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>INRQ</name> + <description>INRQ</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>CAN_MSR</name> + <displayName>CAN_MSR</displayName> + <description>CAN_MSR</description> + <addressOffset>0x4</addressOffset> + <size>0x20</size> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>RX</name> + <description>RX</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>SAMP</name> + <description>SAMP</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>RXM</name> + <description>RXM</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>TXM</name> + <description>TXM</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>SLAKI</name> + <description>SLAKI</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>WKUI</name> + <description>WKUI</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>ERRI</name> + <description>ERRI</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>SLAK</name> + <description>SLAK</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>INAK</name> + <description>INAK</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + </fields> + </register> + <register> + <name>CAN_TSR</name> + <displayName>CAN_TSR</displayName> + <description>CAN_TSR</description> + <addressOffset>0x8</addressOffset> + <size>0x20</size> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>LOW2</name> + <description>Lowest priority flag for mailbox + 2</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>LOW1</name> + <description>Lowest priority flag for mailbox + 1</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>LOW0</name> + <description>Lowest priority flag for mailbox + 0</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>TME2</name> + <description>Lowest priority flag for mailbox + 2</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>TME1</name> + <description>Lowest priority flag for mailbox + 1</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>TME0</name> + <description>Lowest priority flag for mailbox + 0</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>CODE</name> + <description>CODE</description> + <bitOffset>24</bitOffset> + <bitWidth>2</bitWidth> + <access>read-only</access> + </field> + <field> + <name>ABRQ2</name> + <description>ABRQ2</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>TERR2</name> + <description>TERR2</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>ALST2</name> + <description>ALST2</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>TXOK2</name> + <description>TXOK2</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>RQCP2</name> + <description>RQCP2</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>ABRQ1</name> + <description>ABRQ1</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>TERR1</name> + <description>TERR1</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>ALST1</name> + <description>ALST1</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>TXOK1</name> + <description>TXOK1</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>RQCP1</name> + <description>RQCP1</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>ABRQ0</name> + <description>ABRQ0</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>TERR0</name> + <description>TERR0</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>ALST0</name> + <description>ALST0</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>TXOK0</name> + <description>TXOK0</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>RQCP0</name> + <description>RQCP0</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + </fields> + </register> + <register> + <name>CAN_RF0R</name> + <displayName>CAN_RF0R</displayName> + <description>CAN_RF0R</description> + <addressOffset>0xC</addressOffset> + <size>0x20</size> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>RFOM0</name> + <description>RFOM0</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>FOVR0</name> + <description>FOVR0</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>FULL0</name> + <description>FULL0</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>FMP0</name> + <description>FMP0</description> + <bitOffset>0</bitOffset> + <bitWidth>2</bitWidth> + <access>read-only</access> + </field> + </fields> + </register> + <register> + <name>CAN_RF1R</name> + <displayName>CAN_RF1R</displayName> + <description>CAN_RF1R</description> + <addressOffset>0x10</addressOffset> + <size>0x20</size> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>RFOM1</name> + <description>RFOM1</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>FOVR1</name> + <description>FOVR1</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>FULL1</name> + <description>FULL1</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + <access>read-write</access> + </field> + <field> + <name>FMP1</name> + <description>FMP1</description> + <bitOffset>0</bitOffset> + <bitWidth>2</bitWidth> + <access>read-only</access> + </field> + </fields> + </register> + <register> + <name>CAN_IER</name> + <displayName>CAN_IER</displayName> + <description>CAN_IER</description> + <addressOffset>0x14</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>SLKIE</name> + <description>SLKIE</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>WKUIE</name> + <description>WKUIE</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ERRIE</name> + <description>ERRIE</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>LECIE</name> + <description>LECIE</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>BOFIE</name> + <description>BOFIE</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>EPVIE</name> + <description>EPVIE</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>EWGIE</name> + <description>EWGIE</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FOVIE1</name> + <description>FOVIE1</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FFIE1</name> + <description>FFIE1</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FMPIE1</name> + <description>FMPIE1</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FOVIE0</name> + <description>FOVIE0</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FFIE0</name> + <description>FFIE0</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FMPIE0</name> + <description>FMPIE0</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TMEIE</name> + <description>TMEIE</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>CAN_ESR</name> + <displayName>CAN_ESR</displayName> + <description>CAN_ESR</description> + <addressOffset>0x18</addressOffset> + <size>0x20</size> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>REC</name> + <description>REC</description> + <bitOffset>24</bitOffset> + <bitWidth>8</bitWidth> + <access>read-only</access> + </field> + <field> + <name>TEC</name> + <description>TEC</description> + <bitOffset>16</bitOffset> + <bitWidth>8</bitWidth> + <access>read-only</access> + </field> + <field> + <name>LEC</name> + <description>LEC</description> + <bitOffset>4</bitOffset> + <bitWidth>3</bitWidth> + <access>read-write</access> + </field> + <field> + <name>BOFF</name> + <description>BOFF</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>EPVF</name> + <description>EPVF</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + <field> + <name>EWGF</name> + <description>EWGF</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + <access>read-only</access> + </field> + </fields> + </register> + <register> + <name>CAN_BTR</name> + <displayName>CAN_BTR</displayName> + <description>CAN BTR</description> + <addressOffset>0x1C</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>SILM</name> + <description>SILM</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>LBKM</name> + <description>LBKM</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SJW</name> + <description>SJW</description> + <bitOffset>24</bitOffset> + <bitWidth>2</bitWidth> + </field> + <field> + <name>TS2</name> + <description>TS2</description> + <bitOffset>20</bitOffset> + <bitWidth>3</bitWidth> + </field> + <field> + <name>TS1</name> + <description>TS1</description> + <bitOffset>16</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>BRP</name> + <description>BRP</description> + <bitOffset>0</bitOffset> + <bitWidth>10</bitWidth> + </field> + </fields> + </register> + <register> + <name>CAN_TI0R</name> + <displayName>CAN_TI0R</displayName> + <description>CAN_TI0R</description> + <addressOffset>0x180</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>STID</name> + <description>STID</description> + <bitOffset>21</bitOffset> + <bitWidth>11</bitWidth> + </field> + <field> + <name>EXID</name> + <description>EXID</description> + <bitOffset>3</bitOffset> + <bitWidth>18</bitWidth> + </field> + <field> + <name>IDE</name> + <description>IDE</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>RTR</name> + <description>RTR</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TXRQ</name> + <description>TXRQ</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>CAN_TDT0R</name> + <displayName>CAN_TDT0R</displayName> + <description>CAN_TDT0R</description> + <addressOffset>0x184</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>TIME</name> + <description>TIME</description> + <bitOffset>16</bitOffset> + <bitWidth>16</bitWidth> + </field> + <field> + <name>TGT</name> + <description>TGT</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>DLC</name> + <description>DLC</description> + <bitOffset>0</bitOffset> + <bitWidth>4</bitWidth> + </field> + </fields> + </register> + <register> + <name>CAN_TDL0R</name> + <displayName>CAN_TDL0R</displayName> + <description>CAN_TDL0R</description> + <addressOffset>0x188</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>DATA3</name> + <description>DATA3</description> + <bitOffset>24</bitOffset> + <bitWidth>8</bitWidth> + </field> + <field> + <name>DATA2</name> + <description>DATA2</description> + <bitOffset>16</bitOffset> + <bitWidth>8</bitWidth> + </field> + <field> + <name>DATA1</name> + <description>DATA1</description> + <bitOffset>8</bitOffset> + <bitWidth>8</bitWidth> + </field> + <field> + <name>DATA0</name> + <description>DATA0</description> + <bitOffset>0</bitOffset> + <bitWidth>8</bitWidth> + </field> + </fields> + </register> + <register> + <name>CAN_TDH0R</name> + <displayName>CAN_TDH0R</displayName> + <description>CAN_TDH0R</description> + <addressOffset>0x18C</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>DATA7</name> + <description>DATA7</description> + <bitOffset>24</bitOffset> + <bitWidth>8</bitWidth> + </field> + <field> + <name>DATA6</name> + <description>DATA6</description> + <bitOffset>16</bitOffset> + <bitWidth>8</bitWidth> + </field> + <field> + <name>DATA5</name> + <description>DATA5</description> + <bitOffset>8</bitOffset> + <bitWidth>8</bitWidth> + </field> + <field> + <name>DATA4</name> + <description>DATA4</description> + <bitOffset>0</bitOffset> + <bitWidth>8</bitWidth> + </field> + </fields> + </register> + <register> + <name>CAN_TI1R</name> + <displayName>CAN_TI1R</displayName> + <description>CAN_TI1R</description> + <addressOffset>0x190</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>STID</name> + <description>STID</description> + <bitOffset>21</bitOffset> + <bitWidth>11</bitWidth> + </field> + <field> + <name>EXID</name> + <description>EXID</description> + <bitOffset>3</bitOffset> + <bitWidth>18</bitWidth> + </field> + <field> + <name>IDE</name> + <description>IDE</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>RTR</name> + <description>RTR</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TXRQ</name> + <description>TXRQ</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>CAN_TDT1R</name> + <displayName>CAN_TDT1R</displayName> + <description>CAN_TDT1R</description> + <addressOffset>0x194</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>TIME</name> + <description>TIME</description> + <bitOffset>16</bitOffset> + <bitWidth>16</bitWidth> + </field> + <field> + <name>TGT</name> + <description>TGT</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>DLC</name> + <description>DLC</description> + <bitOffset>0</bitOffset> + <bitWidth>4</bitWidth> + </field> + </fields> + </register> + <register> + <name>CAN_TDL1R</name> + <displayName>CAN_TDL1R</displayName> + <description>CAN_TDL1R</description> + <addressOffset>0x198</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>DATA3</name> + <description>DATA3</description> + <bitOffset>24</bitOffset> + <bitWidth>8</bitWidth> + </field> + <field> + <name>DATA2</name> + <description>DATA2</description> + <bitOffset>16</bitOffset> + <bitWidth>8</bitWidth> + </field> + <field> + <name>DATA1</name> + <description>DATA1</description> + <bitOffset>8</bitOffset> + <bitWidth>8</bitWidth> + </field> + <field> + <name>DATA0</name> + <description>DATA0</description> + <bitOffset>0</bitOffset> + <bitWidth>8</bitWidth> + </field> + </fields> + </register> + <register> + <name>CAN_TDH1R</name> + <displayName>CAN_TDH1R</displayName> + <description>CAN_TDH1R</description> + <addressOffset>0x19C</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>DATA7</name> + <description>DATA7</description> + <bitOffset>24</bitOffset> + <bitWidth>8</bitWidth> + </field> + <field> + <name>DATA6</name> + <description>DATA6</description> + <bitOffset>16</bitOffset> + <bitWidth>8</bitWidth> + </field> + <field> + <name>DATA5</name> + <description>DATA5</description> + <bitOffset>8</bitOffset> + <bitWidth>8</bitWidth> + </field> + <field> + <name>DATA4</name> + <description>DATA4</description> + <bitOffset>0</bitOffset> + <bitWidth>8</bitWidth> + </field> + </fields> + </register> + <register> + <name>CAN_TI2R</name> + <displayName>CAN_TI2R</displayName> + <description>CAN_TI2R</description> + <addressOffset>0x1A0</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>STID</name> + <description>STID</description> + <bitOffset>21</bitOffset> + <bitWidth>11</bitWidth> + </field> + <field> + <name>EXID</name> + <description>EXID</description> + <bitOffset>3</bitOffset> + <bitWidth>18</bitWidth> + </field> + <field> + <name>IDE</name> + <description>IDE</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>RTR</name> + <description>RTR</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TXRQ</name> + <description>TXRQ</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>CAN_TDT2R</name> + <displayName>CAN_TDT2R</displayName> + <description>CAN_TDT2R</description> + <addressOffset>0x1A4</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>TIME</name> + <description>TIME</description> + <bitOffset>16</bitOffset> + <bitWidth>16</bitWidth> + </field> + <field> + <name>TGT</name> + <description>TGT</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>DLC</name> + <description>DLC</description> + <bitOffset>0</bitOffset> + <bitWidth>4</bitWidth> + </field> + </fields> + </register> + <register> + <name>CAN_TDL2R</name> + <displayName>CAN_TDL2R</displayName> + <description>CAN_TDL2R</description> + <addressOffset>0x1A8</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>DATA3</name> + <description>DATA3</description> + <bitOffset>24</bitOffset> + <bitWidth>8</bitWidth> + </field> + <field> + <name>DATA2</name> + <description>DATA2</description> + <bitOffset>16</bitOffset> + <bitWidth>8</bitWidth> + </field> + <field> + <name>DATA1</name> + <description>DATA1</description> + <bitOffset>8</bitOffset> + <bitWidth>8</bitWidth> + </field> + <field> + <name>DATA0</name> + <description>DATA0</description> + <bitOffset>0</bitOffset> + <bitWidth>8</bitWidth> + </field> + </fields> + </register> + <register> + <name>CAN_TDH2R</name> + <displayName>CAN_TDH2R</displayName> + <description>CAN_TDH2R</description> + <addressOffset>0x1AC</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>DATA7</name> + <description>DATA7</description> + <bitOffset>24</bitOffset> + <bitWidth>8</bitWidth> + </field> + <field> + <name>DATA6</name> + <description>DATA6</description> + <bitOffset>16</bitOffset> + <bitWidth>8</bitWidth> + </field> + <field> + <name>DATA5</name> + <description>DATA5</description> + <bitOffset>8</bitOffset> + <bitWidth>8</bitWidth> + </field> + <field> + <name>DATA4</name> + <description>DATA4</description> + <bitOffset>0</bitOffset> + <bitWidth>8</bitWidth> + </field> + </fields> + </register> + <register> + <name>CAN_RI0R</name> + <displayName>CAN_RI0R</displayName> + <description>CAN_RI0R</description> + <addressOffset>0x1B0</addressOffset> + <size>0x20</size> + <access>read-only</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>STID</name> + <description>STID</description> + <bitOffset>21</bitOffset> + <bitWidth>11</bitWidth> + </field> + <field> + <name>EXID</name> + <description>EXID</description> + <bitOffset>3</bitOffset> + <bitWidth>18</bitWidth> + </field> + <field> + <name>IDE</name> + <description>IDE</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>RTR</name> + <description>RTR</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>CAN_RDT0R</name> + <displayName>CAN_RDT0R</displayName> + <description>CAN_RDT0R</description> + <addressOffset>0x1B4</addressOffset> + <size>0x20</size> + <access>read-only</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>TIME</name> + <description>TIME</description> + <bitOffset>16</bitOffset> + <bitWidth>16</bitWidth> + </field> + <field> + <name>FMI</name> + <description>FMI</description> + <bitOffset>8</bitOffset> + <bitWidth>8</bitWidth> + </field> + <field> + <name>DLC</name> + <description>DLC</description> + <bitOffset>0</bitOffset> + <bitWidth>4</bitWidth> + </field> + </fields> + </register> + <register> + <name>CAN_RDL0R</name> + <displayName>CAN_RDL0R</displayName> + <description>CAN_RDL0R</description> + <addressOffset>0x1B8</addressOffset> + <size>0x20</size> + <access>read-only</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>DATA3</name> + <description>DATA3</description> + <bitOffset>24</bitOffset> + <bitWidth>8</bitWidth> + </field> + <field> + <name>DATA2</name> + <description>DATA2</description> + <bitOffset>16</bitOffset> + <bitWidth>8</bitWidth> + </field> + <field> + <name>DATA1</name> + <description>DATA1</description> + <bitOffset>8</bitOffset> + <bitWidth>8</bitWidth> + </field> + <field> + <name>DATA0</name> + <description>DATA0</description> + <bitOffset>0</bitOffset> + <bitWidth>8</bitWidth> + </field> + </fields> + </register> + <register> + <name>CAN_RDH0R</name> + <displayName>CAN_RDH0R</displayName> + <description>CAN_RDH0R</description> + <addressOffset>0x1BC</addressOffset> + <size>0x20</size> + <access>read-only</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>DATA7</name> + <description>DATA7</description> + <bitOffset>24</bitOffset> + <bitWidth>8</bitWidth> + </field> + <field> + <name>DATA6</name> + <description>DATA6</description> + <bitOffset>16</bitOffset> + <bitWidth>8</bitWidth> + </field> + <field> + <name>DATA5</name> + <description>DATA5</description> + <bitOffset>8</bitOffset> + <bitWidth>8</bitWidth> + </field> + <field> + <name>DATA4</name> + <description>DATA4</description> + <bitOffset>0</bitOffset> + <bitWidth>8</bitWidth> + </field> + </fields> + </register> + <register> + <name>CAN_RI1R</name> + <displayName>CAN_RI1R</displayName> + <description>CAN_RI1R</description> + <addressOffset>0x1C0</addressOffset> + <size>0x20</size> + <access>read-only</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>STID</name> + <description>STID</description> + <bitOffset>21</bitOffset> + <bitWidth>11</bitWidth> + </field> + <field> + <name>EXID</name> + <description>EXID</description> + <bitOffset>3</bitOffset> + <bitWidth>18</bitWidth> + </field> + <field> + <name>IDE</name> + <description>IDE</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>RTR</name> + <description>RTR</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>CAN_RDT1R</name> + <displayName>CAN_RDT1R</displayName> + <description>CAN_RDT1R</description> + <addressOffset>0x1C4</addressOffset> + <size>0x20</size> + <access>read-only</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>TIME</name> + <description>TIME</description> + <bitOffset>16</bitOffset> + <bitWidth>16</bitWidth> + </field> + <field> + <name>FMI</name> + <description>FMI</description> + <bitOffset>8</bitOffset> + <bitWidth>8</bitWidth> + </field> + <field> + <name>DLC</name> + <description>DLC</description> + <bitOffset>0</bitOffset> + <bitWidth>4</bitWidth> + </field> + </fields> + </register> + <register> + <name>CAN_RDL1R</name> + <displayName>CAN_RDL1R</displayName> + <description>CAN_RDL1R</description> + <addressOffset>0x1C8</addressOffset> + <size>0x20</size> + <access>read-only</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>DATA3</name> + <description>DATA3</description> + <bitOffset>24</bitOffset> + <bitWidth>8</bitWidth> + </field> + <field> + <name>DATA2</name> + <description>DATA2</description> + <bitOffset>16</bitOffset> + <bitWidth>8</bitWidth> + </field> + <field> + <name>DATA1</name> + <description>DATA1</description> + <bitOffset>8</bitOffset> + <bitWidth>8</bitWidth> + </field> + <field> + <name>DATA0</name> + <description>DATA0</description> + <bitOffset>0</bitOffset> + <bitWidth>8</bitWidth> + </field> + </fields> + </register> + <register> + <name>CAN_RDH1R</name> + <displayName>CAN_RDH1R</displayName> + <description>CAN_RDH1R</description> + <addressOffset>0x1CC</addressOffset> + <size>0x20</size> + <access>read-only</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>DATA7</name> + <description>DATA7</description> + <bitOffset>24</bitOffset> + <bitWidth>8</bitWidth> + </field> + <field> + <name>DATA6</name> + <description>DATA6</description> + <bitOffset>16</bitOffset> + <bitWidth>8</bitWidth> + </field> + <field> + <name>DATA5</name> + <description>DATA5</description> + <bitOffset>8</bitOffset> + <bitWidth>8</bitWidth> + </field> + <field> + <name>DATA4</name> + <description>DATA4</description> + <bitOffset>0</bitOffset> + <bitWidth>8</bitWidth> + </field> + </fields> + </register> + <register> + <name>CAN_FMR</name> + <displayName>CAN_FMR</displayName> + <description>CAN_FMR</description> + <addressOffset>0x200</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>CAN2SB</name> + <description>CAN2SB</description> + <bitOffset>8</bitOffset> + <bitWidth>6</bitWidth> + </field> + <field> + <name>FINIT</name> + <description>FINIT</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>CAN_FM1R</name> + <displayName>CAN_FM1R</displayName> + <description>CAN_FM1R</description> + <addressOffset>0x204</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FBM0</name> + <description>Filter mode</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FBM1</name> + <description>Filter mode</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FBM2</name> + <description>Filter mode</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FBM3</name> + <description>Filter mode</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FBM4</name> + <description>Filter mode</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FBM5</name> + <description>Filter mode</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FBM6</name> + <description>Filter mode</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FBM7</name> + <description>Filter mode</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FBM8</name> + <description>Filter mode</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FBM9</name> + <description>Filter mode</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FBM10</name> + <description>Filter mode</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FBM11</name> + <description>Filter mode</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FBM12</name> + <description>Filter mode</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FBM13</name> + <description>Filter mode</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FBM14</name> + <description>Filter mode</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FBM15</name> + <description>Filter mode</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FBM16</name> + <description>Filter mode</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FBM17</name> + <description>Filter mode</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FBM18</name> + <description>Filter mode</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FBM19</name> + <description>Filter mode</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FBM20</name> + <description>Filter mode</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FBM21</name> + <description>Filter mode</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FBM22</name> + <description>Filter mode</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FBM23</name> + <description>Filter mode</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FBM24</name> + <description>Filter mode</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FBM25</name> + <description>Filter mode</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FBM26</name> + <description>Filter mode</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FBM27</name> + <description>Filter mode</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>CAN_FS1R</name> + <displayName>CAN_FS1R</displayName> + <description>CAN_FS1R</description> + <addressOffset>0x20C</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FSC0</name> + <description>Filter scale configuration</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FSC1</name> + <description>Filter scale configuration</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FSC2</name> + <description>Filter scale configuration</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FSC3</name> + <description>Filter scale configuration</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FSC4</name> + <description>Filter scale configuration</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FSC5</name> + <description>Filter scale configuration</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FSC6</name> + <description>Filter scale configuration</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FSC7</name> + <description>Filter scale configuration</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FSC8</name> + <description>Filter scale configuration</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FSC9</name> + <description>Filter scale configuration</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FSC10</name> + <description>Filter scale configuration</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FSC11</name> + <description>Filter scale configuration</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FSC12</name> + <description>Filter scale configuration</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FSC13</name> + <description>Filter scale configuration</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FSC14</name> + <description>Filter scale configuration</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FSC15</name> + <description>Filter scale configuration</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FSC16</name> + <description>Filter scale configuration</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FSC17</name> + <description>Filter scale configuration</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FSC18</name> + <description>Filter scale configuration</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FSC19</name> + <description>Filter scale configuration</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FSC20</name> + <description>Filter scale configuration</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FSC21</name> + <description>Filter scale configuration</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FSC22</name> + <description>Filter scale configuration</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FSC23</name> + <description>Filter scale configuration</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FSC24</name> + <description>Filter scale configuration</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FSC25</name> + <description>Filter scale configuration</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FSC26</name> + <description>Filter scale configuration</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FSC27</name> + <description>Filter scale configuration</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>CAN_FFA1R</name> + <displayName>CAN_FFA1R</displayName> + <description>CAN_FFA1R</description> + <addressOffset>0x214</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FFA0</name> + <description>Filter FIFO assignment for filter + 0</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FFA1</name> + <description>Filter FIFO assignment for filter + 1</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FFA2</name> + <description>Filter FIFO assignment for filter + 2</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FFA3</name> + <description>Filter FIFO assignment for filter + 3</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FFA4</name> + <description>Filter FIFO assignment for filter + 4</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FFA5</name> + <description>Filter FIFO assignment for filter + 5</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FFA6</name> + <description>Filter FIFO assignment for filter + 6</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FFA7</name> + <description>Filter FIFO assignment for filter + 7</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FFA8</name> + <description>Filter FIFO assignment for filter + 8</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FFA9</name> + <description>Filter FIFO assignment for filter + 9</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FFA10</name> + <description>Filter FIFO assignment for filter + 10</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FFA11</name> + <description>Filter FIFO assignment for filter + 11</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FFA12</name> + <description>Filter FIFO assignment for filter + 12</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FFA13</name> + <description>Filter FIFO assignment for filter + 13</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FFA14</name> + <description>Filter FIFO assignment for filter + 14</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FFA15</name> + <description>Filter FIFO assignment for filter + 15</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FFA16</name> + <description>Filter FIFO assignment for filter + 16</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FFA17</name> + <description>Filter FIFO assignment for filter + 17</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FFA18</name> + <description>Filter FIFO assignment for filter + 18</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FFA19</name> + <description>Filter FIFO assignment for filter + 19</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FFA20</name> + <description>Filter FIFO assignment for filter + 20</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FFA21</name> + <description>Filter FIFO assignment for filter + 21</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FFA22</name> + <description>Filter FIFO assignment for filter + 22</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FFA23</name> + <description>Filter FIFO assignment for filter + 23</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FFA24</name> + <description>Filter FIFO assignment for filter + 24</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FFA25</name> + <description>Filter FIFO assignment for filter + 25</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FFA26</name> + <description>Filter FIFO assignment for filter + 26</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FFA27</name> + <description>Filter FIFO assignment for filter + 27</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>CAN_FA1R</name> + <displayName>CAN_FA1R</displayName> + <description>CAN_FA1R</description> + <addressOffset>0x21C</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FACT0</name> + <description>Filter active</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FACT1</name> + <description>Filter active</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FACT2</name> + <description>Filter active</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FACT3</name> + <description>Filter active</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FACT4</name> + <description>Filter active</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FACT5</name> + <description>Filter active</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FACT6</name> + <description>Filter active</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FACT7</name> + <description>Filter active</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FACT8</name> + <description>Filter active</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FACT9</name> + <description>Filter active</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FACT10</name> + <description>Filter active</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FACT11</name> + <description>Filter active</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FACT12</name> + <description>Filter active</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FACT13</name> + <description>Filter active</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FACT14</name> + <description>Filter active</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FACT15</name> + <description>Filter active</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FACT16</name> + <description>Filter active</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FACT17</name> + <description>Filter active</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FACT18</name> + <description>Filter active</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FACT19</name> + <description>Filter active</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FACT20</name> + <description>Filter active</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FACT21</name> + <description>Filter active</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FACT22</name> + <description>Filter active</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FACT23</name> + <description>Filter active</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FACT24</name> + <description>Filter active</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FACT25</name> + <description>Filter active</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FACT26</name> + <description>Filter active</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FACT27</name> + <description>Filter active</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F0R1</name> + <displayName>F0R1</displayName> + <description>Filter bank 0 register 1</description> + <addressOffset>0x240</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F0R2</name> + <displayName>F0R2</displayName> + <description>Filter bank 0 register 2</description> + <addressOffset>0x244</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F1R1</name> + <displayName>F1R1</displayName> + <description>Filter bank 1 register 1</description> + <addressOffset>0x248</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F1R2</name> + <displayName>F1R2</displayName> + <description>Filter bank 1 register 2</description> + <addressOffset>0x24C</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F2R1</name> + <displayName>F2R1</displayName> + <description>Filter bank 2 register 1</description> + <addressOffset>0x250</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F2R2</name> + <displayName>F2R2</displayName> + <description>Filter bank 2 register 2</description> + <addressOffset>0x254</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F3R1</name> + <displayName>F3R1</displayName> + <description>Filter bank 3 register 1</description> + <addressOffset>0x258</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F3R2</name> + <displayName>F3R2</displayName> + <description>Filter bank 3 register 2</description> + <addressOffset>0x25C</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F4R1</name> + <displayName>F4R1</displayName> + <description>Filter bank 4 register 1</description> + <addressOffset>0x260</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F4R2</name> + <displayName>F4R2</displayName> + <description>Filter bank 4 register 2</description> + <addressOffset>0x264</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F5R1</name> + <displayName>F5R1</displayName> + <description>Filter bank 5 register 1</description> + <addressOffset>0x268</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F5R2</name> + <displayName>F5R2</displayName> + <description>Filter bank 5 register 2</description> + <addressOffset>0x26C</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F6R1</name> + <displayName>F6R1</displayName> + <description>Filter bank 6 register 1</description> + <addressOffset>0x270</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F6R2</name> + <displayName>F6R2</displayName> + <description>Filter bank 6 register 2</description> + <addressOffset>0x274</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F7R1</name> + <displayName>F7R1</displayName> + <description>Filter bank 7 register 1</description> + <addressOffset>0x278</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F7R2</name> + <displayName>F7R2</displayName> + <description>Filter bank 7 register 2</description> + <addressOffset>0x27C</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F8R1</name> + <displayName>F8R1</displayName> + <description>Filter bank 8 register 1</description> + <addressOffset>0x280</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F8R2</name> + <displayName>F8R2</displayName> + <description>Filter bank 8 register 2</description> + <addressOffset>0x284</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F9R1</name> + <displayName>F9R1</displayName> + <description>Filter bank 9 register 1</description> + <addressOffset>0x288</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F9R2</name> + <displayName>F9R2</displayName> + <description>Filter bank 9 register 2</description> + <addressOffset>0x28C</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F10R1</name> + <displayName>F10R1</displayName> + <description>Filter bank 10 register 1</description> + <addressOffset>0x290</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F10R2</name> + <displayName>F10R2</displayName> + <description>Filter bank 10 register 2</description> + <addressOffset>0x294</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F11R1</name> + <displayName>F11R1</displayName> + <description>Filter bank 11 register 1</description> + <addressOffset>0x298</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F11R2</name> + <displayName>F11R2</displayName> + <description>Filter bank 11 register 2</description> + <addressOffset>0x29C</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F12R1</name> + <displayName>F12R1</displayName> + <description>Filter bank 4 register 1</description> + <addressOffset>0x2A0</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F12R2</name> + <displayName>F12R2</displayName> + <description>Filter bank 12 register 2</description> + <addressOffset>0x2A4</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F13R1</name> + <displayName>F13R1</displayName> + <description>Filter bank 13 register 1</description> + <addressOffset>0x2A8</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F13R2</name> + <displayName>F13R2</displayName> + <description>Filter bank 13 register 2</description> + <addressOffset>0x2AC</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F14R1</name> + <displayName>F14R1</displayName> + <description>Filter bank 14 register 1</description> + <addressOffset>0x2B0</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F14R2</name> + <displayName>F14R2</displayName> + <description>Filter bank 14 register 2</description> + <addressOffset>0x2B4</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F15R1</name> + <displayName>F15R1</displayName> + <description>Filter bank 15 register 1</description> + <addressOffset>0x2B8</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F15R2</name> + <displayName>F15R2</displayName> + <description>Filter bank 15 register 2</description> + <addressOffset>0x2BC</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F16R1</name> + <displayName>F16R1</displayName> + <description>Filter bank 16 register 1</description> + <addressOffset>0x2C0</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F16R2</name> + <displayName>F16R2</displayName> + <description>Filter bank 16 register 2</description> + <addressOffset>0x2C4</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F17R1</name> + <displayName>F17R1</displayName> + <description>Filter bank 17 register 1</description> + <addressOffset>0x2C8</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F17R2</name> + <displayName>F17R2</displayName> + <description>Filter bank 17 register 2</description> + <addressOffset>0x2CC</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F18R1</name> + <displayName>F18R1</displayName> + <description>Filter bank 18 register 1</description> + <addressOffset>0x2D0</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F18R2</name> + <displayName>F18R2</displayName> + <description>Filter bank 18 register 2</description> + <addressOffset>0x2D4</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F19R1</name> + <displayName>F19R1</displayName> + <description>Filter bank 19 register 1</description> + <addressOffset>0x2D8</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F19R2</name> + <displayName>F19R2</displayName> + <description>Filter bank 19 register 2</description> + <addressOffset>0x2DC</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F20R1</name> + <displayName>F20R1</displayName> + <description>Filter bank 20 register 1</description> + <addressOffset>0x2E0</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F20R2</name> + <displayName>F20R2</displayName> + <description>Filter bank 20 register 2</description> + <addressOffset>0x2E4</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F21R1</name> + <displayName>F21R1</displayName> + <description>Filter bank 21 register 1</description> + <addressOffset>0x2E8</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F21R2</name> + <displayName>F21R2</displayName> + <description>Filter bank 21 register 2</description> + <addressOffset>0x2EC</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F22R1</name> + <displayName>F22R1</displayName> + <description>Filter bank 22 register 1</description> + <addressOffset>0x2F0</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F22R2</name> + <displayName>F22R2</displayName> + <description>Filter bank 22 register 2</description> + <addressOffset>0x2F4</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F23R1</name> + <displayName>F23R1</displayName> + <description>Filter bank 23 register 1</description> + <addressOffset>0x2F8</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F23R2</name> + <displayName>F23R2</displayName> + <description>Filter bank 23 register 2</description> + <addressOffset>0x2FC</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F24R1</name> + <displayName>F24R1</displayName> + <description>Filter bank 24 register 1</description> + <addressOffset>0x300</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F24R2</name> + <displayName>F24R2</displayName> + <description>Filter bank 24 register 2</description> + <addressOffset>0x304</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F25R1</name> + <displayName>F25R1</displayName> + <description>Filter bank 25 register 1</description> + <addressOffset>0x308</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F25R2</name> + <displayName>F25R2</displayName> + <description>Filter bank 25 register 2</description> + <addressOffset>0x30C</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F26R1</name> + <displayName>F26R1</displayName> + <description>Filter bank 26 register 1</description> + <addressOffset>0x310</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F26R2</name> + <displayName>F26R2</displayName> + <description>Filter bank 26 register 2</description> + <addressOffset>0x314</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F27R1</name> + <displayName>F27R1</displayName> + <description>Filter bank 27 register 1</description> + <addressOffset>0x318</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>F27R2</name> + <displayName>F27R2</displayName> + <description>Filter bank 27 register 2</description> + <addressOffset>0x31C</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>FB0</name> + <description>Filter bits</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB1</name> + <description>Filter bits</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB2</name> + <description>Filter bits</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB3</name> + <description>Filter bits</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB4</name> + <description>Filter bits</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB5</name> + <description>Filter bits</description> + <bitOffset>5</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB6</name> + <description>Filter bits</description> + <bitOffset>6</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB7</name> + <description>Filter bits</description> + <bitOffset>7</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB8</name> + <description>Filter bits</description> + <bitOffset>8</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB9</name> + <description>Filter bits</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB10</name> + <description>Filter bits</description> + <bitOffset>10</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB11</name> + <description>Filter bits</description> + <bitOffset>11</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB12</name> + <description>Filter bits</description> + <bitOffset>12</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB13</name> + <description>Filter bits</description> + <bitOffset>13</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB14</name> + <description>Filter bits</description> + <bitOffset>14</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB15</name> + <description>Filter bits</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB16</name> + <description>Filter bits</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB17</name> + <description>Filter bits</description> + <bitOffset>17</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB18</name> + <description>Filter bits</description> + <bitOffset>18</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB19</name> + <description>Filter bits</description> + <bitOffset>19</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB20</name> + <description>Filter bits</description> + <bitOffset>20</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB21</name> + <description>Filter bits</description> + <bitOffset>21</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB22</name> + <description>Filter bits</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB23</name> + <description>Filter bits</description> + <bitOffset>23</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB24</name> + <description>Filter bits</description> + <bitOffset>24</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB25</name> + <description>Filter bits</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB26</name> + <description>Filter bits</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB27</name> + <description>Filter bits</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB28</name> + <description>Filter bits</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB29</name> + <description>Filter bits</description> + <bitOffset>29</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB30</name> + <description>Filter bits</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>FB31</name> + <description>Filter bits</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + </registers> + </peripheral> + <peripheral> + <name>SCB</name> + <description>System control block</description> + <groupName>SCB</groupName> + <baseAddress>0xE000ED00</baseAddress> + <addressBlock> + <offset>0x0</offset> + <size>0x41</size> + <usage>registers</usage> + </addressBlock> + <registers> + <register> + <name>CPUID</name> + <displayName>CPUID</displayName> + <description>CPUID base register</description> + <addressOffset>0x0</addressOffset> + <size>0x20</size> + <access>read-only</access> + <resetValue>0x410FC241</resetValue> + <fields> + <field> + <name>Revision</name> + <description>Revision number</description> + <bitOffset>0</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>PartNo</name> + <description>Part number of the + processor</description> + <bitOffset>4</bitOffset> + <bitWidth>12</bitWidth> + </field> + <field> + <name>Constant</name> + <description>Reads as 0xF</description> + <bitOffset>16</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>Variant</name> + <description>Variant number</description> + <bitOffset>20</bitOffset> + <bitWidth>4</bitWidth> + </field> + <field> + <name>Implementer</name> + <description>Implementer code</description> + <bitOffset>24</bitOffset> + <bitWidth>8</bitWidth> + </field> + </fields> + </register> + <register> + <name>ICSR</name> + <displayName>ICSR</displayName> + <description>Interrupt control and state + register</description> + <addressOffset>0x4</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>VECTACTIVE</name> + <description>Active vector</description> + <bitOffset>0</bitOffset> + <bitWidth>6</bitWidth> + </field> + <field> + <name>VECTPENDING</name> + <description>Pending vector</description> + <bitOffset>12</bitOffset> + <bitWidth>6</bitWidth> + </field> + <field> + <name>ISRPENDING</name> + <description>Interrupt pending flag</description> + <bitOffset>22</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PENDSTCLR</name> + <description>SysTick exception clear-pending + bit</description> + <bitOffset>25</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PENDSTSET</name> + <description>SysTick exception set-pending + bit</description> + <bitOffset>26</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PENDSVCLR</name> + <description>PendSV clear-pending bit</description> + <bitOffset>27</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>PENDSVSET</name> + <description>PendSV set-pending bit</description> + <bitOffset>28</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>NMIPENDSET</name> + <description>NMI set-pending bit.</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>AIRCR</name> + <displayName>AIRCR</displayName> + <description>Application interrupt and reset control + register</description> + <addressOffset>0xC</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>VECTCLRACTIVE</name> + <description>VECTCLRACTIVE</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SYSRESETREQ</name> + <description>SYSRESETREQ</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>ENDIANESS</name> + <description>ENDIANESS</description> + <bitOffset>15</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>VECTKEYSTAT</name> + <description>Register key</description> + <bitOffset>16</bitOffset> + <bitWidth>16</bitWidth> + </field> + </fields> + </register> + <register> + <name>SCR</name> + <displayName>SCR</displayName> + <description>System control register</description> + <addressOffset>0x10</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>SLEEPONEXIT</name> + <description>SLEEPONEXIT</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SLEEPDEEP</name> + <description>SLEEPDEEP</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>SEVEONPEND</name> + <description>Send Event on Pending bit</description> + <bitOffset>4</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>CCR</name> + <displayName>CCR</displayName> + <description>Configuration and control + register</description> + <addressOffset>0x14</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>UNALIGN__TRP</name> + <description>UNALIGN_ TRP</description> + <bitOffset>3</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>STKALIGN</name> + <description>STKALIGN</description> + <bitOffset>9</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>SHPR2</name> + <displayName>SHPR2</displayName> + <description>System handler priority + registers</description> + <addressOffset>0x1C</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>PRI_11</name> + <description>Priority of system handler + 11</description> + <bitOffset>24</bitOffset> + <bitWidth>8</bitWidth> + </field> + </fields> + </register> + <register> + <name>SHPR3</name> + <displayName>SHPR3</displayName> + <description>System handler priority + registers</description> + <addressOffset>0x20</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0x00000000</resetValue> + <fields> + <field> + <name>PRI_14</name> + <description>Priority of system handler + 14</description> + <bitOffset>16</bitOffset> + <bitWidth>8</bitWidth> + </field> + <field> + <name>PRI_15</name> + <description>Priority of system handler + 15</description> + <bitOffset>24</bitOffset> + <bitWidth>8</bitWidth> + </field> + </fields> + </register> + </registers> + </peripheral> + <peripheral> + <name>STK</name> + <description>SysTick timer</description> + <groupName>STK</groupName> + <baseAddress>0xE000E010</baseAddress> + <addressBlock> + <offset>0x0</offset> + <size>0x11</size> + <usage>registers</usage> + </addressBlock> + <registers> + <register> + <name>CSR</name> + <displayName>CSR</displayName> + <description>SysTick control and status + register</description> + <addressOffset>0x0</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0X00000000</resetValue> + <fields> + <field> + <name>ENABLE</name> + <description>Counter enable</description> + <bitOffset>0</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>TICKINT</name> + <description>SysTick exception request + enable</description> + <bitOffset>1</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>CLKSOURCE</name> + <description>Clock source selection</description> + <bitOffset>2</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>COUNTFLAG</name> + <description>COUNTFLAG</description> + <bitOffset>16</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + <register> + <name>RVR</name> + <displayName>RVR</displayName> + <description>SysTick reload value register</description> + <addressOffset>0x4</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0X00000000</resetValue> + <fields> + <field> + <name>RELOAD</name> + <description>RELOAD value</description> + <bitOffset>0</bitOffset> + <bitWidth>24</bitWidth> + </field> + </fields> + </register> + <register> + <name>CVR</name> + <displayName>CVR</displayName> + <description>SysTick current value register</description> + <addressOffset>0x8</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0X00000000</resetValue> + <fields> + <field> + <name>CURRENT</name> + <description>Current counter value</description> + <bitOffset>0</bitOffset> + <bitWidth>24</bitWidth> + </field> + </fields> + </register> + <register> + <name>CALIB</name> + <displayName>CALIB</displayName> + <description>SysTick calibration value + register</description> + <addressOffset>0xC</addressOffset> + <size>0x20</size> + <access>read-write</access> + <resetValue>0X00000000</resetValue> + <fields> + <field> + <name>TENMS</name> + <description>Calibration value</description> + <bitOffset>0</bitOffset> + <bitWidth>24</bitWidth> + </field> + <field> + <name>SKEW</name> + <description>SKEW flag: Indicates whether the TENMS + value is exact</description> + <bitOffset>30</bitOffset> + <bitWidth>1</bitWidth> + </field> + <field> + <name>NOREF</name> + <description>NOREF flag. Reads as zero</description> + <bitOffset>31</bitOffset> + <bitWidth>1</bitWidth> + </field> + </fields> + </register> + </registers> + </peripheral> + </peripherals> +</device> diff --git a/docs/Doxyfile.dox b/docs/Doxyfile.dox new file mode 100644 index 0000000000000000000000000000000000000000..90d2a1797637de2f63ce637eeb3e1e916b7297c4 --- /dev/null +++ b/docs/Doxyfile.dox @@ -0,0 +1,2533 @@ +# Doxyfile 1.8.17 + +# This file describes the settings to be used by the documentation system +# doxygen (www.doxygen.org) for a project. +# +# All text after a double hash (##) is considered a comment and is placed in +# front of the TAG it is preceding. +# +# All text after a single hash (#) is considered a comment and will be ignored. +# The format is: +# TAG = value [value, ...] +# For lists, items can also be appended using: +# TAG += value [value, ...] +# Values that contain spaces should be placed between quotes (\" \"). + +#--------------------------------------------------------------------------- +# Project related configuration options +#--------------------------------------------------------------------------- + +# This tag specifies the encoding used for all characters in the configuration +# file that follow. The default is UTF-8 which is also the encoding used for all +# text before the first occurrence of this tag. Doxygen uses libiconv (or the +# iconv built into libc) for the transcoding. See +# https://www.gnu.org/software/libiconv/ for the list of possible encodings. +# The default value is: UTF-8. + +DOXYFILE_ENCODING = UTF-8 + +# The PROJECT_NAME tag is a single word (or a sequence of words surrounded by +# double-quotes, unless you are using Doxywizard) that should identify the +# project for which the documentation is generated. This name is used in the +# title of most generated pages and in a few other places. +# The default value is: My Project. + +PROJECT_NAME = "@PROJECT_NAME@" + +# The PROJECT_NUMBER tag can be used to enter a project or revision number. This +# could be handy for archiving the generated documentation or if some version +# control system is used. + +PROJECT_NUMBER = "@VERSION@" + +# Using the PROJECT_BRIEF tag one can provide an optional one line description +# for a project that appears at the top of each page and should give viewer a +# quick idea about the purpose of the project. Keep the description short. + +PROJECT_BRIEF = + +# With the PROJECT_LOGO tag one can specify a logo or an icon that is included +# in the documentation. The maximum height of the logo should not exceed 55 +# pixels and the maximum width should not exceed 200 pixels. Doxygen will copy +# the logo to the output directory. + +PROJECT_LOGO = + +# The OUTPUT_DIRECTORY tag is used to specify the (relative or absolute) path +# into which the generated documentation will be written. If a relative path is +# entered, it will be relative to the location where doxygen was started. If +# left blank the current directory will be used. + +OUTPUT_DIRECTORY = "@OUTPUT_DIRECTORY@" + +# If the CREATE_SUBDIRS tag is set to YES then doxygen will create 4096 sub- +# directories (in 2 levels) under the output directory of each output format and +# will distribute the generated files over these directories. Enabling this +# option can be useful when feeding doxygen a huge amount of source files, where +# putting all generated files in the same directory would otherwise causes +# performance problems for the file system. +# The default value is: NO. + +CREATE_SUBDIRS = NO + +# If the ALLOW_UNICODE_NAMES tag is set to YES, doxygen will allow non-ASCII +# characters to appear in the names of generated files. If set to NO, non-ASCII +# characters will be escaped, for example _xE3_x81_x84 will be used for Unicode +# U+3044. +# The default value is: NO. + +ALLOW_UNICODE_NAMES = NO + +# The OUTPUT_LANGUAGE tag is used to specify the language in which all +# documentation generated by doxygen is written. Doxygen will use this +# information to generate all constant output in the proper language. +# Possible values are: Afrikaans, Arabic, Armenian, Brazilian, Catalan, Chinese, +# Chinese-Traditional, Croatian, Czech, Danish, Dutch, English (United States), +# Esperanto, Farsi (Persian), Finnish, French, German, Greek, Hungarian, +# Indonesian, Italian, Japanese, Japanese-en (Japanese with English messages), +# Korean, Korean-en (Korean with English messages), Latvian, Lithuanian, +# Macedonian, Norwegian, Persian (Farsi), Polish, Portuguese, Romanian, Russian, +# Serbian, Serbian-Cyrillic, Slovak, Slovene, Spanish, Swedish, Turkish, +# Ukrainian and Vietnamese. +# The default value is: English. + +OUTPUT_LANGUAGE = English + +# The OUTPUT_TEXT_DIRECTION tag is used to specify the direction in which all +# documentation generated by doxygen is written. Doxygen will use this +# information to generate all generated output in the proper direction. +# Possible values are: None, LTR, RTL and Context. +# The default value is: None. + +OUTPUT_TEXT_DIRECTION = None + +# If the BRIEF_MEMBER_DESC tag is set to YES, doxygen will include brief member +# descriptions after the members that are listed in the file and class +# documentation (similar to Javadoc). Set to NO to disable this. +# The default value is: YES. + +BRIEF_MEMBER_DESC = YES + +# If the REPEAT_BRIEF tag is set to YES, doxygen will prepend the brief +# description of a member or function before the detailed description +# +# Note: If both HIDE_UNDOC_MEMBERS and BRIEF_MEMBER_DESC are set to NO, the +# brief descriptions will be completely suppressed. +# The default value is: YES. + +REPEAT_BRIEF = YES + +# This tag implements a quasi-intelligent brief description abbreviator that is +# used to form the text in various listings. Each string in this list, if found +# as the leading text of the brief description, will be stripped from the text +# and the result, after processing the whole list, is used as the annotated +# text. Otherwise, the brief description is used as-is. If left blank, the +# following values are used ($name is automatically replaced with the name of +# the entity):The $name class, The $name widget, The $name file, is, provides, +# specifies, contains, represents, a, an and the. + +ABBREVIATE_BRIEF = "The $name class" \ + "The $name widget" \ + "The $name file" \ + is \ + provides \ + specifies \ + contains \ + represents \ + a \ + an \ + the + +# If the ALWAYS_DETAILED_SEC and REPEAT_BRIEF tags are both set to YES then +# doxygen will generate a detailed section even if there is only a brief +# description. +# The default value is: NO. + +ALWAYS_DETAILED_SEC = NO + +# If the INLINE_INHERITED_MEMB tag is set to YES, doxygen will show all +# inherited members of a class in the documentation of that class as if those +# members were ordinary class members. Constructors, destructors and assignment +# operators of the base classes will not be shown. +# The default value is: NO. + +INLINE_INHERITED_MEMB = NO + +# If the FULL_PATH_NAMES tag is set to YES, doxygen will prepend the full path +# before files name in the file list and in the header files. If set to NO the +# shortest path that makes the file name unique will be used +# The default value is: YES. + +FULL_PATH_NAMES = YES + +# The STRIP_FROM_PATH tag can be used to strip a user-defined part of the path. +# Stripping is only done if one of the specified strings matches the left-hand +# part of the path. The tag can be used to show relative paths in the file list. +# If left blank the directory from which doxygen is run is used as the path to +# strip. +# +# Note that you can specify absolute paths here, but also relative paths, which +# will be relative from the directory where doxygen is started. +# This tag requires that the tag FULL_PATH_NAMES is set to YES. + +STRIP_FROM_PATH = + +# The STRIP_FROM_INC_PATH tag can be used to strip a user-defined part of the +# path mentioned in the documentation of a class, which tells the reader which +# header file to include in order to use a class. If left blank only the name of +# the header file containing the class definition is used. Otherwise one should +# specify the list of include paths that are normally passed to the compiler +# using the -I flag. + +STRIP_FROM_INC_PATH = + +# If the SHORT_NAMES tag is set to YES, doxygen will generate much shorter (but +# less readable) file names. This can be useful is your file systems doesn't +# support long names like on DOS, Mac, or CD-ROM. +# The default value is: NO. + +SHORT_NAMES = NO + +# If the JAVADOC_AUTOBRIEF tag is set to YES then doxygen will interpret the +# first line (until the first dot) of a Javadoc-style comment as the brief +# description. If set to NO, the Javadoc-style will behave just like regular Qt- +# style comments (thus requiring an explicit @brief command for a brief +# description.) +# The default value is: NO. + +JAVADOC_AUTOBRIEF = NO + +# If the JAVADOC_BANNER tag is set to YES then doxygen will interpret a line +# such as +# /*************** +# as being the beginning of a Javadoc-style comment "banner". If set to NO, the +# Javadoc-style will behave just like regular comments and it will not be +# interpreted by doxygen. +# The default value is: NO. + +JAVADOC_BANNER = NO + +# If the QT_AUTOBRIEF tag is set to YES then doxygen will interpret the first +# line (until the first dot) of a Qt-style comment as the brief description. If +# set to NO, the Qt-style will behave just like regular Qt-style comments (thus +# requiring an explicit \brief command for a brief description.) +# The default value is: NO. + +QT_AUTOBRIEF = NO + +# The MULTILINE_CPP_IS_BRIEF tag can be set to YES to make doxygen treat a +# multi-line C++ special comment block (i.e. a block of //! or /// comments) as +# a brief description. This used to be the default behavior. The new default is +# to treat a multi-line C++ comment block as a detailed description. Set this +# tag to YES if you prefer the old behavior instead. +# +# Note that setting this tag to YES also means that rational rose comments are +# not recognized any more. +# The default value is: NO. + +MULTILINE_CPP_IS_BRIEF = NO + +# If the INHERIT_DOCS tag is set to YES then an undocumented member inherits the +# documentation from any documented member that it re-implements. +# The default value is: YES. + +INHERIT_DOCS = YES + +# If the SEPARATE_MEMBER_PAGES tag is set to YES then doxygen will produce a new +# page for each member. If set to NO, the documentation of a member will be part +# of the file/class/namespace that contains it. +# The default value is: NO. + +SEPARATE_MEMBER_PAGES = NO + +# The TAB_SIZE tag can be used to set the number of spaces in a tab. Doxygen +# uses this value to replace tabs by spaces in code fragments. +# Minimum value: 1, maximum value: 16, default value: 4. + +TAB_SIZE = 4 + +# This tag can be used to specify a number of aliases that act as commands in +# the documentation. An alias has the form: +# name=value +# For example adding +# "sideeffect=@par Side Effects:\n" +# will allow you to put the command \sideeffect (or @sideeffect) in the +# documentation, which will result in a user-defined paragraph with heading +# "Side Effects:". You can put \n's in the value part of an alias to insert +# newlines (in the resulting output). You can put ^^ in the value part of an +# alias to insert a newline as if a physical newline was in the original file. +# When you need a literal { or } or , in the value part of an alias you have to +# escape them by means of a backslash (\), this can lead to conflicts with the +# commands \{ and \} for these it is advised to use the version @{ and @} or use +# a double escape (\\{ and \\}) + +ALIASES = + +# This tag can be used to specify a number of word-keyword mappings (TCL only). +# A mapping has the form "name=value". For example adding "class=itcl::class" +# will allow you to use the command class in the itcl::class meaning. + +TCL_SUBST = + +# Set the OPTIMIZE_OUTPUT_FOR_C tag to YES if your project consists of C sources +# only. Doxygen will then generate output that is more tailored for C. For +# instance, some of the names that are used will be different. The list of all +# members will be omitted, etc. +# The default value is: NO. + +OPTIMIZE_OUTPUT_FOR_C = NO + +# Set the OPTIMIZE_OUTPUT_JAVA tag to YES if your project consists of Java or +# Python sources only. Doxygen will then generate output that is more tailored +# for that language. For instance, namespaces will be presented as packages, +# qualified scopes will look different, etc. +# The default value is: NO. + +OPTIMIZE_OUTPUT_JAVA = NO + +# Set the OPTIMIZE_FOR_FORTRAN tag to YES if your project consists of Fortran +# sources. Doxygen will then generate output that is tailored for Fortran. +# The default value is: NO. + +OPTIMIZE_FOR_FORTRAN = NO + +# Set the OPTIMIZE_OUTPUT_VHDL tag to YES if your project consists of VHDL +# sources. Doxygen will then generate output that is tailored for VHDL. +# The default value is: NO. + +OPTIMIZE_OUTPUT_VHDL = NO + +# Set the OPTIMIZE_OUTPUT_SLICE tag to YES if your project consists of Slice +# sources only. Doxygen will then generate output that is more tailored for that +# language. For instance, namespaces will be presented as modules, types will be +# separated into more groups, etc. +# The default value is: NO. + +OPTIMIZE_OUTPUT_SLICE = NO + +# Doxygen selects the parser to use depending on the extension of the files it +# parses. With this tag you can assign which parser to use for a given +# extension. Doxygen has a built-in mapping, but you can override or extend it +# using this tag. The format is ext=language, where ext is a file extension, and +# language is one of the parsers supported by doxygen: IDL, Java, JavaScript, +# Csharp (C#), C, C++, D, PHP, md (Markdown), Objective-C, Python, Slice, +# Fortran (fixed format Fortran: FortranFixed, free formatted Fortran: +# FortranFree, unknown formatted Fortran: Fortran. In the later case the parser +# tries to guess whether the code is fixed or free formatted code, this is the +# default for Fortran type files), VHDL, tcl. For instance to make doxygen treat +# .inc files as Fortran files (default is PHP), and .f files as C (default is +# Fortran), use: inc=Fortran f=C. +# +# Note: For files without extension you can use no_extension as a placeholder. +# +# Note that for custom extensions you also need to set FILE_PATTERNS otherwise +# the files are not read by doxygen. + +EXTENSION_MAPPING = + +# If the MARKDOWN_SUPPORT tag is enabled then doxygen pre-processes all comments +# according to the Markdown format, which allows for more readable +# documentation. See https://daringfireball.net/projects/markdown/ for details. +# The output of markdown processing is further processed by doxygen, so you can +# mix doxygen, HTML, and XML commands with Markdown formatting. Disable only in +# case of backward compatibilities issues. +# The default value is: YES. + +MARKDOWN_SUPPORT = YES + +# When the TOC_INCLUDE_HEADINGS tag is set to a non-zero value, all headings up +# to that level are automatically included in the table of contents, even if +# they do not have an id attribute. +# Note: This feature currently applies only to Markdown headings. +# Minimum value: 0, maximum value: 99, default value: 5. +# This tag requires that the tag MARKDOWN_SUPPORT is set to YES. + +TOC_INCLUDE_HEADINGS = 5 + +# When enabled doxygen tries to link words that correspond to documented +# classes, or namespaces to their corresponding documentation. Such a link can +# be prevented in individual cases by putting a % sign in front of the word or +# globally by setting AUTOLINK_SUPPORT to NO. +# The default value is: YES. + +AUTOLINK_SUPPORT = YES + +# If you use STL classes (i.e. std::string, std::vector, etc.) but do not want +# to include (a tag file for) the STL sources as input, then you should set this +# tag to YES in order to let doxygen match functions declarations and +# definitions whose arguments contain STL classes (e.g. func(std::string); +# versus func(std::string) {}). This also make the inheritance and collaboration +# diagrams that involve STL classes more complete and accurate. +# The default value is: NO. + +BUILTIN_STL_SUPPORT = NO + +# If you use Microsoft's C++/CLI language, you should set this option to YES to +# enable parsing support. +# The default value is: NO. + +CPP_CLI_SUPPORT = NO + +# Set the SIP_SUPPORT tag to YES if your project consists of sip (see: +# https://www.riverbankcomputing.com/software/sip/intro) sources only. Doxygen +# will parse them like normal C++ but will assume all classes use public instead +# of private inheritance when no explicit protection keyword is present. +# The default value is: NO. + +SIP_SUPPORT = NO + +# For Microsoft's IDL there are propget and propput attributes to indicate +# getter and setter methods for a property. Setting this option to YES will make +# doxygen to replace the get and set methods by a property in the documentation. +# This will only work if the methods are indeed getting or setting a simple +# type. If this is not the case, or you want to show the methods anyway, you +# should set this option to NO. +# The default value is: YES. + +IDL_PROPERTY_SUPPORT = YES + +# If member grouping is used in the documentation and the DISTRIBUTE_GROUP_DOC +# tag is set to YES then doxygen will reuse the documentation of the first +# member in the group (if any) for the other members of the group. By default +# all members of a group must be documented explicitly. +# The default value is: NO. + +DISTRIBUTE_GROUP_DOC = NO + +# If one adds a struct or class to a group and this option is enabled, then also +# any nested class or struct is added to the same group. By default this option +# is disabled and one has to add nested compounds explicitly via \ingroup. +# The default value is: NO. + +GROUP_NESTED_COMPOUNDS = NO + +# Set the SUBGROUPING tag to YES to allow class member groups of the same type +# (for instance a group of public functions) to be put as a subgroup of that +# type (e.g. under the Public Functions section). Set it to NO to prevent +# subgrouping. Alternatively, this can be done per class using the +# \nosubgrouping command. +# The default value is: YES. + +SUBGROUPING = YES + +# When the INLINE_GROUPED_CLASSES tag is set to YES, classes, structs and unions +# are shown inside the group in which they are included (e.g. using \ingroup) +# instead of on a separate page (for HTML and Man pages) or section (for LaTeX +# and RTF). +# +# Note that this feature does not work in combination with +# SEPARATE_MEMBER_PAGES. +# The default value is: NO. + +INLINE_GROUPED_CLASSES = NO + +# When the INLINE_SIMPLE_STRUCTS tag is set to YES, structs, classes, and unions +# with only public data fields or simple typedef fields will be shown inline in +# the documentation of the scope in which they are defined (i.e. file, +# namespace, or group documentation), provided this scope is documented. If set +# to NO, structs, classes, and unions are shown on a separate page (for HTML and +# Man pages) or section (for LaTeX and RTF). +# The default value is: NO. + +INLINE_SIMPLE_STRUCTS = NO + +# When TYPEDEF_HIDES_STRUCT tag is enabled, a typedef of a struct, union, or +# enum is documented as struct, union, or enum with the name of the typedef. So +# typedef struct TypeS {} TypeT, will appear in the documentation as a struct +# with name TypeT. When disabled the typedef will appear as a member of a file, +# namespace, or class. And the struct will be named TypeS. This can typically be +# useful for C code in case the coding convention dictates that all compound +# types are typedef'ed and only the typedef is referenced, never the tag name. +# The default value is: NO. + +TYPEDEF_HIDES_STRUCT = NO + +# The size of the symbol lookup cache can be set using LOOKUP_CACHE_SIZE. This +# cache is used to resolve symbols given their name and scope. Since this can be +# an expensive process and often the same symbol appears multiple times in the +# code, doxygen keeps a cache of pre-resolved symbols. If the cache is too small +# doxygen will become slower. If the cache is too large, memory is wasted. The +# cache size is given by this formula: 2^(16+LOOKUP_CACHE_SIZE). The valid range +# is 0..9, the default is 0, corresponding to a cache size of 2^16=65536 +# symbols. At the end of a run doxygen will report the cache usage and suggest +# the optimal cache size from a speed point of view. +# Minimum value: 0, maximum value: 9, default value: 0. + +LOOKUP_CACHE_SIZE = 0 + +#--------------------------------------------------------------------------- +# Build related configuration options +#--------------------------------------------------------------------------- + +# If the EXTRACT_ALL tag is set to YES, doxygen will assume all entities in +# documentation are documented, even if no documentation was available. Private +# class members and static file members will be hidden unless the +# EXTRACT_PRIVATE respectively EXTRACT_STATIC tags are set to YES. +# Note: This will also disable the warnings about undocumented members that are +# normally produced when WARNINGS is set to YES. +# The default value is: NO. + +EXTRACT_ALL = NO + +# If the EXTRACT_PRIVATE tag is set to YES, all private members of a class will +# be included in the documentation. +# The default value is: NO. + +EXTRACT_PRIVATE = NO + +# If the EXTRACT_PRIV_VIRTUAL tag is set to YES, documented private virtual +# methods of a class will be included in the documentation. +# The default value is: NO. + +EXTRACT_PRIV_VIRTUAL = NO + +# If the EXTRACT_PACKAGE tag is set to YES, all members with package or internal +# scope will be included in the documentation. +# The default value is: NO. + +EXTRACT_PACKAGE = NO + +# If the EXTRACT_STATIC tag is set to YES, all static members of a file will be +# included in the documentation. +# The default value is: NO. + +EXTRACT_STATIC = NO + +# If the EXTRACT_LOCAL_CLASSES tag is set to YES, classes (and structs) defined +# locally in source files will be included in the documentation. If set to NO, +# only classes defined in header files are included. Does not have any effect +# for Java sources. +# The default value is: YES. + +EXTRACT_LOCAL_CLASSES = YES + +# This flag is only useful for Objective-C code. If set to YES, local methods, +# which are defined in the implementation section but not in the interface are +# included in the documentation. If set to NO, only methods in the interface are +# included. +# The default value is: NO. + +EXTRACT_LOCAL_METHODS = NO + +# If this flag is set to YES, the members of anonymous namespaces will be +# extracted and appear in the documentation as a namespace called +# 'anonymous_namespace{file}', where file will be replaced with the base name of +# the file that contains the anonymous namespace. By default anonymous namespace +# are hidden. +# The default value is: NO. + +EXTRACT_ANON_NSPACES = NO + +# If the HIDE_UNDOC_MEMBERS tag is set to YES, doxygen will hide all +# undocumented members inside documented classes or files. If set to NO these +# members will be included in the various overviews, but no documentation +# section is generated. This option has no effect if EXTRACT_ALL is enabled. +# The default value is: NO. + +HIDE_UNDOC_MEMBERS = NO + +# If the HIDE_UNDOC_CLASSES tag is set to YES, doxygen will hide all +# undocumented classes that are normally visible in the class hierarchy. If set +# to NO, these classes will be included in the various overviews. This option +# has no effect if EXTRACT_ALL is enabled. +# The default value is: NO. + +HIDE_UNDOC_CLASSES = NO + +# If the HIDE_FRIEND_COMPOUNDS tag is set to YES, doxygen will hide all friend +# declarations. If set to NO, these declarations will be included in the +# documentation. +# The default value is: NO. + +HIDE_FRIEND_COMPOUNDS = NO + +# If the HIDE_IN_BODY_DOCS tag is set to YES, doxygen will hide any +# documentation blocks found inside the body of a function. If set to NO, these +# blocks will be appended to the function's detailed documentation block. +# The default value is: NO. + +HIDE_IN_BODY_DOCS = NO + +# The INTERNAL_DOCS tag determines if documentation that is typed after a +# \internal command is included. If the tag is set to NO then the documentation +# will be excluded. Set it to YES to include the internal documentation. +# The default value is: NO. + +INTERNAL_DOCS = NO + +# If the CASE_SENSE_NAMES tag is set to NO then doxygen will only generate file +# names in lower-case letters. If set to YES, upper-case letters are also +# allowed. This is useful if you have classes or files whose names only differ +# in case and if your file system supports case sensitive file names. Windows +# (including Cygwin) ands Mac users are advised to set this option to NO. +# The default value is: system dependent. + +CASE_SENSE_NAMES = YES + +# If the HIDE_SCOPE_NAMES tag is set to NO then doxygen will show members with +# their full class and namespace scopes in the documentation. If set to YES, the +# scope will be hidden. +# The default value is: NO. + +HIDE_SCOPE_NAMES = NO + +# If the HIDE_COMPOUND_REFERENCE tag is set to NO (default) then doxygen will +# append additional text to a page's title, such as Class Reference. If set to +# YES the compound reference will be hidden. +# The default value is: NO. + +HIDE_COMPOUND_REFERENCE= NO + +# If the SHOW_INCLUDE_FILES tag is set to YES then doxygen will put a list of +# the files that are included by a file in the documentation of that file. +# The default value is: YES. + +SHOW_INCLUDE_FILES = YES + +# If the SHOW_GROUPED_MEMB_INC tag is set to YES then Doxygen will add for each +# grouped member an include statement to the documentation, telling the reader +# which file to include in order to use the member. +# The default value is: NO. + +SHOW_GROUPED_MEMB_INC = NO + +# If the FORCE_LOCAL_INCLUDES tag is set to YES then doxygen will list include +# files with double quotes in the documentation rather than with sharp brackets. +# The default value is: NO. + +FORCE_LOCAL_INCLUDES = NO + +# If the INLINE_INFO tag is set to YES then a tag [inline] is inserted in the +# documentation for inline members. +# The default value is: YES. + +INLINE_INFO = YES + +# If the SORT_MEMBER_DOCS tag is set to YES then doxygen will sort the +# (detailed) documentation of file and class members alphabetically by member +# name. If set to NO, the members will appear in declaration order. +# The default value is: YES. + +SORT_MEMBER_DOCS = YES + +# If the SORT_BRIEF_DOCS tag is set to YES then doxygen will sort the brief +# descriptions of file, namespace and class members alphabetically by member +# name. If set to NO, the members will appear in declaration order. Note that +# this will also influence the order of the classes in the class list. +# The default value is: NO. + +SORT_BRIEF_DOCS = NO + +# If the SORT_MEMBERS_CTORS_1ST tag is set to YES then doxygen will sort the +# (brief and detailed) documentation of class members so that constructors and +# destructors are listed first. If set to NO the constructors will appear in the +# respective orders defined by SORT_BRIEF_DOCS and SORT_MEMBER_DOCS. +# Note: If SORT_BRIEF_DOCS is set to NO this option is ignored for sorting brief +# member documentation. +# Note: If SORT_MEMBER_DOCS is set to NO this option is ignored for sorting +# detailed member documentation. +# The default value is: NO. + +SORT_MEMBERS_CTORS_1ST = NO + +# If the SORT_GROUP_NAMES tag is set to YES then doxygen will sort the hierarchy +# of group names into alphabetical order. If set to NO the group names will +# appear in their defined order. +# The default value is: NO. + +SORT_GROUP_NAMES = NO + +# If the SORT_BY_SCOPE_NAME tag is set to YES, the class list will be sorted by +# fully-qualified names, including namespaces. If set to NO, the class list will +# be sorted only by class name, not including the namespace part. +# Note: This option is not very useful if HIDE_SCOPE_NAMES is set to YES. +# Note: This option applies only to the class list, not to the alphabetical +# list. +# The default value is: NO. + +SORT_BY_SCOPE_NAME = NO + +# If the STRICT_PROTO_MATCHING option is enabled and doxygen fails to do proper +# type resolution of all parameters of a function it will reject a match between +# the prototype and the implementation of a member function even if there is +# only one candidate or it is obvious which candidate to choose by doing a +# simple string match. By disabling STRICT_PROTO_MATCHING doxygen will still +# accept a match between prototype and implementation in such cases. +# The default value is: NO. + +STRICT_PROTO_MATCHING = NO + +# The GENERATE_TODOLIST tag can be used to enable (YES) or disable (NO) the todo +# list. This list is created by putting \todo commands in the documentation. +# The default value is: YES. + +GENERATE_TODOLIST = YES + +# The GENERATE_TESTLIST tag can be used to enable (YES) or disable (NO) the test +# list. This list is created by putting \test commands in the documentation. +# The default value is: YES. + +GENERATE_TESTLIST = YES + +# The GENERATE_BUGLIST tag can be used to enable (YES) or disable (NO) the bug +# list. This list is created by putting \bug commands in the documentation. +# The default value is: YES. + +GENERATE_BUGLIST = YES + +# The GENERATE_DEPRECATEDLIST tag can be used to enable (YES) or disable (NO) +# the deprecated list. This list is created by putting \deprecated commands in +# the documentation. +# The default value is: YES. + +GENERATE_DEPRECATEDLIST= YES + +# The ENABLED_SECTIONS tag can be used to enable conditional documentation +# sections, marked by \if <section_label> ... \endif and \cond <section_label> +# ... \endcond blocks. + +ENABLED_SECTIONS = + +# The MAX_INITIALIZER_LINES tag determines the maximum number of lines that the +# initial value of a variable or macro / define can have for it to appear in the +# documentation. If the initializer consists of more lines than specified here +# it will be hidden. Use a value of 0 to hide initializers completely. The +# appearance of the value of individual variables and macros / defines can be +# controlled using \showinitializer or \hideinitializer command in the +# documentation regardless of this setting. +# Minimum value: 0, maximum value: 10000, default value: 30. + +MAX_INITIALIZER_LINES = 30 + +# Set the SHOW_USED_FILES tag to NO to disable the list of files generated at +# the bottom of the documentation of classes and structs. If set to YES, the +# list will mention the files that were used to generate the documentation. +# The default value is: YES. + +SHOW_USED_FILES = YES + +# Set the SHOW_FILES tag to NO to disable the generation of the Files page. This +# will remove the Files entry from the Quick Index and from the Folder Tree View +# (if specified). +# The default value is: YES. + +SHOW_FILES = YES + +# Set the SHOW_NAMESPACES tag to NO to disable the generation of the Namespaces +# page. This will remove the Namespaces entry from the Quick Index and from the +# Folder Tree View (if specified). +# The default value is: YES. + +SHOW_NAMESPACES = YES + +# The FILE_VERSION_FILTER tag can be used to specify a program or script that +# doxygen should invoke to get the current version for each file (typically from +# the version control system). Doxygen will invoke the program by executing (via +# popen()) the command command input-file, where command is the value of the +# FILE_VERSION_FILTER tag, and input-file is the name of an input file provided +# by doxygen. Whatever the program writes to standard output is used as the file +# version. For an example see the documentation. + +FILE_VERSION_FILTER = + +# The LAYOUT_FILE tag can be used to specify a layout file which will be parsed +# by doxygen. The layout file controls the global structure of the generated +# output files in an output format independent way. To create the layout file +# that represents doxygen's defaults, run doxygen with the -l option. You can +# optionally specify a file name after the option, if omitted DoxygenLayout.xml +# will be used as the name of the layout file. +# +# Note that if you run doxygen from a directory containing a file called +# DoxygenLayout.xml, doxygen will parse it automatically even if the LAYOUT_FILE +# tag is left empty. + +LAYOUT_FILE = + +# The CITE_BIB_FILES tag can be used to specify one or more bib files containing +# the reference definitions. This must be a list of .bib files. The .bib +# extension is automatically appended if omitted. This requires the bibtex tool +# to be installed. See also https://en.wikipedia.org/wiki/BibTeX for more info. +# For LaTeX the style of the bibliography can be controlled using +# LATEX_BIB_STYLE. To use this feature you need bibtex and perl available in the +# search path. See also \cite for info how to create references. + +CITE_BIB_FILES = + +#--------------------------------------------------------------------------- +# Configuration options related to warning and progress messages +#--------------------------------------------------------------------------- + +# The QUIET tag can be used to turn on/off the messages that are generated to +# standard output by doxygen. If QUIET is set to YES this implies that the +# messages are off. +# The default value is: NO. + +QUIET = NO + +# The WARNINGS tag can be used to turn on/off the warning messages that are +# generated to standard error (stderr) by doxygen. If WARNINGS is set to YES +# this implies that the warnings are on. +# +# Tip: Turn warnings on while writing the documentation. +# The default value is: YES. + +WARNINGS = YES + +# If the WARN_IF_UNDOCUMENTED tag is set to YES then doxygen will generate +# warnings for undocumented members. If EXTRACT_ALL is set to YES then this flag +# will automatically be disabled. +# The default value is: YES. + +WARN_IF_UNDOCUMENTED = YES + +# If the WARN_IF_DOC_ERROR tag is set to YES, doxygen will generate warnings for +# potential errors in the documentation, such as not documenting some parameters +# in a documented function, or documenting parameters that don't exist or using +# markup commands wrongly. +# The default value is: YES. + +WARN_IF_DOC_ERROR = YES + +# This WARN_NO_PARAMDOC option can be enabled to get warnings for functions that +# are documented, but have no documentation for their parameters or return +# value. If set to NO, doxygen will only warn about wrong or incomplete +# parameter documentation, but not about the absence of documentation. If +# EXTRACT_ALL is set to YES then this flag will automatically be disabled. +# The default value is: NO. + +WARN_NO_PARAMDOC = NO + +# If the WARN_AS_ERROR tag is set to YES then doxygen will immediately stop when +# a warning is encountered. +# The default value is: NO. + +WARN_AS_ERROR = NO + +# The WARN_FORMAT tag determines the format of the warning messages that doxygen +# can produce. The string should contain the $file, $line, and $text tags, which +# will be replaced by the file and line number from which the warning originated +# and the warning text. Optionally the format may contain $version, which will +# be replaced by the version of the file (if it could be obtained via +# FILE_VERSION_FILTER) +# The default value is: $file:$line: $text. + +WARN_FORMAT = "$file:$line: $text" + +# The WARN_LOGFILE tag can be used to specify a file to which warning and error +# messages should be written. If left blank the output is written to standard +# error (stderr). + +WARN_LOGFILE = + +#--------------------------------------------------------------------------- +# Configuration options related to the input files +#--------------------------------------------------------------------------- + +# The INPUT tag is used to specify the files and/or directories that contain +# documented source files. You may enter file names like myfile.cpp or +# directories like /usr/src/myproject. Separate the files or directories with +# spaces. See also FILE_PATTERNS and EXTENSION_MAPPING +# Note: If this tag is empty the current directory is searched. + +INPUT = "@INPUT@" + +# This tag can be used to specify the character encoding of the source files +# that doxygen parses. Internally doxygen uses the UTF-8 encoding. Doxygen uses +# libiconv (or the iconv built into libc) for the transcoding. See the libiconv +# documentation (see: https://www.gnu.org/software/libiconv/) for the list of +# possible encodings. +# The default value is: UTF-8. + +INPUT_ENCODING = UTF-8 + +# If the value of the INPUT tag contains directories, you can use the +# FILE_PATTERNS tag to specify one or more wildcard patterns (like *.cpp and +# *.h) to filter out the source-files in the directories. +# +# Note that for custom extensions or not directly supported extensions you also +# need to set EXTENSION_MAPPING for the extension otherwise the files are not +# read by doxygen. +# +# If left blank the following patterns are tested:*.c, *.cc, *.cxx, *.cpp, +# *.c++, *.java, *.ii, *.ixx, *.ipp, *.i++, *.inl, *.idl, *.ddl, *.odl, *.h, +# *.hh, *.hxx, *.hpp, *.h++, *.cs, *.d, *.php, *.php4, *.php5, *.phtml, *.inc, +# *.m, *.markdown, *.md, *.mm, *.dox (to be provided as doxygen C comment), +# *.doc (to be provided as doxygen C comment), *.txt (to be provided as doxygen +# C comment), *.py, *.pyw, *.f90, *.f95, *.f03, *.f08, *.f, *.for, *.tcl, *.vhd, +# *.vhdl, *.ucf, *.qsf and *.ice. + +FILE_PATTERNS = "@FILE_PATTERN@" + +# The RECURSIVE tag can be used to specify whether or not subdirectories should +# be searched for input files as well. +# The default value is: NO. + +RECURSIVE = "@IS_RECURSIVE@" + +# The EXCLUDE tag can be used to specify files and/or directories that should be +# excluded from the INPUT source files. This way you can easily exclude a +# subdirectory from a directory tree whose root is specified with the INPUT tag. +# +# Note that relative paths are relative to the directory from which doxygen is +# run. + +EXCLUDE = + +# The EXCLUDE_SYMLINKS tag can be used to select whether or not files or +# directories that are symbolic links (a Unix file system feature) are excluded +# from the input. +# The default value is: NO. + +EXCLUDE_SYMLINKS = NO + +# If the value of the INPUT tag contains directories, you can use the +# EXCLUDE_PATTERNS tag to specify one or more wildcard patterns to exclude +# certain files from those directories. +# +# Note that the wildcards are matched against the file with absolute path, so to +# exclude all test directories for example use the pattern */test/* + +EXCLUDE_PATTERNS = + +# The EXCLUDE_SYMBOLS tag can be used to specify one or more symbol names +# (namespaces, classes, functions, etc.) that should be excluded from the +# output. The symbol name can be a fully qualified name, a word, or if the +# wildcard * is used, a substring. Examples: ANamespace, AClass, +# AClass::ANamespace, ANamespace::*Test +# +# Note that the wildcards are matched against the file with absolute path, so to +# exclude all test directories use the pattern */test/* + +EXCLUDE_SYMBOLS = + +# The EXAMPLE_PATH tag can be used to specify one or more files or directories +# that contain example code fragments that are included (see the \include +# command). + +EXAMPLE_PATH = + +# If the value of the EXAMPLE_PATH tag contains directories, you can use the +# EXAMPLE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp and +# *.h) to filter out the source-files in the directories. If left blank all +# files are included. + +EXAMPLE_PATTERNS = * + +# If the EXAMPLE_RECURSIVE tag is set to YES then subdirectories will be +# searched for input files to be used with the \include or \dontinclude commands +# irrespective of the value of the RECURSIVE tag. +# The default value is: NO. + +EXAMPLE_RECURSIVE = NO + +# The IMAGE_PATH tag can be used to specify one or more files or directories +# that contain images that are to be included in the documentation (see the +# \image command). + +IMAGE_PATH = + +# The INPUT_FILTER tag can be used to specify a program that doxygen should +# invoke to filter for each input file. Doxygen will invoke the filter program +# by executing (via popen()) the command: +# +# <filter> <input-file> +# +# where <filter> is the value of the INPUT_FILTER tag, and <input-file> is the +# name of an input file. Doxygen will then use the output that the filter +# program writes to standard output. If FILTER_PATTERNS is specified, this tag +# will be ignored. +# +# Note that the filter must not add or remove lines; it is applied before the +# code is scanned, but not when the output code is generated. If lines are added +# or removed, the anchors will not be placed correctly. +# +# Note that for custom extensions or not directly supported extensions you also +# need to set EXTENSION_MAPPING for the extension otherwise the files are not +# properly processed by doxygen. + +INPUT_FILTER = + +# The FILTER_PATTERNS tag can be used to specify filters on a per file pattern +# basis. Doxygen will compare the file name with each pattern and apply the +# filter if there is a match. The filters are a list of the form: pattern=filter +# (like *.cpp=my_cpp_filter). See INPUT_FILTER for further information on how +# filters are used. If the FILTER_PATTERNS tag is empty or if none of the +# patterns match the file name, INPUT_FILTER is applied. +# +# Note that for custom extensions or not directly supported extensions you also +# need to set EXTENSION_MAPPING for the extension otherwise the files are not +# properly processed by doxygen. + +FILTER_PATTERNS = + +# If the FILTER_SOURCE_FILES tag is set to YES, the input filter (if set using +# INPUT_FILTER) will also be used to filter the input files that are used for +# producing the source files to browse (i.e. when SOURCE_BROWSER is set to YES). +# The default value is: NO. + +FILTER_SOURCE_FILES = NO + +# The FILTER_SOURCE_PATTERNS tag can be used to specify source filters per file +# pattern. A pattern will override the setting for FILTER_PATTERN (if any) and +# it is also possible to disable source filtering for a specific pattern using +# *.ext= (so without naming a filter). +# This tag requires that the tag FILTER_SOURCE_FILES is set to YES. + +FILTER_SOURCE_PATTERNS = + +# If the USE_MDFILE_AS_MAINPAGE tag refers to the name of a markdown file that +# is part of the input, its contents will be placed on the main page +# (index.html). This can be useful if you have a project on for instance GitHub +# and want to reuse the introduction page also for the doxygen output. + +USE_MDFILE_AS_MAINPAGE = + +#--------------------------------------------------------------------------- +# Configuration options related to source browsing +#--------------------------------------------------------------------------- + +# If the SOURCE_BROWSER tag is set to YES then a list of source files will be +# generated. Documented entities will be cross-referenced with these sources. +# +# Note: To get rid of all source code in the generated output, make sure that +# also VERBATIM_HEADERS is set to NO. +# The default value is: NO. + +SOURCE_BROWSER = NO + +# Setting the INLINE_SOURCES tag to YES will include the body of functions, +# classes and enums directly into the documentation. +# The default value is: NO. + +INLINE_SOURCES = NO + +# Setting the STRIP_CODE_COMMENTS tag to YES will instruct doxygen to hide any +# special comment blocks from generated source code fragments. Normal C, C++ and +# Fortran comments will always remain visible. +# The default value is: YES. + +STRIP_CODE_COMMENTS = YES + +# If the REFERENCED_BY_RELATION tag is set to YES then for each documented +# entity all documented functions referencing it will be listed. +# The default value is: NO. + +REFERENCED_BY_RELATION = NO + +# If the REFERENCES_RELATION tag is set to YES then for each documented function +# all documented entities called/used by that function will be listed. +# The default value is: NO. + +REFERENCES_RELATION = NO + +# If the REFERENCES_LINK_SOURCE tag is set to YES and SOURCE_BROWSER tag is set +# to YES then the hyperlinks from functions in REFERENCES_RELATION and +# REFERENCED_BY_RELATION lists will link to the source code. Otherwise they will +# link to the documentation. +# The default value is: YES. + +REFERENCES_LINK_SOURCE = YES + +# If SOURCE_TOOLTIPS is enabled (the default) then hovering a hyperlink in the +# source code will show a tooltip with additional information such as prototype, +# brief description and links to the definition and documentation. Since this +# will make the HTML file larger and loading of large files a bit slower, you +# can opt to disable this feature. +# The default value is: YES. +# This tag requires that the tag SOURCE_BROWSER is set to YES. + +SOURCE_TOOLTIPS = YES + +# If the USE_HTAGS tag is set to YES then the references to source code will +# point to the HTML generated by the htags(1) tool instead of doxygen built-in +# source browser. The htags tool is part of GNU's global source tagging system +# (see https://www.gnu.org/software/global/global.html). You will need version +# 4.8.6 or higher. +# +# To use it do the following: +# - Install the latest version of global +# - Enable SOURCE_BROWSER and USE_HTAGS in the configuration file +# - Make sure the INPUT points to the root of the source tree +# - Run doxygen as normal +# +# Doxygen will invoke htags (and that will in turn invoke gtags), so these +# tools must be available from the command line (i.e. in the search path). +# +# The result: instead of the source browser generated by doxygen, the links to +# source code will now point to the output of htags. +# The default value is: NO. +# This tag requires that the tag SOURCE_BROWSER is set to YES. + +USE_HTAGS = NO + +# If the VERBATIM_HEADERS tag is set the YES then doxygen will generate a +# verbatim copy of the header file for each class for which an include is +# specified. Set to NO to disable this. +# See also: Section \class. +# The default value is: YES. + +VERBATIM_HEADERS = "@VERBATIM_HEADERS@" + +# If the CLANG_ASSISTED_PARSING tag is set to YES then doxygen will use the +# clang parser (see: http://clang.llvm.org/) for more accurate parsing at the +# cost of reduced performance. This can be particularly helpful with template +# rich C++ code for which doxygen's built-in parser lacks the necessary type +# information. +# Note: The availability of this option depends on whether or not doxygen was +# generated with the -Duse_libclang=ON option for CMake. +# The default value is: NO. + +CLANG_ASSISTED_PARSING = NO + +# If clang assisted parsing is enabled you can provide the compiler with command +# line options that you would normally use when invoking the compiler. Note that +# the include paths will already be set by doxygen for the files and directories +# specified with INPUT and INCLUDE_PATH. +# This tag requires that the tag CLANG_ASSISTED_PARSING is set to YES. + +CLANG_OPTIONS = + +# If clang assisted parsing is enabled you can provide the clang parser with the +# path to the compilation database (see: +# http://clang.llvm.org/docs/HowToSetupToolingForLLVM.html) used when the files +# were built. This is equivalent to specifying the "-p" option to a clang tool, +# such as clang-check. These options will then be passed to the parser. +# Note: The availability of this option depends on whether or not doxygen was +# generated with the -Duse_libclang=ON option for CMake. + +CLANG_DATABASE_PATH = + +#--------------------------------------------------------------------------- +# Configuration options related to the alphabetical class index +#--------------------------------------------------------------------------- + +# If the ALPHABETICAL_INDEX tag is set to YES, an alphabetical index of all +# compounds will be generated. Enable this if the project contains a lot of +# classes, structs, unions or interfaces. +# The default value is: YES. + +ALPHABETICAL_INDEX = YES + +# The COLS_IN_ALPHA_INDEX tag can be used to specify the number of columns in +# which the alphabetical index list will be split. +# Minimum value: 1, maximum value: 20, default value: 5. +# This tag requires that the tag ALPHABETICAL_INDEX is set to YES. + +COLS_IN_ALPHA_INDEX = 5 + +# In case all classes in a project start with a common prefix, all classes will +# be put under the same header in the alphabetical index. The IGNORE_PREFIX tag +# can be used to specify a prefix (or a list of prefixes) that should be ignored +# while generating the index headers. +# This tag requires that the tag ALPHABETICAL_INDEX is set to YES. + +IGNORE_PREFIX = + +#--------------------------------------------------------------------------- +# Configuration options related to the HTML output +#--------------------------------------------------------------------------- + +# If the GENERATE_HTML tag is set to YES, doxygen will generate HTML output +# The default value is: YES. + +GENERATE_HTML = "@GENERATE_HTML@" + +# The HTML_OUTPUT tag is used to specify where the HTML docs will be put. If a +# relative path is entered the value of OUTPUT_DIRECTORY will be put in front of +# it. +# The default directory is: html. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_OUTPUT = html + +# The HTML_FILE_EXTENSION tag can be used to specify the file extension for each +# generated HTML page (for example: .htm, .php, .asp). +# The default value is: .html. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_FILE_EXTENSION = .html + +# The HTML_HEADER tag can be used to specify a user-defined HTML header file for +# each generated HTML page. If the tag is left blank doxygen will generate a +# standard header. +# +# To get valid HTML the header file that includes any scripts and style sheets +# that doxygen needs, which is dependent on the configuration options used (e.g. +# the setting GENERATE_TREEVIEW). It is highly recommended to start with a +# default header using +# doxygen -w html new_header.html new_footer.html new_stylesheet.css +# YourConfigFile +# and then modify the file new_header.html. See also section "Doxygen usage" +# for information on how to generate the default header that doxygen normally +# uses. +# Note: The header is subject to change so you typically have to regenerate the +# default header when upgrading to a newer version of doxygen. For a description +# of the possible markers and block names see the documentation. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_HEADER = + +# The HTML_FOOTER tag can be used to specify a user-defined HTML footer for each +# generated HTML page. If the tag is left blank doxygen will generate a standard +# footer. See HTML_HEADER for more information on how to generate a default +# footer and what special commands can be used inside the footer. See also +# section "Doxygen usage" for information on how to generate the default footer +# that doxygen normally uses. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_FOOTER = + +# The HTML_STYLESHEET tag can be used to specify a user-defined cascading style +# sheet that is used by each HTML page. It can be used to fine-tune the look of +# the HTML output. If left blank doxygen will generate a default style sheet. +# See also section "Doxygen usage" for information on how to generate the style +# sheet that doxygen normally uses. +# Note: It is recommended to use HTML_EXTRA_STYLESHEET instead of this tag, as +# it is more robust and this tag (HTML_STYLESHEET) will in the future become +# obsolete. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_STYLESHEET = + +# The HTML_EXTRA_STYLESHEET tag can be used to specify additional user-defined +# cascading style sheets that are included after the standard style sheets +# created by doxygen. Using this option one can overrule certain style aspects. +# This is preferred over using HTML_STYLESHEET since it does not replace the +# standard style sheet and is therefore more robust against future updates. +# Doxygen will copy the style sheet files to the output directory. +# Note: The order of the extra style sheet files is of importance (e.g. the last +# style sheet in the list overrules the setting of the previous ones in the +# list). For an example see the documentation. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_EXTRA_STYLESHEET = + +# The HTML_EXTRA_FILES tag can be used to specify one or more extra images or +# other source files which should be copied to the HTML output directory. Note +# that these files will be copied to the base HTML output directory. Use the +# $relpath^ marker in the HTML_HEADER and/or HTML_FOOTER files to load these +# files. In the HTML_STYLESHEET file, use the file name only. Also note that the +# files will be copied as-is; there are no commands or markers available. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_EXTRA_FILES = + +# The HTML_COLORSTYLE_HUE tag controls the color of the HTML output. Doxygen +# will adjust the colors in the style sheet and background images according to +# this color. Hue is specified as an angle on a colorwheel, see +# https://en.wikipedia.org/wiki/Hue for more information. For instance the value +# 0 represents red, 60 is yellow, 120 is green, 180 is cyan, 240 is blue, 300 +# purple, and 360 is red again. +# Minimum value: 0, maximum value: 359, default value: 220. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_COLORSTYLE_HUE = 220 + +# The HTML_COLORSTYLE_SAT tag controls the purity (or saturation) of the colors +# in the HTML output. For a value of 0 the output will use grayscales only. A +# value of 255 will produce the most vivid colors. +# Minimum value: 0, maximum value: 255, default value: 100. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_COLORSTYLE_SAT = 100 + +# The HTML_COLORSTYLE_GAMMA tag controls the gamma correction applied to the +# luminance component of the colors in the HTML output. Values below 100 +# gradually make the output lighter, whereas values above 100 make the output +# darker. The value divided by 100 is the actual gamma applied, so 80 represents +# a gamma of 0.8, The value 220 represents a gamma of 2.2, and 100 does not +# change the gamma. +# Minimum value: 40, maximum value: 240, default value: 80. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_COLORSTYLE_GAMMA = 80 + +# If the HTML_TIMESTAMP tag is set to YES then the footer of each generated HTML +# page will contain the date and time when the page was generated. Setting this +# to YES can help to show when doxygen was last run and thus if the +# documentation is up to date. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_TIMESTAMP = NO + +# If the HTML_DYNAMIC_MENUS tag is set to YES then the generated HTML +# documentation will contain a main index with vertical navigation menus that +# are dynamically created via JavaScript. If disabled, the navigation index will +# consists of multiple levels of tabs that are statically embedded in every HTML +# page. Disable this option to support browsers that do not have JavaScript, +# like the Qt help browser. +# The default value is: YES. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_DYNAMIC_MENUS = YES + +# If the HTML_DYNAMIC_SECTIONS tag is set to YES then the generated HTML +# documentation will contain sections that can be hidden and shown after the +# page has loaded. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_DYNAMIC_SECTIONS = NO + +# With HTML_INDEX_NUM_ENTRIES one can control the preferred number of entries +# shown in the various tree structured indices initially; the user can expand +# and collapse entries dynamically later on. Doxygen will expand the tree to +# such a level that at most the specified number of entries are visible (unless +# a fully collapsed tree already exceeds this amount). So setting the number of +# entries 1 will produce a full collapsed tree by default. 0 is a special value +# representing an infinite number of entries and will result in a full expanded +# tree by default. +# Minimum value: 0, maximum value: 9999, default value: 100. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_INDEX_NUM_ENTRIES = 100 + +# If the GENERATE_DOCSET tag is set to YES, additional index files will be +# generated that can be used as input for Apple's Xcode 3 integrated development +# environment (see: https://developer.apple.com/xcode/), introduced with OSX +# 10.5 (Leopard). To create a documentation set, doxygen will generate a +# Makefile in the HTML output directory. Running make will produce the docset in +# that directory and running make install will install the docset in +# ~/Library/Developer/Shared/Documentation/DocSets so that Xcode will find it at +# startup. See https://developer.apple.com/library/archive/featuredarticles/Doxy +# genXcode/_index.html for more information. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +GENERATE_DOCSET = NO + +# This tag determines the name of the docset feed. A documentation feed provides +# an umbrella under which multiple documentation sets from a single provider +# (such as a company or product suite) can be grouped. +# The default value is: Doxygen generated docs. +# This tag requires that the tag GENERATE_DOCSET is set to YES. + +DOCSET_FEEDNAME = "Doxygen generated docs" + +# This tag specifies a string that should uniquely identify the documentation +# set bundle. This should be a reverse domain-name style string, e.g. +# com.mycompany.MyDocSet. Doxygen will append .docset to the name. +# The default value is: org.doxygen.Project. +# This tag requires that the tag GENERATE_DOCSET is set to YES. + +DOCSET_BUNDLE_ID = org.doxygen.Project + +# The DOCSET_PUBLISHER_ID tag specifies a string that should uniquely identify +# the documentation publisher. This should be a reverse domain-name style +# string, e.g. com.mycompany.MyDocSet.documentation. +# The default value is: org.doxygen.Publisher. +# This tag requires that the tag GENERATE_DOCSET is set to YES. + +DOCSET_PUBLISHER_ID = org.doxygen.Publisher + +# The DOCSET_PUBLISHER_NAME tag identifies the documentation publisher. +# The default value is: Publisher. +# This tag requires that the tag GENERATE_DOCSET is set to YES. + +DOCSET_PUBLISHER_NAME = Publisher + +# If the GENERATE_HTMLHELP tag is set to YES then doxygen generates three +# additional HTML index files: index.hhp, index.hhc, and index.hhk. The +# index.hhp is a project file that can be read by Microsoft's HTML Help Workshop +# (see: https://www.microsoft.com/en-us/download/details.aspx?id=21138) on +# Windows. +# +# The HTML Help Workshop contains a compiler that can convert all HTML output +# generated by doxygen into a single compiled HTML file (.chm). Compiled HTML +# files are now used as the Windows 98 help format, and will replace the old +# Windows help format (.hlp) on all Windows platforms in the future. Compressed +# HTML files also contain an index, a table of contents, and you can search for +# words in the documentation. The HTML workshop also contains a viewer for +# compressed HTML files. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +GENERATE_HTMLHELP = NO + +# The CHM_FILE tag can be used to specify the file name of the resulting .chm +# file. You can add a path in front of the file if the result should not be +# written to the html output directory. +# This tag requires that the tag GENERATE_HTMLHELP is set to YES. + +CHM_FILE = + +# The HHC_LOCATION tag can be used to specify the location (absolute path +# including file name) of the HTML help compiler (hhc.exe). If non-empty, +# doxygen will try to run the HTML help compiler on the generated index.hhp. +# The file has to be specified with full path. +# This tag requires that the tag GENERATE_HTMLHELP is set to YES. + +HHC_LOCATION = + +# The GENERATE_CHI flag controls if a separate .chi index file is generated +# (YES) or that it should be included in the master .chm file (NO). +# The default value is: NO. +# This tag requires that the tag GENERATE_HTMLHELP is set to YES. + +GENERATE_CHI = NO + +# The CHM_INDEX_ENCODING is used to encode HtmlHelp index (hhk), content (hhc) +# and project file content. +# This tag requires that the tag GENERATE_HTMLHELP is set to YES. + +CHM_INDEX_ENCODING = + +# The BINARY_TOC flag controls whether a binary table of contents is generated +# (YES) or a normal table of contents (NO) in the .chm file. Furthermore it +# enables the Previous and Next buttons. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTMLHELP is set to YES. + +BINARY_TOC = NO + +# The TOC_EXPAND flag can be set to YES to add extra items for group members to +# the table of contents of the HTML help documentation and to the tree view. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTMLHELP is set to YES. + +TOC_EXPAND = NO + +# If the GENERATE_QHP tag is set to YES and both QHP_NAMESPACE and +# QHP_VIRTUAL_FOLDER are set, an additional index file will be generated that +# can be used as input for Qt's qhelpgenerator to generate a Qt Compressed Help +# (.qch) of the generated HTML documentation. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +GENERATE_QHP = NO + +# If the QHG_LOCATION tag is specified, the QCH_FILE tag can be used to specify +# the file name of the resulting .qch file. The path specified is relative to +# the HTML output folder. +# This tag requires that the tag GENERATE_QHP is set to YES. + +QCH_FILE = + +# The QHP_NAMESPACE tag specifies the namespace to use when generating Qt Help +# Project output. For more information please see Qt Help Project / Namespace +# (see: https://doc.qt.io/archives/qt-4.8/qthelpproject.html#namespace). +# The default value is: org.doxygen.Project. +# This tag requires that the tag GENERATE_QHP is set to YES. + +QHP_NAMESPACE = org.doxygen.Project + +# The QHP_VIRTUAL_FOLDER tag specifies the namespace to use when generating Qt +# Help Project output. For more information please see Qt Help Project / Virtual +# Folders (see: https://doc.qt.io/archives/qt-4.8/qthelpproject.html#virtual- +# folders). +# The default value is: doc. +# This tag requires that the tag GENERATE_QHP is set to YES. + +QHP_VIRTUAL_FOLDER = doc + +# If the QHP_CUST_FILTER_NAME tag is set, it specifies the name of a custom +# filter to add. For more information please see Qt Help Project / Custom +# Filters (see: https://doc.qt.io/archives/qt-4.8/qthelpproject.html#custom- +# filters). +# This tag requires that the tag GENERATE_QHP is set to YES. + +QHP_CUST_FILTER_NAME = + +# The QHP_CUST_FILTER_ATTRS tag specifies the list of the attributes of the +# custom filter to add. For more information please see Qt Help Project / Custom +# Filters (see: https://doc.qt.io/archives/qt-4.8/qthelpproject.html#custom- +# filters). +# This tag requires that the tag GENERATE_QHP is set to YES. + +QHP_CUST_FILTER_ATTRS = + +# The QHP_SECT_FILTER_ATTRS tag specifies the list of the attributes this +# project's filter section matches. Qt Help Project / Filter Attributes (see: +# https://doc.qt.io/archives/qt-4.8/qthelpproject.html#filter-attributes). +# This tag requires that the tag GENERATE_QHP is set to YES. + +QHP_SECT_FILTER_ATTRS = + +# The QHG_LOCATION tag can be used to specify the location of Qt's +# qhelpgenerator. If non-empty doxygen will try to run qhelpgenerator on the +# generated .qhp file. +# This tag requires that the tag GENERATE_QHP is set to YES. + +QHG_LOCATION = + +# If the GENERATE_ECLIPSEHELP tag is set to YES, additional index files will be +# generated, together with the HTML files, they form an Eclipse help plugin. To +# install this plugin and make it available under the help contents menu in +# Eclipse, the contents of the directory containing the HTML and XML files needs +# to be copied into the plugins directory of eclipse. The name of the directory +# within the plugins directory should be the same as the ECLIPSE_DOC_ID value. +# After copying Eclipse needs to be restarted before the help appears. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +GENERATE_ECLIPSEHELP = NO + +# A unique identifier for the Eclipse help plugin. When installing the plugin +# the directory name containing the HTML and XML files should also have this +# name. Each documentation set should have its own identifier. +# The default value is: org.doxygen.Project. +# This tag requires that the tag GENERATE_ECLIPSEHELP is set to YES. + +ECLIPSE_DOC_ID = org.doxygen.Project + +# If you want full control over the layout of the generated HTML pages it might +# be necessary to disable the index and replace it with your own. The +# DISABLE_INDEX tag can be used to turn on/off the condensed index (tabs) at top +# of each HTML page. A value of NO enables the index and the value YES disables +# it. Since the tabs in the index contain the same information as the navigation +# tree, you can set this option to YES if you also set GENERATE_TREEVIEW to YES. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +DISABLE_INDEX = NO + +# The GENERATE_TREEVIEW tag is used to specify whether a tree-like index +# structure should be generated to display hierarchical information. If the tag +# value is set to YES, a side panel will be generated containing a tree-like +# index structure (just like the one that is generated for HTML Help). For this +# to work a browser that supports JavaScript, DHTML, CSS and frames is required +# (i.e. any modern browser). Windows users are probably better off using the +# HTML help feature. Via custom style sheets (see HTML_EXTRA_STYLESHEET) one can +# further fine-tune the look of the index. As an example, the default style +# sheet generated by doxygen has an example that shows how to put an image at +# the root of the tree instead of the PROJECT_NAME. Since the tree basically has +# the same information as the tab index, you could consider setting +# DISABLE_INDEX to YES when enabling this option. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +GENERATE_TREEVIEW = NO + +# The ENUM_VALUES_PER_LINE tag can be used to set the number of enum values that +# doxygen will group on one line in the generated HTML documentation. +# +# Note that a value of 0 will completely suppress the enum values from appearing +# in the overview section. +# Minimum value: 0, maximum value: 20, default value: 4. +# This tag requires that the tag GENERATE_HTML is set to YES. + +ENUM_VALUES_PER_LINE = 4 + +# If the treeview is enabled (see GENERATE_TREEVIEW) then this tag can be used +# to set the initial width (in pixels) of the frame in which the tree is shown. +# Minimum value: 0, maximum value: 1500, default value: 250. +# This tag requires that the tag GENERATE_HTML is set to YES. + +TREEVIEW_WIDTH = 250 + +# If the EXT_LINKS_IN_WINDOW option is set to YES, doxygen will open links to +# external symbols imported via tag files in a separate window. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +EXT_LINKS_IN_WINDOW = NO + +# Use this tag to change the font size of LaTeX formulas included as images in +# the HTML documentation. When you change the font size after a successful +# doxygen run you need to manually remove any form_*.png images from the HTML +# output directory to force them to be regenerated. +# Minimum value: 8, maximum value: 50, default value: 10. +# This tag requires that the tag GENERATE_HTML is set to YES. + +FORMULA_FONTSIZE = 10 + +# Use the FORMULA_TRANSPARENT tag to determine whether or not the images +# generated for formulas are transparent PNGs. Transparent PNGs are not +# supported properly for IE 6.0, but are supported on all modern browsers. +# +# Note that when changing this option you need to delete any form_*.png files in +# the HTML output directory before the changes have effect. +# The default value is: YES. +# This tag requires that the tag GENERATE_HTML is set to YES. + +FORMULA_TRANSPARENT = YES + +# The FORMULA_MACROFILE can contain LaTeX \newcommand and \renewcommand commands +# to create new LaTeX commands to be used in formulas as building blocks. See +# the section "Including formulas" for details. + +FORMULA_MACROFILE = + +# Enable the USE_MATHJAX option to render LaTeX formulas using MathJax (see +# https://www.mathjax.org) which uses client side JavaScript for the rendering +# instead of using pre-rendered bitmaps. Use this if you do not have LaTeX +# installed or if you want to formulas look prettier in the HTML output. When +# enabled you may also need to install MathJax separately and configure the path +# to it using the MATHJAX_RELPATH option. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +USE_MATHJAX = NO + +# When MathJax is enabled you can set the default output format to be used for +# the MathJax output. See the MathJax site (see: +# http://docs.mathjax.org/en/latest/output.html) for more details. +# Possible values are: HTML-CSS (which is slower, but has the best +# compatibility), NativeMML (i.e. MathML) and SVG. +# The default value is: HTML-CSS. +# This tag requires that the tag USE_MATHJAX is set to YES. + +MATHJAX_FORMAT = HTML-CSS + +# When MathJax is enabled you need to specify the location relative to the HTML +# output directory using the MATHJAX_RELPATH option. The destination directory +# should contain the MathJax.js script. For instance, if the mathjax directory +# is located at the same level as the HTML output directory, then +# MATHJAX_RELPATH should be ../mathjax. The default value points to the MathJax +# Content Delivery Network so you can quickly see the result without installing +# MathJax. However, it is strongly recommended to install a local copy of +# MathJax from https://www.mathjax.org before deployment. +# The default value is: https://cdnjs.cloudflare.com/ajax/libs/mathjax/2.7.5/. +# This tag requires that the tag USE_MATHJAX is set to YES. + +MATHJAX_RELPATH = https://cdnjs.cloudflare.com/ajax/libs/mathjax/2.7.5/ + +# The MATHJAX_EXTENSIONS tag can be used to specify one or more MathJax +# extension names that should be enabled during MathJax rendering. For example +# MATHJAX_EXTENSIONS = TeX/AMSmath TeX/AMSsymbols +# This tag requires that the tag USE_MATHJAX is set to YES. + +MATHJAX_EXTENSIONS = + +# The MATHJAX_CODEFILE tag can be used to specify a file with javascript pieces +# of code that will be used on startup of the MathJax code. See the MathJax site +# (see: http://docs.mathjax.org/en/latest/output.html) for more details. For an +# example see the documentation. +# This tag requires that the tag USE_MATHJAX is set to YES. + +MATHJAX_CODEFILE = + +# When the SEARCHENGINE tag is enabled doxygen will generate a search box for +# the HTML output. The underlying search engine uses javascript and DHTML and +# should work on any modern browser. Note that when using HTML help +# (GENERATE_HTMLHELP), Qt help (GENERATE_QHP), or docsets (GENERATE_DOCSET) +# there is already a search function so this one should typically be disabled. +# For large projects the javascript based search engine can be slow, then +# enabling SERVER_BASED_SEARCH may provide a better solution. It is possible to +# search using the keyboard; to jump to the search box use <access key> + S +# (what the <access key> is depends on the OS and browser, but it is typically +# <CTRL>, <ALT>/<option>, or both). Inside the search box use the <cursor down +# key> to jump into the search results window, the results can be navigated +# using the <cursor keys>. Press <Enter> to select an item or <escape> to cancel +# the search. The filter options can be selected when the cursor is inside the +# search box by pressing <Shift>+<cursor down>. Also here use the <cursor keys> +# to select a filter and <Enter> or <escape> to activate or cancel the filter +# option. +# The default value is: YES. +# This tag requires that the tag GENERATE_HTML is set to YES. + +SEARCHENGINE = YES + +# When the SERVER_BASED_SEARCH tag is enabled the search engine will be +# implemented using a web server instead of a web client using JavaScript. There +# are two flavors of web server based searching depending on the EXTERNAL_SEARCH +# setting. When disabled, doxygen will generate a PHP script for searching and +# an index file used by the script. When EXTERNAL_SEARCH is enabled the indexing +# and searching needs to be provided by external tools. See the section +# "External Indexing and Searching" for details. +# The default value is: NO. +# This tag requires that the tag SEARCHENGINE is set to YES. + +SERVER_BASED_SEARCH = NO + +# When EXTERNAL_SEARCH tag is enabled doxygen will no longer generate the PHP +# script for searching. Instead the search results are written to an XML file +# which needs to be processed by an external indexer. Doxygen will invoke an +# external search engine pointed to by the SEARCHENGINE_URL option to obtain the +# search results. +# +# Doxygen ships with an example indexer (doxyindexer) and search engine +# (doxysearch.cgi) which are based on the open source search engine library +# Xapian (see: https://xapian.org/). +# +# See the section "External Indexing and Searching" for details. +# The default value is: NO. +# This tag requires that the tag SEARCHENGINE is set to YES. + +EXTERNAL_SEARCH = NO + +# The SEARCHENGINE_URL should point to a search engine hosted by a web server +# which will return the search results when EXTERNAL_SEARCH is enabled. +# +# Doxygen ships with an example indexer (doxyindexer) and search engine +# (doxysearch.cgi) which are based on the open source search engine library +# Xapian (see: https://xapian.org/). See the section "External Indexing and +# Searching" for details. +# This tag requires that the tag SEARCHENGINE is set to YES. + +SEARCHENGINE_URL = + +# When SERVER_BASED_SEARCH and EXTERNAL_SEARCH are both enabled the unindexed +# search data is written to a file for indexing by an external tool. With the +# SEARCHDATA_FILE tag the name of this file can be specified. +# The default file is: searchdata.xml. +# This tag requires that the tag SEARCHENGINE is set to YES. + +SEARCHDATA_FILE = searchdata.xml + +# When SERVER_BASED_SEARCH and EXTERNAL_SEARCH are both enabled the +# EXTERNAL_SEARCH_ID tag can be used as an identifier for the project. This is +# useful in combination with EXTRA_SEARCH_MAPPINGS to search through multiple +# projects and redirect the results back to the right project. +# This tag requires that the tag SEARCHENGINE is set to YES. + +EXTERNAL_SEARCH_ID = + +# The EXTRA_SEARCH_MAPPINGS tag can be used to enable searching through doxygen +# projects other than the one defined by this configuration file, but that are +# all added to the same external search index. Each project needs to have a +# unique id set via EXTERNAL_SEARCH_ID. The search mapping then maps the id of +# to a relative location where the documentation can be found. The format is: +# EXTRA_SEARCH_MAPPINGS = tagname1=loc1 tagname2=loc2 ... +# This tag requires that the tag SEARCHENGINE is set to YES. + +EXTRA_SEARCH_MAPPINGS = + +#--------------------------------------------------------------------------- +# Configuration options related to the LaTeX output +#--------------------------------------------------------------------------- + +# If the GENERATE_LATEX tag is set to YES, doxygen will generate LaTeX output. +# The default value is: YES. + +GENERATE_LATEX = "@GENERATE_LATEX@" + +# The LATEX_OUTPUT tag is used to specify where the LaTeX docs will be put. If a +# relative path is entered the value of OUTPUT_DIRECTORY will be put in front of +# it. +# The default directory is: latex. +# This tag requires that the tag GENERATE_LATEX is set to YES. + +LATEX_OUTPUT = latex + +# The LATEX_CMD_NAME tag can be used to specify the LaTeX command name to be +# invoked. +# +# Note that when not enabling USE_PDFLATEX the default is latex when enabling +# USE_PDFLATEX the default is pdflatex and when in the later case latex is +# chosen this is overwritten by pdflatex. For specific output languages the +# default can have been set differently, this depends on the implementation of +# the output language. +# This tag requires that the tag GENERATE_LATEX is set to YES. + +LATEX_CMD_NAME = + +# The MAKEINDEX_CMD_NAME tag can be used to specify the command name to generate +# index for LaTeX. +# Note: This tag is used in the Makefile / make.bat. +# See also: LATEX_MAKEINDEX_CMD for the part in the generated output file +# (.tex). +# The default file is: makeindex. +# This tag requires that the tag GENERATE_LATEX is set to YES. + +MAKEINDEX_CMD_NAME = makeindex + +# The LATEX_MAKEINDEX_CMD tag can be used to specify the command name to +# generate index for LaTeX. In case there is no backslash (\) as first character +# it will be automatically added in the LaTeX code. +# Note: This tag is used in the generated output file (.tex). +# See also: MAKEINDEX_CMD_NAME for the part in the Makefile / make.bat. +# The default value is: makeindex. +# This tag requires that the tag GENERATE_LATEX is set to YES. + +LATEX_MAKEINDEX_CMD = makeindex + +# If the COMPACT_LATEX tag is set to YES, doxygen generates more compact LaTeX +# documents. This may be useful for small projects and may help to save some +# trees in general. +# The default value is: NO. +# This tag requires that the tag GENERATE_LATEX is set to YES. + +COMPACT_LATEX = NO + +# The PAPER_TYPE tag can be used to set the paper type that is used by the +# printer. +# Possible values are: a4 (210 x 297 mm), letter (8.5 x 11 inches), legal (8.5 x +# 14 inches) and executive (7.25 x 10.5 inches). +# The default value is: a4. +# This tag requires that the tag GENERATE_LATEX is set to YES. + +PAPER_TYPE = a4 + +# The EXTRA_PACKAGES tag can be used to specify one or more LaTeX package names +# that should be included in the LaTeX output. The package can be specified just +# by its name or with the correct syntax as to be used with the LaTeX +# \usepackage command. To get the times font for instance you can specify : +# EXTRA_PACKAGES=times or EXTRA_PACKAGES={times} +# To use the option intlimits with the amsmath package you can specify: +# EXTRA_PACKAGES=[intlimits]{amsmath} +# If left blank no extra packages will be included. +# This tag requires that the tag GENERATE_LATEX is set to YES. + +EXTRA_PACKAGES = + +# The LATEX_HEADER tag can be used to specify a personal LaTeX header for the +# generated LaTeX document. The header should contain everything until the first +# chapter. If it is left blank doxygen will generate a standard header. See +# section "Doxygen usage" for information on how to let doxygen write the +# default header to a separate file. +# +# Note: Only use a user-defined header if you know what you are doing! The +# following commands have a special meaning inside the header: $title, +# $datetime, $date, $doxygenversion, $projectname, $projectnumber, +# $projectbrief, $projectlogo. Doxygen will replace $title with the empty +# string, for the replacement values of the other commands the user is referred +# to HTML_HEADER. +# This tag requires that the tag GENERATE_LATEX is set to YES. + +LATEX_HEADER = + +# The LATEX_FOOTER tag can be used to specify a personal LaTeX footer for the +# generated LaTeX document. The footer should contain everything after the last +# chapter. If it is left blank doxygen will generate a standard footer. See +# LATEX_HEADER for more information on how to generate a default footer and what +# special commands can be used inside the footer. +# +# Note: Only use a user-defined footer if you know what you are doing! +# This tag requires that the tag GENERATE_LATEX is set to YES. + +LATEX_FOOTER = + +# The LATEX_EXTRA_STYLESHEET tag can be used to specify additional user-defined +# LaTeX style sheets that are included after the standard style sheets created +# by doxygen. Using this option one can overrule certain style aspects. Doxygen +# will copy the style sheet files to the output directory. +# Note: The order of the extra style sheet files is of importance (e.g. the last +# style sheet in the list overrules the setting of the previous ones in the +# list). +# This tag requires that the tag GENERATE_LATEX is set to YES. + +LATEX_EXTRA_STYLESHEET = + +# The LATEX_EXTRA_FILES tag can be used to specify one or more extra images or +# other source files which should be copied to the LATEX_OUTPUT output +# directory. Note that the files will be copied as-is; there are no commands or +# markers available. +# This tag requires that the tag GENERATE_LATEX is set to YES. + +LATEX_EXTRA_FILES = + +# If the PDF_HYPERLINKS tag is set to YES, the LaTeX that is generated is +# prepared for conversion to PDF (using ps2pdf or pdflatex). The PDF file will +# contain links (just like the HTML output) instead of page references. This +# makes the output suitable for online browsing using a PDF viewer. +# The default value is: YES. +# This tag requires that the tag GENERATE_LATEX is set to YES. + +PDF_HYPERLINKS = YES + +# If the USE_PDFLATEX tag is set to YES, doxygen will use pdflatex to generate +# the PDF file directly from the LaTeX files. Set this option to YES, to get a +# higher quality PDF documentation. +# The default value is: YES. +# This tag requires that the tag GENERATE_LATEX is set to YES. + +USE_PDFLATEX = YES + +# If the LATEX_BATCHMODE tag is set to YES, doxygen will add the \batchmode +# command to the generated LaTeX files. This will instruct LaTeX to keep running +# if errors occur, instead of asking the user for help. This option is also used +# when generating formulas in HTML. +# The default value is: NO. +# This tag requires that the tag GENERATE_LATEX is set to YES. + +LATEX_BATCHMODE = NO + +# If the LATEX_HIDE_INDICES tag is set to YES then doxygen will not include the +# index chapters (such as File Index, Compound Index, etc.) in the output. +# The default value is: NO. +# This tag requires that the tag GENERATE_LATEX is set to YES. + +LATEX_HIDE_INDICES = NO + +# If the LATEX_SOURCE_CODE tag is set to YES then doxygen will include source +# code with syntax highlighting in the LaTeX output. +# +# Note that which sources are shown also depends on other settings such as +# SOURCE_BROWSER. +# The default value is: NO. +# This tag requires that the tag GENERATE_LATEX is set to YES. + +LATEX_SOURCE_CODE = NO + +# The LATEX_BIB_STYLE tag can be used to specify the style to use for the +# bibliography, e.g. plainnat, or ieeetr. See +# https://en.wikipedia.org/wiki/BibTeX and \cite for more info. +# The default value is: plain. +# This tag requires that the tag GENERATE_LATEX is set to YES. + +LATEX_BIB_STYLE = plain + +# If the LATEX_TIMESTAMP tag is set to YES then the footer of each generated +# page will contain the date and time when the page was generated. Setting this +# to NO can help when comparing the output of multiple runs. +# The default value is: NO. +# This tag requires that the tag GENERATE_LATEX is set to YES. + +LATEX_TIMESTAMP = NO + +# The LATEX_EMOJI_DIRECTORY tag is used to specify the (relative or absolute) +# path from which the emoji images will be read. If a relative path is entered, +# it will be relative to the LATEX_OUTPUT directory. If left blank the +# LATEX_OUTPUT directory will be used. +# This tag requires that the tag GENERATE_LATEX is set to YES. + +LATEX_EMOJI_DIRECTORY = + +#--------------------------------------------------------------------------- +# Configuration options related to the RTF output +#--------------------------------------------------------------------------- + +# If the GENERATE_RTF tag is set to YES, doxygen will generate RTF output. The +# RTF output is optimized for Word 97 and may not look too pretty with other RTF +# readers/editors. +# The default value is: NO. + +GENERATE_RTF = NO + +# The RTF_OUTPUT tag is used to specify where the RTF docs will be put. If a +# relative path is entered the value of OUTPUT_DIRECTORY will be put in front of +# it. +# The default directory is: rtf. +# This tag requires that the tag GENERATE_RTF is set to YES. + +RTF_OUTPUT = rtf + +# If the COMPACT_RTF tag is set to YES, doxygen generates more compact RTF +# documents. This may be useful for small projects and may help to save some +# trees in general. +# The default value is: NO. +# This tag requires that the tag GENERATE_RTF is set to YES. + +COMPACT_RTF = NO + +# If the RTF_HYPERLINKS tag is set to YES, the RTF that is generated will +# contain hyperlink fields. The RTF file will contain links (just like the HTML +# output) instead of page references. This makes the output suitable for online +# browsing using Word or some other Word compatible readers that support those +# fields. +# +# Note: WordPad (write) and others do not support links. +# The default value is: NO. +# This tag requires that the tag GENERATE_RTF is set to YES. + +RTF_HYPERLINKS = NO + +# Load stylesheet definitions from file. Syntax is similar to doxygen's +# configuration file, i.e. a series of assignments. You only have to provide +# replacements, missing definitions are set to their default value. +# +# See also section "Doxygen usage" for information on how to generate the +# default style sheet that doxygen normally uses. +# This tag requires that the tag GENERATE_RTF is set to YES. + +RTF_STYLESHEET_FILE = + +# Set optional variables used in the generation of an RTF document. Syntax is +# similar to doxygen's configuration file. A template extensions file can be +# generated using doxygen -e rtf extensionFile. +# This tag requires that the tag GENERATE_RTF is set to YES. + +RTF_EXTENSIONS_FILE = + +# If the RTF_SOURCE_CODE tag is set to YES then doxygen will include source code +# with syntax highlighting in the RTF output. +# +# Note that which sources are shown also depends on other settings such as +# SOURCE_BROWSER. +# The default value is: NO. +# This tag requires that the tag GENERATE_RTF is set to YES. + +RTF_SOURCE_CODE = NO + +#--------------------------------------------------------------------------- +# Configuration options related to the man page output +#--------------------------------------------------------------------------- + +# If the GENERATE_MAN tag is set to YES, doxygen will generate man pages for +# classes and files. +# The default value is: NO. + +GENERATE_MAN = NO + +# The MAN_OUTPUT tag is used to specify where the man pages will be put. If a +# relative path is entered the value of OUTPUT_DIRECTORY will be put in front of +# it. A directory man3 will be created inside the directory specified by +# MAN_OUTPUT. +# The default directory is: man. +# This tag requires that the tag GENERATE_MAN is set to YES. + +MAN_OUTPUT = man + +# The MAN_EXTENSION tag determines the extension that is added to the generated +# man pages. In case the manual section does not start with a number, the number +# 3 is prepended. The dot (.) at the beginning of the MAN_EXTENSION tag is +# optional. +# The default value is: .3. +# This tag requires that the tag GENERATE_MAN is set to YES. + +MAN_EXTENSION = .3 + +# The MAN_SUBDIR tag determines the name of the directory created within +# MAN_OUTPUT in which the man pages are placed. If defaults to man followed by +# MAN_EXTENSION with the initial . removed. +# This tag requires that the tag GENERATE_MAN is set to YES. + +MAN_SUBDIR = + +# If the MAN_LINKS tag is set to YES and doxygen generates man output, then it +# will generate one additional man file for each entity documented in the real +# man page(s). These additional files only source the real man page, but without +# them the man command would be unable to find the correct page. +# The default value is: NO. +# This tag requires that the tag GENERATE_MAN is set to YES. + +MAN_LINKS = NO + +#--------------------------------------------------------------------------- +# Configuration options related to the XML output +#--------------------------------------------------------------------------- + +# If the GENERATE_XML tag is set to YES, doxygen will generate an XML file that +# captures the structure of the code including all documentation. +# The default value is: NO. + +GENERATE_XML = "@GENERATE_XML@" + +# The XML_OUTPUT tag is used to specify where the XML pages will be put. If a +# relative path is entered the value of OUTPUT_DIRECTORY will be put in front of +# it. +# The default directory is: xml. +# This tag requires that the tag GENERATE_XML is set to YES. + +XML_OUTPUT = xml + +# If the XML_PROGRAMLISTING tag is set to YES, doxygen will dump the program +# listings (including syntax highlighting and cross-referencing information) to +# the XML output. Note that enabling this will significantly increase the size +# of the XML output. +# The default value is: YES. +# This tag requires that the tag GENERATE_XML is set to YES. + +XML_PROGRAMLISTING = YES + +# If the XML_NS_MEMB_FILE_SCOPE tag is set to YES, doxygen will include +# namespace members in file scope as well, matching the HTML output. +# The default value is: NO. +# This tag requires that the tag GENERATE_XML is set to YES. + +XML_NS_MEMB_FILE_SCOPE = NO + +#--------------------------------------------------------------------------- +# Configuration options related to the DOCBOOK output +#--------------------------------------------------------------------------- + +# If the GENERATE_DOCBOOK tag is set to YES, doxygen will generate Docbook files +# that can be used to generate PDF. +# The default value is: NO. + +GENERATE_DOCBOOK = NO + +# The DOCBOOK_OUTPUT tag is used to specify where the Docbook pages will be put. +# If a relative path is entered the value of OUTPUT_DIRECTORY will be put in +# front of it. +# The default directory is: docbook. +# This tag requires that the tag GENERATE_DOCBOOK is set to YES. + +DOCBOOK_OUTPUT = docbook + +# If the DOCBOOK_PROGRAMLISTING tag is set to YES, doxygen will include the +# program listings (including syntax highlighting and cross-referencing +# information) to the DOCBOOK output. Note that enabling this will significantly +# increase the size of the DOCBOOK output. +# The default value is: NO. +# This tag requires that the tag GENERATE_DOCBOOK is set to YES. + +DOCBOOK_PROGRAMLISTING = NO + +#--------------------------------------------------------------------------- +# Configuration options for the AutoGen Definitions output +#--------------------------------------------------------------------------- + +# If the GENERATE_AUTOGEN_DEF tag is set to YES, doxygen will generate an +# AutoGen Definitions (see http://autogen.sourceforge.net/) file that captures +# the structure of the code including all documentation. Note that this feature +# is still experimental and incomplete at the moment. +# The default value is: NO. + +GENERATE_AUTOGEN_DEF = NO + +#--------------------------------------------------------------------------- +# Configuration options related to the Perl module output +#--------------------------------------------------------------------------- + +# If the GENERATE_PERLMOD tag is set to YES, doxygen will generate a Perl module +# file that captures the structure of the code including all documentation. +# +# Note that this feature is still experimental and incomplete at the moment. +# The default value is: NO. + +GENERATE_PERLMOD = NO + +# If the PERLMOD_LATEX tag is set to YES, doxygen will generate the necessary +# Makefile rules, Perl scripts and LaTeX code to be able to generate PDF and DVI +# output from the Perl module output. +# The default value is: NO. +# This tag requires that the tag GENERATE_PERLMOD is set to YES. + +PERLMOD_LATEX = NO + +# If the PERLMOD_PRETTY tag is set to YES, the Perl module output will be nicely +# formatted so it can be parsed by a human reader. This is useful if you want to +# understand what is going on. On the other hand, if this tag is set to NO, the +# size of the Perl module output will be much smaller and Perl will parse it +# just the same. +# The default value is: YES. +# This tag requires that the tag GENERATE_PERLMOD is set to YES. + +PERLMOD_PRETTY = YES + +# The names of the make variables in the generated doxyrules.make file are +# prefixed with the string contained in PERLMOD_MAKEVAR_PREFIX. This is useful +# so different doxyrules.make files included by the same Makefile don't +# overwrite each other's variables. +# This tag requires that the tag GENERATE_PERLMOD is set to YES. + +PERLMOD_MAKEVAR_PREFIX = + +#--------------------------------------------------------------------------- +# Configuration options related to the preprocessor +#--------------------------------------------------------------------------- + +# If the ENABLE_PREPROCESSING tag is set to YES, doxygen will evaluate all +# C-preprocessor directives found in the sources and include files. +# The default value is: YES. + +ENABLE_PREPROCESSING = YES + +# If the MACRO_EXPANSION tag is set to YES, doxygen will expand all macro names +# in the source code. If set to NO, only conditional compilation will be +# performed. Macro expansion can be done in a controlled way by setting +# EXPAND_ONLY_PREDEF to YES. +# The default value is: NO. +# This tag requires that the tag ENABLE_PREPROCESSING is set to YES. + +MACRO_EXPANSION = NO + +# If the EXPAND_ONLY_PREDEF and MACRO_EXPANSION tags are both set to YES then +# the macro expansion is limited to the macros specified with the PREDEFINED and +# EXPAND_AS_DEFINED tags. +# The default value is: NO. +# This tag requires that the tag ENABLE_PREPROCESSING is set to YES. + +EXPAND_ONLY_PREDEF = NO + +# If the SEARCH_INCLUDES tag is set to YES, the include files in the +# INCLUDE_PATH will be searched if a #include is found. +# The default value is: YES. +# This tag requires that the tag ENABLE_PREPROCESSING is set to YES. + +SEARCH_INCLUDES = YES + +# The INCLUDE_PATH tag can be used to specify one or more directories that +# contain include files that are not input files but should be processed by the +# preprocessor. +# This tag requires that the tag SEARCH_INCLUDES is set to YES. + +INCLUDE_PATH = + +# You can use the INCLUDE_FILE_PATTERNS tag to specify one or more wildcard +# patterns (like *.h and *.hpp) to filter out the header-files in the +# directories. If left blank, the patterns specified with FILE_PATTERNS will be +# used. +# This tag requires that the tag ENABLE_PREPROCESSING is set to YES. + +INCLUDE_FILE_PATTERNS = + +# The PREDEFINED tag can be used to specify one or more macro names that are +# defined before the preprocessor is started (similar to the -D option of e.g. +# gcc). The argument of the tag is a list of macros of the form: name or +# name=definition (no spaces). If the definition and the "=" are omitted, "=1" +# is assumed. To prevent a macro definition from being undefined via #undef or +# recursively expanded use the := operator instead of the = operator. +# This tag requires that the tag ENABLE_PREPROCESSING is set to YES. + +PREDEFINED = + +# If the MACRO_EXPANSION and EXPAND_ONLY_PREDEF tags are set to YES then this +# tag can be used to specify a list of macro names that should be expanded. The +# macro definition that is found in the sources will be used. Use the PREDEFINED +# tag if you want to use a different macro definition that overrules the +# definition found in the source code. +# This tag requires that the tag ENABLE_PREPROCESSING is set to YES. + +EXPAND_AS_DEFINED = + +# If the SKIP_FUNCTION_MACROS tag is set to YES then doxygen's preprocessor will +# remove all references to function-like macros that are alone on a line, have +# an all uppercase name, and do not end with a semicolon. Such function macros +# are typically used for boiler-plate code, and will confuse the parser if not +# removed. +# The default value is: YES. +# This tag requires that the tag ENABLE_PREPROCESSING is set to YES. + +SKIP_FUNCTION_MACROS = YES + +#--------------------------------------------------------------------------- +# Configuration options related to external references +#--------------------------------------------------------------------------- + +# The TAGFILES tag can be used to specify one or more tag files. For each tag +# file the location of the external documentation should be added. The format of +# a tag file without this location is as follows: +# TAGFILES = file1 file2 ... +# Adding location for the tag files is done as follows: +# TAGFILES = file1=loc1 "file2 = loc2" ... +# where loc1 and loc2 can be relative or absolute paths or URLs. See the +# section "Linking to external documentation" for more information about the use +# of tag files. +# Note: Each tag file must have a unique name (where the name does NOT include +# the path). If a tag file is not located in the directory in which doxygen is +# run, you must also specify the path to the tagfile here. + +TAGFILES = + +# When a file name is specified after GENERATE_TAGFILE, doxygen will create a +# tag file that is based on the input files it reads. See section "Linking to +# external documentation" for more information about the usage of tag files. + +GENERATE_TAGFILE = + +# If the ALLEXTERNALS tag is set to YES, all external class will be listed in +# the class index. If set to NO, only the inherited external classes will be +# listed. +# The default value is: NO. + +ALLEXTERNALS = NO + +# If the EXTERNAL_GROUPS tag is set to YES, all external groups will be listed +# in the modules index. If set to NO, only the current project's groups will be +# listed. +# The default value is: YES. + +EXTERNAL_GROUPS = YES + +# If the EXTERNAL_PAGES tag is set to YES, all external pages will be listed in +# the related pages index. If set to NO, only the current project's pages will +# be listed. +# The default value is: YES. + +EXTERNAL_PAGES = YES + +#--------------------------------------------------------------------------- +# Configuration options related to the dot tool +#--------------------------------------------------------------------------- + +# If the CLASS_DIAGRAMS tag is set to YES, doxygen will generate a class diagram +# (in HTML and LaTeX) for classes with base or super classes. Setting the tag to +# NO turns the diagrams off. Note that this option also works with HAVE_DOT +# disabled, but it is recommended to install and use dot, since it yields more +# powerful graphs. +# The default value is: YES. + +CLASS_DIAGRAMS = YES + +# You can include diagrams made with dia in doxygen documentation. Doxygen will +# then run dia to produce the diagram and insert it in the documentation. The +# DIA_PATH tag allows you to specify the directory where the dia binary resides. +# If left empty dia is assumed to be found in the default search path. + +DIA_PATH = + +# If set to YES the inheritance and collaboration graphs will hide inheritance +# and usage relations if the target is undocumented or is not a class. +# The default value is: YES. + +HIDE_UNDOC_RELATIONS = YES + +# If you set the HAVE_DOT tag to YES then doxygen will assume the dot tool is +# available from the path. This tool is part of Graphviz (see: +# http://www.graphviz.org/), a graph visualization toolkit from AT&T and Lucent +# Bell Labs. The other options in this section have no effect if this option is +# set to NO +# The default value is: YES. + +HAVE_DOT = @HAVE_DOT@ + +# The DOT_NUM_THREADS specifies the number of dot invocations doxygen is allowed +# to run in parallel. When set to 0 doxygen will base this on the number of +# processors available in the system. You can set it explicitly to a value +# larger than 0 to get control over the balance between CPU load and processing +# speed. +# Minimum value: 0, maximum value: 32, default value: 0. +# This tag requires that the tag HAVE_DOT is set to YES. + +DOT_NUM_THREADS = 0 + +# When you want a differently looking font in the dot files that doxygen +# generates you can specify the font name using DOT_FONTNAME. You need to make +# sure dot is able to find the font, which can be done by putting it in a +# standard location or by setting the DOTFONTPATH environment variable or by +# setting DOT_FONTPATH to the directory containing the font. +# The default value is: Helvetica. +# This tag requires that the tag HAVE_DOT is set to YES. + +DOT_FONTNAME = Helvetica + +# The DOT_FONTSIZE tag can be used to set the size (in points) of the font of +# dot graphs. +# Minimum value: 4, maximum value: 24, default value: 10. +# This tag requires that the tag HAVE_DOT is set to YES. + +DOT_FONTSIZE = 10 + +# By default doxygen will tell dot to use the default font as specified with +# DOT_FONTNAME. If you specify a different font using DOT_FONTNAME you can set +# the path where dot can find it using this tag. +# This tag requires that the tag HAVE_DOT is set to YES. + +DOT_FONTPATH = + +# If the CLASS_GRAPH tag is set to YES then doxygen will generate a graph for +# each documented class showing the direct and indirect inheritance relations. +# Setting this tag to YES will force the CLASS_DIAGRAMS tag to NO. +# The default value is: YES. +# This tag requires that the tag HAVE_DOT is set to YES. + +CLASS_GRAPH = YES + +# If the COLLABORATION_GRAPH tag is set to YES then doxygen will generate a +# graph for each documented class showing the direct and indirect implementation +# dependencies (inheritance, containment, and class references variables) of the +# class with other documented classes. +# The default value is: YES. +# This tag requires that the tag HAVE_DOT is set to YES. + +COLLABORATION_GRAPH = YES + +# If the GROUP_GRAPHS tag is set to YES then doxygen will generate a graph for +# groups, showing the direct groups dependencies. +# The default value is: YES. +# This tag requires that the tag HAVE_DOT is set to YES. + +GROUP_GRAPHS = YES + +# If the UML_LOOK tag is set to YES, doxygen will generate inheritance and +# collaboration diagrams in a style similar to the OMG's Unified Modeling +# Language. +# The default value is: NO. +# This tag requires that the tag HAVE_DOT is set to YES. + +UML_LOOK = NO + +# If the UML_LOOK tag is enabled, the fields and methods are shown inside the +# class node. If there are many fields or methods and many nodes the graph may +# become too big to be useful. The UML_LIMIT_NUM_FIELDS threshold limits the +# number of items for each type to make the size more manageable. Set this to 0 +# for no limit. Note that the threshold may be exceeded by 50% before the limit +# is enforced. So when you set the threshold to 10, up to 15 fields may appear, +# but if the number exceeds 15, the total amount of fields shown is limited to +# 10. +# Minimum value: 0, maximum value: 100, default value: 10. +# This tag requires that the tag HAVE_DOT is set to YES. + +UML_LIMIT_NUM_FIELDS = 10 + +# If the TEMPLATE_RELATIONS tag is set to YES then the inheritance and +# collaboration graphs will show the relations between templates and their +# instances. +# The default value is: NO. +# This tag requires that the tag HAVE_DOT is set to YES. + +TEMPLATE_RELATIONS = NO + +# If the INCLUDE_GRAPH, ENABLE_PREPROCESSING and SEARCH_INCLUDES tags are set to +# YES then doxygen will generate a graph for each documented file showing the +# direct and indirect include dependencies of the file with other documented +# files. +# The default value is: YES. +# This tag requires that the tag HAVE_DOT is set to YES. + +INCLUDE_GRAPH = YES + +# If the INCLUDED_BY_GRAPH, ENABLE_PREPROCESSING and SEARCH_INCLUDES tags are +# set to YES then doxygen will generate a graph for each documented file showing +# the direct and indirect include dependencies of the file with other documented +# files. +# The default value is: YES. +# This tag requires that the tag HAVE_DOT is set to YES. + +INCLUDED_BY_GRAPH = YES + +# If the CALL_GRAPH tag is set to YES then doxygen will generate a call +# dependency graph for every global function or class method. +# +# Note that enabling this option will significantly increase the time of a run. +# So in most cases it will be better to enable call graphs for selected +# functions only using the \callgraph command. Disabling a call graph can be +# accomplished by means of the command \hidecallgraph. +# The default value is: NO. +# This tag requires that the tag HAVE_DOT is set to YES. + +CALL_GRAPH = NO + +# If the CALLER_GRAPH tag is set to YES then doxygen will generate a caller +# dependency graph for every global function or class method. +# +# Note that enabling this option will significantly increase the time of a run. +# So in most cases it will be better to enable caller graphs for selected +# functions only using the \callergraph command. Disabling a caller graph can be +# accomplished by means of the command \hidecallergraph. +# The default value is: NO. +# This tag requires that the tag HAVE_DOT is set to YES. + +CALLER_GRAPH = NO + +# If the GRAPHICAL_HIERARCHY tag is set to YES then doxygen will graphical +# hierarchy of all classes instead of a textual one. +# The default value is: YES. +# This tag requires that the tag HAVE_DOT is set to YES. + +GRAPHICAL_HIERARCHY = YES + +# If the DIRECTORY_GRAPH tag is set to YES then doxygen will show the +# dependencies a directory has on other directories in a graphical way. The +# dependency relations are determined by the #include relations between the +# files in the directories. +# The default value is: YES. +# This tag requires that the tag HAVE_DOT is set to YES. + +DIRECTORY_GRAPH = YES + +# The DOT_IMAGE_FORMAT tag can be used to set the image format of the images +# generated by dot. For an explanation of the image formats see the section +# output formats in the documentation of the dot tool (Graphviz (see: +# http://www.graphviz.org/)). +# Note: If you choose svg you need to set HTML_FILE_EXTENSION to xhtml in order +# to make the SVG files visible in IE 9+ (other browsers do not have this +# requirement). +# Possible values are: png, png:cairo, png:cairo:cairo, png:cairo:gd, png:gd, +# png:gd:gd, jpg, jpg:cairo, jpg:cairo:gd, jpg:gd, jpg:gd:gd, gif, gif:cairo, +# gif:cairo:gd, gif:gd, gif:gd:gd, svg, png:gd, png:gd:gd, png:cairo, +# png:cairo:gd, png:cairo:cairo, png:cairo:gdiplus, png:gdiplus and +# png:gdiplus:gdiplus. +# The default value is: png. +# This tag requires that the tag HAVE_DOT is set to YES. + +DOT_IMAGE_FORMAT = png + +# If DOT_IMAGE_FORMAT is set to svg, then this option can be set to YES to +# enable generation of interactive SVG images that allow zooming and panning. +# +# Note that this requires a modern browser other than Internet Explorer. Tested +# and working are Firefox, Chrome, Safari, and Opera. +# Note: For IE 9+ you need to set HTML_FILE_EXTENSION to xhtml in order to make +# the SVG files visible. Older versions of IE do not have SVG support. +# The default value is: NO. +# This tag requires that the tag HAVE_DOT is set to YES. + +INTERACTIVE_SVG = NO + +# The DOT_PATH tag can be used to specify the path where the dot tool can be +# found. If left blank, it is assumed the dot tool can be found in the path. +# This tag requires that the tag HAVE_DOT is set to YES. + +DOT_PATH = + +# The DOTFILE_DIRS tag can be used to specify one or more directories that +# contain dot files that are included in the documentation (see the \dotfile +# command). +# This tag requires that the tag HAVE_DOT is set to YES. + +DOTFILE_DIRS = + +# The MSCFILE_DIRS tag can be used to specify one or more directories that +# contain msc files that are included in the documentation (see the \mscfile +# command). + +MSCFILE_DIRS = + +# The DIAFILE_DIRS tag can be used to specify one or more directories that +# contain dia files that are included in the documentation (see the \diafile +# command). + +DIAFILE_DIRS = + +# When using plantuml, the PLANTUML_JAR_PATH tag should be used to specify the +# path where java can find the plantuml.jar file. If left blank, it is assumed +# PlantUML is not used or called during a preprocessing step. Doxygen will +# generate a warning when it encounters a \startuml command in this case and +# will not generate output for the diagram. + +PLANTUML_JAR_PATH = + +# When using plantuml, the PLANTUML_CFG_FILE tag can be used to specify a +# configuration file for plantuml. + +PLANTUML_CFG_FILE = + +# When using plantuml, the specified paths are searched for files specified by +# the !include statement in a plantuml block. + +PLANTUML_INCLUDE_PATH = + +# The DOT_GRAPH_MAX_NODES tag can be used to set the maximum number of nodes +# that will be shown in the graph. If the number of nodes in a graph becomes +# larger than this value, doxygen will truncate the graph, which is visualized +# by representing a node as a red box. Note that doxygen if the number of direct +# children of the root node in a graph is already larger than +# DOT_GRAPH_MAX_NODES then the graph will not be shown at all. Also note that +# the size of a graph can be further restricted by MAX_DOT_GRAPH_DEPTH. +# Minimum value: 0, maximum value: 10000, default value: 50. +# This tag requires that the tag HAVE_DOT is set to YES. + +DOT_GRAPH_MAX_NODES = 50 + +# The MAX_DOT_GRAPH_DEPTH tag can be used to set the maximum depth of the graphs +# generated by dot. A depth value of 3 means that only nodes reachable from the +# root by following a path via at most 3 edges will be shown. Nodes that lay +# further from the root node will be omitted. Note that setting this option to 1 +# or 2 may greatly reduce the computation time needed for large code bases. Also +# note that the size of a graph can be further restricted by +# DOT_GRAPH_MAX_NODES. Using a depth of 0 means no depth restriction. +# Minimum value: 0, maximum value: 1000, default value: 0. +# This tag requires that the tag HAVE_DOT is set to YES. + +MAX_DOT_GRAPH_DEPTH = 0 + +# Set the DOT_TRANSPARENT tag to YES to generate images with a transparent +# background. This is disabled by default, because dot on Windows does not seem +# to support this out of the box. +# +# Warning: Depending on the platform used, enabling this option may lead to +# badly anti-aliased labels on the edges of a graph (i.e. they become hard to +# read). +# The default value is: NO. +# This tag requires that the tag HAVE_DOT is set to YES. + +DOT_TRANSPARENT = NO + +# Set the DOT_MULTI_TARGETS tag to YES to allow dot to generate multiple output +# files in one run (i.e. multiple -o and -T options on the command line). This +# makes dot run faster, but since only newer versions of dot (>1.8.10) support +# this, this feature is disabled by default. +# The default value is: NO. +# This tag requires that the tag HAVE_DOT is set to YES. + +DOT_MULTI_TARGETS = NO + +# If the GENERATE_LEGEND tag is set to YES doxygen will generate a legend page +# explaining the meaning of the various boxes and arrows in the dot generated +# graphs. +# The default value is: YES. +# This tag requires that the tag HAVE_DOT is set to YES. + +GENERATE_LEGEND = YES + +# If the DOT_CLEANUP tag is set to YES, doxygen will remove the intermediate dot +# files that are used to generate the various graphs. +# The default value is: YES. +# This tag requires that the tag HAVE_DOT is set to YES. + +DOT_CLEANUP = YES diff --git a/docs/conf.py b/docs/conf.py new file mode 100644 index 0000000000000000000000000000000000000000..209d2712ddbe7430b9d38ccfdef649f8901771a3 --- /dev/null +++ b/docs/conf.py @@ -0,0 +1,104 @@ +# Configuration file for the Sphinx documentation builder. +# +# This file only contains a selection of the most common options. For a full +# list see the documentation: +# https://www.sphinx-doc.org/en/master/usage/configuration.html + +# -- Path setup -------------------------------------------------------------- + +# If extensions (or modules to document with autodoc) are in another directory, +# add these directories to sys.path here. If the directory is relative to the +# documentation root, use os.path.abspath to make it absolute, like shown here. +# +# import os +# import sys +# sys.path.insert(0, os.path.abspath('.')) +from sphinx.builders.html import StandaloneHTMLBuilder +import subprocess, os + +# Doxygen +subprocess.call('doxygen @DOXYFILE_NAME@', shell=True) + + +# -- Project information ----------------------------------------------------- + +project = '@PROJECT_NAME@' +copyright = '2021, Machine PM' +author = 'Machine PM' + + +# -- General configuration --------------------------------------------------- + +# Add any Sphinx extension module names here, as strings. They can be +# extensions coming with Sphinx (named 'sphinx.ext.*') or your custom +# ones. +extensions = [ + 'sphinx.ext.autodoc', + 'sphinx.ext.intersphinx', + 'sphinx.ext.autosectionlabel', + 'sphinx.ext.todo', + 'sphinx.ext.coverage', + 'sphinx.ext.mathjax', + 'sphinx.ext.ifconfig', + 'sphinx.ext.viewcode', + 'sphinx_sitemap', + 'sphinx.ext.inheritance_diagram', + 'breathe' +] + +# Add any paths that contain templates here, relative to this directory. +templates_path = ['_templates'] + +# List of patterns, relative to source directory, that match files and +# directories to ignore when looking for source files. +# This pattern also affects html_static_path and html_extra_path. +exclude_patterns = ['docs', 'Thumbs.db', '.DS_Store'] + +highlight_language = 'c++' +# The suffix(es) of source filenames. +# You can specify multiple suffix as a list of string: +# +# source_suffix = ['.rst', '.md'] +source_suffix = '.rst' + +# The master toctree document. +master_doc = 'index' + +# -- Options for HTML output ------------------------------------------------- + +# The theme to use for HTML and HTML Help pages. See the documentation for +# a list of builtin themes. +# +html_theme = 'sphinx_rtd_theme' +html_theme_options = { + 'canonical_url': '', + 'analytics_id': '', + 'display_version': True, + 'prev_next_buttons_location': 'bottom', + 'style_external_links': False, + + 'logo_only': False, + + # Toc options + 'collapse_navigation': True, + 'sticky_navigation': True, + 'navigation_depth': 4, + 'includehidden': True, + 'titles_only': False +} +# html_logo = '' +# github_url = '' +# html_baseurl = '' + +# Add any paths that contain custom static files (such as style sheets) here, +# relative to this directory. They are copied after the builtin static files, +# so a file named "default.css" will overwrite the builtin "default.css". +html_static_path = ['@OUTPUT_DIRECTORY@/sphinx/_static'] + +# -- Breathe configuration ---------------which take :members:, :private-members: and :undoc-members: options. By default, this is set to an empty list, which means no members are displayed. If you’d like to always ---------------------------------- + +breathe_projects = { + "@PROJECT_NAME@": "@OUTPUT_DIRECTORY@/xml/" +} +breathe_default_project = "@PROJECT_NAME@" +breathe_default_members = ('members', 'undoc-members') diff --git a/docs/index.rst b/docs/index.rst new file mode 100644 index 0000000000000000000000000000000000000000..4040d3bc2a7ff9917c620d3777366b5106ac760f --- /dev/null +++ b/docs/index.rst @@ -0,0 +1,29 @@ +.. Unicorn OSAL documentation master file, created by + sphinx-quickstart on Tue Jun 22 07:18:52 2021. + You can adapt this file completely to your liking, but it should at least + contain the root `toctree` directive. + +Welcome to Unicorn OSAL's documentation! +======================================== + +.. toctree:: + :maxdepth: 2 + :caption: Contents: + + + +Indices and tables +================== + +* :ref:`genindex` +* :ref:`modindex` +* :ref:`search` + + +Documentation +============= +.. doxygenindex:: + :project: Unicorn OSAL + + + diff --git a/docs/meson.build b/docs/meson.build new file mode 100644 index 0000000000000000000000000000000000000000..a7eb11086a6721e85321bc949c65f1bd01138aa6 --- /dev/null +++ b/docs/meson.build @@ -0,0 +1,54 @@ +doxygen = find_program('doxygen', required : true) +if not doxygen.found() + error('Doxygen not found.') +endif + +doxygen_cdata = configuration_data() + +if find_program('dot', required : false).found() + doxygen_cdata.set('HAVE_DOT', 'YES') +else + doxygen_cdata.set('HAVE_DOT', 'NO') +endif + +doxygen_cdata.set('PROJECT_NAME', meson.project_name()) +doxygen_cdata.set('VERSION', meson.project_version()) +doxygen_cdata.set('INPUT', meson.source_root() + '/library/') +doxygen_cdata.set('OUTPUT_DIRECTORY', meson.project_build_root() + '/docs') +doxygen_cdata.set('FILE_PATTERN', '*.hpp') +doxygen_cdata.set('IS_RECURSIVE', 'YES') +doxygen_cdata.set('GENERATE_HTML', 'YES') +doxygen_cdata.set('GENERATE_XML', 'YES') +doxygen_cdata.set('VERBATIM_HEADERS', 'NO') +doxygen_cdata.set('GENERATE_LATEX', 'NO') + +doxyfile = configure_file(input: 'Doxyfile.dox', + output: 'Doxyfile.dox', + configuration: doxygen_cdata, + install: false) + +doxygen_target = run_target('docs:doxygen', command: [doxygen, doxyfile]) + +sphinx = find_program('sphinx-build', required : true, dirs: '~/.local/bin') +if not sphinx.found() + error('Sphynx not found.') +endif + +sphinx_cdata = configuration_data() +sphinx_cdata.set('PROJECT_NAME', meson.project_name()) +sphinx_cdata.set('DOXYFILE_NAME', 'Doxyfile.dox') +sphinx_cdata.set('OUTPUT_DIRECTORY', meson.project_build_root() + '/docs') +sphinxfile = configure_file(input: 'conf.py', + output: 'conf.py', + configuration: sphinx_cdata, + install: false) + +configure_file( + input: 'index.rst', + output: 'index.rst', + copy: true, + install: false + ) + + +sphinx_target = run_target('docs:sphinx', command: [sphinx, meson.project_build_root() + '/docs', meson.project_build_root() + '/docs/sphinx']) diff --git a/library/core/error-handler/error-handler.cpp b/library/core/error-handler/error-handler.cpp new file mode 100644 index 0000000000000000000000000000000000000000..e8de07e2806706004f5ebd48c26a46e92def3d52 --- /dev/null +++ b/library/core/error-handler/error-handler.cpp @@ -0,0 +1 @@ +#include "error-handler.hpp" diff --git a/library/core/error-handler/error-handler.hpp b/library/core/error-handler/error-handler.hpp new file mode 100644 index 0000000000000000000000000000000000000000..98ade44c26965ae88a305901971d86c1c61efa4f --- /dev/null +++ b/library/core/error-handler/error-handler.hpp @@ -0,0 +1,38 @@ +#include "FreeRTOS.h" +#include "task.h" + +namespace osal { + +class ErrorHandler { + public: + static void (*onAssertFailed)(const char* file, uint32_t line); + static void (*onStackOverflow)(TaskHandle_t task, char* taskName); +}; + +} + +void (*osal::ErrorHandler::onAssertFailed)(const char* file, + uint32_t line) = NULL; + +void (*osal::ErrorHandler::onStackOverflow)(TaskHandle_t task, char* taskName); + +void assert_failed(const char* file, uint32_t line) { + if (osal::ErrorHandler::onAssertFailed) + osal::ErrorHandler::onAssertFailed(file, line); +} + +void vApplicationGetIdleTaskMemory(StaticTask_t** ppxIdleTaskTCBBuffer, + StackType_t** ppxIdleTaskStackBuffer, + uint32_t* pulIdleTaskStackSize) { + static StaticTask_t xIdleTaskTCB; + static StackType_t uxIdleTaskStack[configMINIMAL_STACK_SIZE]; + + *ppxIdleTaskTCBBuffer = &xIdleTaskTCB; + *ppxIdleTaskStackBuffer = uxIdleTaskStack; + *pulIdleTaskStackSize = configMINIMAL_STACK_SIZE; +} + +void vApplicationStackOverflowHook(TaskHandle_t xTask, char* pcTaskName) { + if (osal::ErrorHandler::onStackOverflow) + osal::ErrorHandler::onStackOverflow(xTask, pcTaskName); +} diff --git a/library/core/meson.build b/library/core/meson.build new file mode 100644 index 0000000000000000000000000000000000000000..43c661308a0377d0b9096105967c2e16b2c63d38 --- /dev/null +++ b/library/core/meson.build @@ -0,0 +1,45 @@ +fs = import('fs') + +#==============================================================================# +# Initialize some local +core_modules = [] +core_includes = [] +core_sources = [] + +core_modules += ['task'] +core_modules += ['rtos'] +core_modules += ['semaphore'] +core_modules += ['semaphore/binary-semaphore'] +core_modules += ['semaphore/counting-semaphore'] +core_modules += ['semaphore/mutex'] +core_modules += ['error-handler'] + +foreach module : core_modules + if fs.exists(module) + core_includes += include_directories(module) + else + warning('Directory not found: @0@'.format(module)) + endif + file_name = module.split('/')[-1] + source_file = '@0@/@1@.cpp'.format(module, file_name) + if fs.exists(source_file) + core_sources += [source_file] + else + warning('File not found: @0@.cpp'.format(file_name)) + endif +endforeach + +core_lib = static_library('osal-core', + c_args : c_args, + cpp_args : cpp_args, + include_directories : core_includes, + sources : core_sources, + dependencies : free_rtos_dep +) + +core_dep = declare_dependency( + link_with: core_lib, + include_directories: core_includes, + dependencies: free_rtos_dep, + compile_args: cpp_args +) diff --git a/library/core/rtos/rtos.cpp b/library/core/rtos/rtos.cpp new file mode 100644 index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391 diff --git a/library/core/rtos/rtos.hpp b/library/core/rtos/rtos.hpp new file mode 100644 index 0000000000000000000000000000000000000000..c44230460d3aab38d6c20e581860bc88ce149991 --- /dev/null +++ b/library/core/rtos/rtos.hpp @@ -0,0 +1,11 @@ +#include <FreeRTOS.h> + +namespace osal { + +class Rtos { + public: + static void startScheduler() { vTaskStartScheduler(); } + static void suspendTasks() { vTaskSuspendAll(); } + static long resumeTasks() { return static_cast<long>(xTaskResumeAll()); } +}; +} // namespace osal diff --git a/library/core/semaphore/binary-semaphore/binary-semaphore.cpp b/library/core/semaphore/binary-semaphore/binary-semaphore.cpp new file mode 100644 index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391 diff --git a/library/core/semaphore/binary-semaphore/binary-semaphore.hpp b/library/core/semaphore/binary-semaphore/binary-semaphore.hpp new file mode 100644 index 0000000000000000000000000000000000000000..05712e1deb1f5a551e86abc6259c6642a6c4afb1 --- /dev/null +++ b/library/core/semaphore/binary-semaphore/binary-semaphore.hpp @@ -0,0 +1,24 @@ +#include "../semaphore.hpp" + +namespace osal { + +/** + * @brief Classe englobant le semaphore binaire de FreeRTOS + * + */ +class BinarySemaphore : public FreeRtosSemaphore { + public: + BinarySemaphore(const char* name, bool isLocked = false) + : FreeRtosSemaphore(name, initSemaphore()) { + if (!isLocked) + this->give(); + } + + virtual SemaphoreHandle_t initSemaphore() override { + return xSemaphoreCreateBinaryStatic(&buffer); + } + + virtual ~BinarySemaphore() {} +}; + +} diff --git a/library/core/semaphore/counting-semaphore/counting-semaphore.cpp b/library/core/semaphore/counting-semaphore/counting-semaphore.cpp new file mode 100644 index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391 diff --git a/library/core/semaphore/counting-semaphore/counting-semaphore.hpp b/library/core/semaphore/counting-semaphore/counting-semaphore.hpp new file mode 100644 index 0000000000000000000000000000000000000000..39aaa0181adfe97e9e9985c37ebafb76831c0ba9 --- /dev/null +++ b/library/core/semaphore/counting-semaphore/counting-semaphore.hpp @@ -0,0 +1,28 @@ +#include "../semaphore.hpp" + +namespace osal { + +/** + * @brief Classe englobant le semaphore counted de FreeRTOS + * + */ +class CountingSemaphore : public FreeRtosSemaphore { + public: + CountingSemaphore(const char* name, uint8_t maxCount, uint8_t intialCount) + : FreeRtosSemaphore(name, initSemaphore()), + m_maxCount(maxCount), + m_intialCount(intialCount) {} + + virtual SemaphoreHandle_t initSemaphore() override { + return xSemaphoreCreateCountingStatic(m_maxCount, m_intialCount, + &buffer); + } + + virtual ~CountingSemaphore() {} + + private: + const uint8_t m_maxCount; + const uint8_t m_intialCount; +}; + +} diff --git a/library/core/semaphore/mutex/mutex.cpp b/library/core/semaphore/mutex/mutex.cpp new file mode 100644 index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391 diff --git a/library/core/semaphore/mutex/mutex.hpp b/library/core/semaphore/mutex/mutex.hpp new file mode 100644 index 0000000000000000000000000000000000000000..743210b141c17d37fec93c2094f8179a5dcd8f68 --- /dev/null +++ b/library/core/semaphore/mutex/mutex.hpp @@ -0,0 +1,26 @@ +#include "../semaphore.hpp" + +namespace osal { + +/** + * @brief Classe englobant le semaphore mutex de FreeRTOS. La différence entre + * un mutex et un semaphore binaire est que le mutex utilise l'heritage de + * priorité. + * + */ +class Mutex : public FreeRtosSemaphore { + public: + Mutex(const char* name, bool isLocked = false) + : FreeRtosSemaphore(name, initSemaphore()) { + if (!isLocked) + this->give(); + } + + virtual SemaphoreHandle_t initSemaphore() override { + return xSemaphoreCreateMutexStatic(&buffer); + } + + virtual ~Mutex() {} +}; + +} // namespace osal diff --git a/library/core/semaphore/semaphore.cpp b/library/core/semaphore/semaphore.cpp new file mode 100644 index 0000000000000000000000000000000000000000..0b7a2d091d8097450f77fca49d40a6a83e1e2f26 --- /dev/null +++ b/library/core/semaphore/semaphore.cpp @@ -0,0 +1,41 @@ +#include "semaphore.hpp" + +namespace osal { + +/** + * @brief Constructeur generique pour un Sempahore FreeRTOS + * + * @param name Nom du semaphore (pour l'identification) + * @param semaphoreHandle Handle permettant de prendre et de donner le + * semaphore + */ +FreeRtosSemaphore::FreeRtosSemaphore(const char* name, + SemaphoreHandle_t semaphoreHandle) + : m_name(name) { + handle = semaphoreHandle; + if (handle == nullptr) { + for (;;) { /* simulate exception thrown "insufficient heap space" */ + } + } +} + +/** + * @brief bloquer une ressource du sémaphore + * + * @param timeMS Temps d'attente maximum du sempahore (si timeMS == + * portMAX_DELAY, pas de limite de temps) + * + */ +bool FreeRtosSemaphore::take(unsigned long timeMS = MAX_DELAY_TICK) { + return static_cast<bool>(xSemaphoreTake(handle, timeMS)); +} + +/** + * @brief libérer une ressource du sémaphore + * + */ +bool FreeRtosSemaphore::give() { + return static_cast<bool>(xSemaphoreGive(handle)); +} + +} // namespace osal diff --git a/library/core/semaphore/semaphore.hpp b/library/core/semaphore/semaphore.hpp new file mode 100644 index 0000000000000000000000000000000000000000..eb0fa4fcd223a41e6f40191d184bf7af71887568 --- /dev/null +++ b/library/core/semaphore/semaphore.hpp @@ -0,0 +1,50 @@ +/** + * FreeRtos Includes + */ +#include <FreeRTOS.h> +#include "queue.h" +#include "semphr.h" + +namespace { +constexpr unsigned long MAX_DELAY_TICK = portMAX_DELAY; +} + +namespace osal { + +/** + * @brief Interface générique d'un semaphore + * + */ +class ISemaphore { + public: + virtual bool take() = 0; + virtual bool give() = 0; + + virtual ~ISemaphore() {} +}; + +/** + * @brief Classe générique d'un semaphore dans FreeRTOS + * + */ +class FreeRtosSemaphore : public ISemaphore { + public: + FreeRtosSemaphore(const char* name, SemaphoreHandle_t handle); + + virtual bool take(unsigned long timeMS); + + virtual bool take() { return take(MAX_DELAY_TICK); } + + virtual bool give(); + + virtual ~FreeRtosSemaphore() {} + + protected: + virtual SemaphoreHandle_t initSemaphore() = 0; + + StaticSemaphore_t buffer; + SemaphoreHandle_t handle; + const char* m_name; +}; + +} // namespace osal diff --git a/library/core/task/itask.hpp b/library/core/task/itask.hpp new file mode 100644 index 0000000000000000000000000000000000000000..87d67d0c27244c33204a585eb12e1e89eb1004e3 --- /dev/null +++ b/library/core/task/itask.hpp @@ -0,0 +1,9 @@ + +class ITask { + public: + virtual void start() = 0; + virtual ~ITask() {} + + protected: + virtual void run() = 0; +}; diff --git a/library/core/task/task.cpp b/library/core/task/task.cpp new file mode 100644 index 0000000000000000000000000000000000000000..9c31a4219d160fd021c8192d4ef26d35b0c0661a --- /dev/null +++ b/library/core/task/task.cpp @@ -0,0 +1 @@ +#include "task.hpp" diff --git a/library/core/task/task.hpp b/library/core/task/task.hpp new file mode 100644 index 0000000000000000000000000000000000000000..77254e0eb91a124b8fc6916e9e9b3a1895c4654e --- /dev/null +++ b/library/core/task/task.hpp @@ -0,0 +1,46 @@ +/** + * FreeRTOS Includes + */ +#include <FreeRTOS.h> +#include <task.h> +#include <itask.hpp> + +/** + * STL Includes + */ +#include <array> + +namespace osal { + +template <std::size_t NStackSize = configMINIMAL_STACK_SIZE> +class Task : public ITask { + public: + constexpr static uint32_t DEFAULT_PRIORITY = (configMAX_PRIORITIES - 1); + + Task(const char* name, uint32_t priority = DEFAULT_PRIORITY) + : m_name(name), m_priority(priority) {} + + virtual ~Task() {} + + virtual void start() { + xTaskCreateStatic(Task::runTask, this->m_name, this->stack.size(), + (void*)this, this->m_priority, this->stack.data(), + &this->buffer); + } + + static void delayTick(int ticks) { vTaskDelay(ticks); } + static void delayMs(int ms) { vTaskDelay(ms / portTICK_RATE_MS); } + static void yield() { taskYIELD(); } + + private: + static void runTask(void* pvParameters) { ((Task*)pvParameters)->run(); } + + std::array<StackType_t, NStackSize> stack; + StaticTask_t buffer; + + protected: + const char* m_name; + const uint32_t m_priority; +}; + +} // namespace osal diff --git a/library/free-rtos/config/FreeRTOSConfig.h b/library/free-rtos/config/FreeRTOSConfig.h new file mode 100644 index 0000000000000000000000000000000000000000..7610a07779965b41277fbe446c5981592b101830 --- /dev/null +++ b/library/free-rtos/config/FreeRTOSConfig.h @@ -0,0 +1,156 @@ +/* + * FreeRTOS Kernel V10.4.3 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#ifndef FREERTOS_CONFIG_H +#define FREERTOS_CONFIG_H + +/*----------------------------------------------------------- + * Application specific definitions. + * + * These definitions should be adjusted for your particular hardware and + * application requirements. + * + * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE + * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. + * http://www.freertos.org/a00110.html + * + * The bottom of this file contains some constants specific to running the UDP + * stack in this demo. Constants specific to FreeRTOS+UDP itself (rather than + * the demo) are contained in FreeRTOSIPConfig.h. + *----------------------------------------------------------*/ + +#define configUSE_PREEMPTION 1 +#define configMAX_PRIORITIES 15 +#define configTICK_RATE_HZ 1000 +#define configMINIMAL_STACK_SIZE 256 +#define configMAX_TASK_NAME_LEN 32 +#define configUSE_TRACE_FACILITY 1 +#define configUSE_16_BIT_TICKS 0 +#define configIDLE_SHOULD_YIELD 1 +#define configUSE_TASK_NOTIFICATIONS 1 +#define configTASK_NOTIFICATION_ARRAY_ENTRIES 1 +#define configUSE_CO_ROUTINES 0 +#define configUSE_MUTEXES 1 +#define configUSE_RECURSIVE_MUTEXES 1 +#define configUSE_NEWLIB_REENTRANT 1 +#define configQUEUE_REGISTRY_SIZE 10 +#define configUSE_APPLICATION_TASK_TAG 0 +#define configUSE_COUNTING_SEMAPHORES 1 +#define configTIMER_TASK_STACK_DEPTH 256 +#define configUSE_TIME_SLICING 1 +#define configUSE_QUEUE_SETS 1 // Allows semaphores, mutexes, etc to block +#define configUSE_TIME_SLICING \ + 1 // Allows tasks with same priority to share cpu time + +/* Memory allocation related definitions. */ +#define configSUPPORT_STATIC_ALLOCATION 1 +#define configSUPPORT_DYNAMIC_ALLOCATION 0 + +/* Hook function related definitions. */ +#define configUSE_TICK_HOOK 0 +#define configUSE_IDLE_HOOK 0 +#define configUSE_MALLOC_FAILED_HOOK 1 +#define configCHECK_FOR_STACK_OVERFLOW 2 + +/* Run time stats gathering definitions. */ +unsigned long ulGetRunTimeCounterValue(void); +void vConfigureTimerForRunTimeStats(void); +#define configGENERATE_RUN_TIME_STATS 0 +#define configUSE_STATS_FORMATTING_FUNCTIONS 0 + +/* Co-routine definitions. */ +#define configUSE_CO_ROUTINES 0 +#define configMAX_CO_ROUTINE_PRIORITIES (2) + +/* Set the following definitions to 1 to include the API function, or zero +to exclude the API function. */ +#define INCLUDE_vTaskPrioritySet 1 +#define INCLUDE_uxTaskPriorityGet 1 +#define INCLUDE_vTaskDelete 1 +#define INCLUDE_vTaskSuspend 1 +#define INCLUDE_xResumeFromISR 1 +#define INCLUDE_vTaskDelayUntil 1 +#define INCLUDE_vTaskDelay 1 +#define INCLUDE_xTaskGetSchedulerState 1 +#define INCLUDE_xTaskGetCurrentTaskHandle 1 +#define INCLUDE_uxTaskGetStackHighWaterMark 1 +#define INCLUDE_xTaskGetIdleTaskHandle 1 +#define INCLUDE_eTaskGetState 1 +#define INCLUDE_xEventGroupSetBitFromISR 1 +#define INCLUDE_xTimerPendFunctionCall 0 +#define INCLUDE_xTaskAbortDelay 1 +#define INCLUDE_xTaskGetHandle 1 +#define INCLUDE_xTaskResumeFromISR 1 + +void assert_failed(const char* file, uint32_t line); +#define configASSERT(x) \ + if ((x) == 0) \ + assert_failed(__FILE__, __LINE__) + +/* Ensure stdint is only used by the compiler, and not the assembler. */ +#if defined(__ICCARM__) || defined(__CC_ARM) || defined(__GNUC__) +#include <stdint.h> +extern uint32_t SystemCoreClock; +#endif + +#define configCPU_CLOCK_HZ (SystemCoreClock) + +/* Cortex-M specific definitions. */ +#ifdef __NVIC_PRIO_BITS +/* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */ +#define configPRIO_BITS __NVIC_PRIO_BITS +#else +#define configPRIO_BITS 4 /* 15 priority levels */ +#endif + +/* The lowest interrupt priority that can be used in a call to a "set priority" +function. */ +#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 0xf + +/* The highest interrupt priority that can be used by any interrupt service +routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL +INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER +PRIORITY THAN THIS! (higher priorities are lower numeric values. */ +#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5 + +/* Interrupt priorities used by the kernel port layer itself. These are generic +to all Cortex-M ports, and do not rely on any particular library functions. */ +#define configKERNEL_INTERRUPT_PRIORITY \ + (configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS)) +/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!! +See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */ +#define configMAX_SYSCALL_INTERRUPT_PRIORITY \ + (configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS)) + +/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS +standard names. */ +#define vPortSVCHandler SVC_Handler +#define xPortPendSVHandler PendSV_Handler +#define xPortSysTickHandler SysTick_Handler + +#endif /* FREERTOS_CONFIG_H */ diff --git a/library/free-rtos/meson.build b/library/free-rtos/meson.build new file mode 100644 index 0000000000000000000000000000000000000000..50bd5f11db648152a349e42c52423b23ff3ef824 --- /dev/null +++ b/library/free-rtos/meson.build @@ -0,0 +1,14 @@ +free_rtos_dep = dependency('free_rtos', fallback : ['free_rtos', 'free_rtos_dep'], include_type: 'system') + +free_rtos_lib = static_library('free_rtos', + c_args : [c_args], + include_directories : [include_directories('config')], + dependencies : [free_rtos_dep] +) + +free_rtos_dep = declare_dependency( + include_directories : [include_directories('config')], + link_with: free_rtos_lib, + dependencies: [free_rtos_dep] +) + diff --git a/library/meson.build b/library/meson.build new file mode 100644 index 0000000000000000000000000000000000000000..d95340630fe3b72d2c68686b37c7ada93acaff9f --- /dev/null +++ b/library/meson.build @@ -0,0 +1,41 @@ +project('Machine PM Unicorn-OSAL library', ['cpp'], + version: '0.1.0', + license: 'MIT', + default_options: ['warning_level=3', 'cpp_std=c++17'] + ) + +c_args = [] +c_args += ['-DSTM32F072xB'] +c_args += ['-Wall'] +c_args += ['-Wextra'] +c_args += ['-Wshadow'] +c_args += ['-Wdouble-promotion'] +c_args += ['-Wformat=2'] +c_args += ['-Wformat-overflow'] +c_args += ['-Wformat-truncation'] +c_args += ['-Wundef'] +c_args += ['-Wstrict-overflow'] +c_args += ['-Wcast-align'] +# c_args += ['-Wconversion'] +c_args += ['-Wpacked'] +c_args += ['-Wno-unused-result'] +c_args += ['-fno-common'] +c_args += ['-fstack-usage'] +c_args += ['-funsigned-bitfields'] +c_args += ['-funsigned-char'] +c_args += ['-Os'] +c_args += ['-ffunction-sections'] +c_args += ['-fdata-sections'] +c_args += ['-fshort-enums'] +cpp_args = c_args + +subdir('free-rtos') +subdir('core') + + +osal_dep = declare_dependency( + link_with: core_lib, + include_directories: core_includes, + dependencies: [core_dep, free_rtos_dep], + compile_args: cpp_args +) diff --git a/meson.build b/meson.build new file mode 100644 index 0000000000000000000000000000000000000000..7d242d52449f3df7eab9694336e52ac0e9c950d6 --- /dev/null +++ b/meson.build @@ -0,0 +1,42 @@ +project('Unicorn OSAL', ['cpp'], + version: '0.1.0', + license: 'MIT', + default_options: ['warning_level=3', 'cpp_std=c++17'] + ) + +c_args = [] +c_args += ['-DSTM32F072xB'] +c_args += ['-Wall'] +c_args += ['-Wextra'] +c_args += ['-Wshadow'] +c_args += ['-Wdouble-promotion'] +c_args += ['-Wformat=2'] +c_args += ['-Wformat-overflow'] +c_args += ['-Wformat-truncation'] +c_args += ['-Wundef'] +c_args += ['-Wstrict-overflow'] +c_args += ['-Wcast-align'] +# c_args += ['-Wconversion'] +c_args += ['-Wpacked'] +c_args += ['-Wno-unused-result'] +c_args += ['-fno-common'] +# c_args += ['-fstack-usage'] +c_args += ['-funsigned-bitfields'] +c_args += ['-funsigned-char'] +c_args += ['-Os'] +c_args += ['-ffunction-sections'] +c_args += ['-fdata-sections'] +c_args += ['-fshort-enums'] +cpp_args = c_args + +subdir('library/free-rtos') +subdir('library/core') +subdir('docs') + + +osal_dep = declare_dependency( + link_with: core_lib, + include_directories: core_includes, + dependencies: [core_dep, free_rtos_dep], + compile_args: cpp_args +) diff --git a/meson/cross/arm.ini b/meson/cross/arm.ini new file mode 100644 index 0000000000000000000000000000000000000000..f6fba1d476a95d8e9aa2e593fee11ecaf20f761b --- /dev/null +++ b/meson/cross/arm.ini @@ -0,0 +1,42 @@ +[constants] +arch = 'arm-none-eabi-' +common_args = ['-mcpu=' + current_cpu, '-mthumb', '-fstack-usage'] +common_link_args = [ + '-mcpu=' + current_cpu, + '-Wl,-Map,output.map', + '-Wl,--gc-sections', + '-mfloat-abi=soft', + '-mthumb', + '-lm', + '-lnosys', + '--specs=nosys.specs', + '--specs=nano.specs', + '-u _printf_float' + ] + +[binaries] +c = arch + 'gcc' +cpp = arch + 'g++' +ar = arch + 'ar' +as = arch + 'as' +gdb = arch + 'gdb' +ld = arch + 'ld' +objdump = arch + 'objdump' +objcopy = arch + 'objcopy' +size = arch + 'size' +strip = arch + 'strip' + + +[built-in options] +c_args = common_args +cpp_args = common_args + ['-fno-exceptions', '-fno-non-call-exceptions', '-fno-rtti', '-fno-use-cxa-atexit'] +c_link_args = common_link_args +cpp_link_args = common_link_args + + + +[host_machine] +system = 'none' +cpu_family = 'arm' +cpu = current_cpu +endian = 'little' diff --git a/meson/cross/cortex-m0.ini b/meson/cross/cortex-m0.ini new file mode 100644 index 0000000000000000000000000000000000000000..9ba3e4cefc7768bffa012991047983eb78d4f247 --- /dev/null +++ b/meson/cross/cortex-m0.ini @@ -0,0 +1,2 @@ +[constants] +current_cpu='cortex-m0' diff --git a/meson/native/clang.ini b/meson/native/clang.ini new file mode 100644 index 0000000000000000000000000000000000000000..3d3c5023106bbdcaa0e6bb7dff54a744f1394064 --- /dev/null +++ b/meson/native/clang.ini @@ -0,0 +1,17 @@ +[binaries] +c = 'clang' +cpp = 'clang++' +asm = 'clang' + +[constants] +common_flags = ['-Wall'] + +[built-in options] +c_args = common_flags # '-Wno-psabi --specs=nosys.specs -mcpu=cortex-m0 -mthumb -mthumb-interwork -fdata-sections -ffunction-sections -Wl --gc-sections' +cpp_args = common_flags + +[host_machine] +system = 'linux' +cpu_family = 'x86_64' +cpu = 'x86_64' +endian = 'little' diff --git a/meson/native/gnu.ini b/meson/native/gnu.ini new file mode 100644 index 0000000000000000000000000000000000000000..041d741c6da4b430c8b1b4e7d11a354c9c4d8084 --- /dev/null +++ b/meson/native/gnu.ini @@ -0,0 +1,18 @@ +[binaries] +c = 'gcc' +cpp = 'g++' +asm = 'gcc' +strip = 'strip' + +[constants] +common_flags = ['-Wall'] + +[built-in options] +c_args = common_flags # '-Wno-psabi --specs=nosys.specs -mcpu=cortex-m0 -mthumb -mthumb-interwork -fdata-sections -ffunction-sections -Wl --gc-sections' +cpp_args = common_flags + +[host_machine] +system = 'linux' +cpu_family = 'x86_64' +cpu = 'x86_64' +endian = 'little' \ No newline at end of file diff --git a/samples/config/STM32F072RBTX_FLASH.ld b/samples/config/STM32F072RBTX_FLASH.ld new file mode 100644 index 0000000000000000000000000000000000000000..032345d4791c1c420ee9ce17da805ed814984517 --- /dev/null +++ b/samples/config/STM32F072RBTX_FLASH.ld @@ -0,0 +1,169 @@ +/* +***************************************************************************** +** + +** File : LinkerScript.ld +** +** Abstract : Linker script for STM32F072RBTx Device with +** 128KByte FLASH, 16KByte RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** +** Distribution: The file is distributed as is, without any warranty +** of any kind. +** +** (c)Copyright Ac6. +** You may use this file as-is or modify it according to the needs of your +** project. Distribution of this file (unmodified or modified) is not +** permitted. Ac6 permit registered System Workbench for MCU users the +** rights to distribute the assembled, compiled & linked contents of this +** file as part of an application binary file, provided that it is built +** using the System Workbench for MCU toolchain. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x20004000; /* end of RAM */ +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ +FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 128K +RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 16K +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data goes into FLASH */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >FLASH + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM AT> FLASH + + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} + + diff --git a/samples/config/startup_stm32f072xb.s b/samples/config/startup_stm32f072xb.s new file mode 100644 index 0000000000000000000000000000000000000000..f6df49e0428420642f6d32c51404474de49e4371 --- /dev/null +++ b/samples/config/startup_stm32f072xb.s @@ -0,0 +1,294 @@ +/** + ****************************************************************************** + * @file startup_stm32f072xb.s + * @author MCD Application Team + * @brief STM32F072x8/STM32F072xB devices vector table for GCC toolchain. + * This module performs: + * - Set the initial SP + * - Set the initial PC == Reset_Handler, + * - Set the vector table entries with the exceptions ISR address + * - Branches to main in the C library (which eventually + * calls main()). + * After Reset the Cortex-M0 processor is in Thread mode, + * priority is Privileged, and the Stack is set to Main. + ****************************************************************************** + * @attention + * + * <h2><center>© Copyright (c) 2016 STMicroelectronics. + * All rights reserved.</center></h2> + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + + .syntax unified + .cpu cortex-m0 + .fpu softvfp + .thumb + +.global g_pfnVectors +.global Default_Handler + +/* start address for the initialization values of the .data section. +defined in linker script */ +.word _sidata +/* start address for the .data section. defined in linker script */ +.word _sdata +/* end address for the .data section. defined in linker script */ +.word _edata +/* start address for the .bss section. defined in linker script */ +.word _sbss +/* end address for the .bss section. defined in linker script */ +.word _ebss + + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr r0, =_estack + mov sp, r0 /* set stack pointer */ + +/* Copy the data segment initializers from flash to SRAM */ + ldr r0, =_sdata + ldr r1, =_edata + ldr r2, =_sidata + movs r3, #0 + b LoopCopyDataInit + +CopyDataInit: + ldr r4, [r2, r3] + str r4, [r0, r3] + adds r3, r3, #4 + +LoopCopyDataInit: + adds r4, r0, r3 + cmp r4, r1 + bcc CopyDataInit + +/* Zero fill the bss segment. */ + ldr r2, =_sbss + ldr r4, =_ebss + movs r3, #0 + b LoopFillZerobss + +FillZerobss: + str r3, [r2] + adds r2, r2, #4 + +LoopFillZerobss: + cmp r2, r4 + bcc FillZerobss + +/* Call the clock system intitialization function.*/ + bl SystemInit +/* Call static constructors */ + bl __libc_init_array +/* Call the application's entry point.*/ + bl main + +LoopForever: + b LoopForever + + +.size Reset_Handler, .-Reset_Handler + +/** + * @brief This is the code that gets called when the processor receives an + * unexpected interrupt. This simply enters an infinite loop, preserving + * the system state for examination by a debugger. + * + * @param None + * @retval : None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + .size Default_Handler, .-Default_Handler +/****************************************************************************** +* +* The minimal vector table for a Cortex M0. Note that the proper constructs +* must be placed on this to ensure that it ends up at physical address +* 0x0000.0000. +* +******************************************************************************/ + .section .isr_vector,"a",%progbits + .type g_pfnVectors, %object + .size g_pfnVectors, .-g_pfnVectors + + +g_pfnVectors: + .word _estack + .word Reset_Handler + .word NMI_Handler + .word HardFault_Handler + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word SVC_Handler + .word 0 + .word 0 + .word PendSV_Handler + .word SysTick_Handler + .word WWDG_IRQHandler /* Window WatchDog */ + .word PVD_VDDIO2_IRQHandler /* PVD and VDDIO2 through EXTI Line detect */ + .word RTC_IRQHandler /* RTC through the EXTI line */ + .word FLASH_IRQHandler /* FLASH */ + .word RCC_CRS_IRQHandler /* RCC and CRS */ + .word EXTI0_1_IRQHandler /* EXTI Line 0 and 1 */ + .word EXTI2_3_IRQHandler /* EXTI Line 2 and 3 */ + .word EXTI4_15_IRQHandler /* EXTI Line 4 to 15 */ + .word TSC_IRQHandler /* TSC */ + .word DMA1_Channel1_IRQHandler /* DMA1 Channel 1 */ + .word DMA1_Channel2_3_IRQHandler /* DMA1 Channel 2 and Channel 3 */ + .word DMA1_Channel4_5_6_7_IRQHandler /* DMA1 Channel 4, Channel 5, Channel 6 and Channel 7*/ + .word ADC1_COMP_IRQHandler /* ADC1, COMP1 and COMP2 */ + .word TIM1_BRK_UP_TRG_COM_IRQHandler /* TIM1 Break, Update, Trigger and Commutation */ + .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */ + .word TIM2_IRQHandler /* TIM2 */ + .word TIM3_IRQHandler /* TIM3 */ + .word TIM6_DAC_IRQHandler /* TIM6 and DAC */ + .word TIM7_IRQHandler /* TIM7 */ + .word TIM14_IRQHandler /* TIM14 */ + .word TIM15_IRQHandler /* TIM15 */ + .word TIM16_IRQHandler /* TIM16 */ + .word TIM17_IRQHandler /* TIM17 */ + .word I2C1_IRQHandler /* I2C1 */ + .word I2C2_IRQHandler /* I2C2 */ + .word SPI1_IRQHandler /* SPI1 */ + .word SPI2_IRQHandler /* SPI2 */ + .word USART1_IRQHandler /* USART1 */ + .word USART2_IRQHandler /* USART2 */ + .word USART3_4_IRQHandler /* USART3 and USART4 */ + .word CEC_CAN_IRQHandler /* CEC and CAN */ + .word USB_IRQHandler /* USB */ + +/******************************************************************************* +* +* Provide weak aliases for each Exception handler to the Default_Handler. +* As they are weak aliases, any function with the same name will override +* this definition. +* +*******************************************************************************/ + + .weak NMI_Handler + .thumb_set NMI_Handler,Default_Handler + + .weak HardFault_Handler + .thumb_set HardFault_Handler,Default_Handler + + .weak SVC_Handler + .thumb_set SVC_Handler,Default_Handler + + .weak PendSV_Handler + .thumb_set PendSV_Handler,Default_Handler + + .weak SysTick_Handler + .thumb_set SysTick_Handler,Default_Handler + + .weak WWDG_IRQHandler + .thumb_set WWDG_IRQHandler,Default_Handler + + .weak PVD_VDDIO2_IRQHandler + .thumb_set PVD_VDDIO2_IRQHandler,Default_Handler + + .weak RTC_IRQHandler + .thumb_set RTC_IRQHandler,Default_Handler + + .weak FLASH_IRQHandler + .thumb_set FLASH_IRQHandler,Default_Handler + + .weak RCC_CRS_IRQHandler + .thumb_set RCC_CRS_IRQHandler,Default_Handler + + .weak EXTI0_1_IRQHandler + .thumb_set EXTI0_1_IRQHandler,Default_Handler + + .weak EXTI2_3_IRQHandler + .thumb_set EXTI2_3_IRQHandler,Default_Handler + + .weak EXTI4_15_IRQHandler + .thumb_set EXTI4_15_IRQHandler,Default_Handler + + .weak TSC_IRQHandler + .thumb_set TSC_IRQHandler,Default_Handler + + .weak DMA1_Channel1_IRQHandler + .thumb_set DMA1_Channel1_IRQHandler,Default_Handler + + .weak DMA1_Channel2_3_IRQHandler + .thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler + + .weak DMA1_Channel4_5_6_7_IRQHandler + .thumb_set DMA1_Channel4_5_6_7_IRQHandler,Default_Handler + + .weak ADC1_COMP_IRQHandler + .thumb_set ADC1_COMP_IRQHandler,Default_Handler + + .weak TIM1_BRK_UP_TRG_COM_IRQHandler + .thumb_set TIM1_BRK_UP_TRG_COM_IRQHandler,Default_Handler + + .weak TIM1_CC_IRQHandler + .thumb_set TIM1_CC_IRQHandler,Default_Handler + + .weak TIM2_IRQHandler + .thumb_set TIM2_IRQHandler,Default_Handler + + .weak TIM3_IRQHandler + .thumb_set TIM3_IRQHandler,Default_Handler + + .weak TIM6_DAC_IRQHandler + .thumb_set TIM6_DAC_IRQHandler,Default_Handler + + .weak TIM7_IRQHandler + .thumb_set TIM7_IRQHandler,Default_Handler + + .weak TIM14_IRQHandler + .thumb_set TIM14_IRQHandler,Default_Handler + + .weak TIM15_IRQHandler + .thumb_set TIM15_IRQHandler,Default_Handler + + .weak TIM16_IRQHandler + .thumb_set TIM16_IRQHandler,Default_Handler + + .weak TIM17_IRQHandler + .thumb_set TIM17_IRQHandler,Default_Handler + + .weak I2C1_IRQHandler + .thumb_set I2C1_IRQHandler,Default_Handler + + .weak I2C2_IRQHandler + .thumb_set I2C2_IRQHandler,Default_Handler + + .weak SPI1_IRQHandler + .thumb_set SPI1_IRQHandler,Default_Handler + + .weak SPI2_IRQHandler + .thumb_set SPI2_IRQHandler,Default_Handler + + .weak USART1_IRQHandler + .thumb_set USART1_IRQHandler,Default_Handler + + .weak USART2_IRQHandler + .thumb_set USART2_IRQHandler,Default_Handler + + .weak USART3_4_IRQHandler + .thumb_set USART3_4_IRQHandler,Default_Handler + + .weak CEC_CAN_IRQHandler + .thumb_set CEC_CAN_IRQHandler,Default_Handler + + .weak USB_IRQHandler + .thumb_set USB_IRQHandler,Default_Handler + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ + diff --git a/samples/meson.build b/samples/meson.build new file mode 100644 index 0000000000000000000000000000000000000000..c0acde63a3007303daf57cdc863a6166b58e6e22 --- /dev/null +++ b/samples/meson.build @@ -0,0 +1,37 @@ +project('Samples', ['cpp', 'c'], + version: '0.1.0', + license: 'MIT', + default_options: ['warning_level=3', 'cpp_std=c++17'] + ) + + +hal_dep = dependency('hal-lib', fallback : ['hal-lib', 'hal_dep'], include_type: 'system') +osal_dep = dependency('osal-lib', fallback : ['osal-lib', 'osal_dep'], include_type: 'system') + +startup_stm32f072xb_file = files(meson.current_source_dir() + '/config/startup_stm32f072xb.s') + +linker_files = ['STM32F072RBTX_FLASH.ld'] +link_args = [] + +foreach linkfile : linker_files + link_args += ['-Wl,-T@0@/config/@1@'.format(meson.current_source_dir(), linkfile)] +endforeach + +samples = [] +samples += ['task'] +samples += ['semaphore'] + +foreach sample : samples + executable( + sample, + sources : ['@0@/main.cpp'.format(sample), startup_stm32f072xb_file], + install : true, + name_suffix : 'elf', + link_args : [link_args], + dependencies: [ + hal_dep, + osal_dep + ]) + + +endforeach diff --git a/samples/semaphore/main.cpp b/samples/semaphore/main.cpp new file mode 100644 index 0000000000000000000000000000000000000000..3ee9b76f9fa6b2baa9e2c927291efba28787d9da --- /dev/null +++ b/samples/semaphore/main.cpp @@ -0,0 +1,124 @@ +#include <stdio.h> +#include <array> +#include <string> + +#include <mutex.hpp> +#include <rtos.hpp> +#include <task.hpp> + +#include <stm32f0xx.h> +#include <gpio.hpp> + +using namespace osal; +using namespace stm32f072xb; +// https://www.st.com/resource/en/reference_manual/dm00031936-stm32f0x1stm32f0x2stm32f0x8-advanced-armbased-32bit-mcus-stmicroelectronics.pdf + +constexpr uint32_t ledPin = 5; +ISemaphore* SemaphoreList[2]; + +void enableGpio() { + // Gpio gpio = Gpio(); + SET_BIT(RCC->AHBENR, RCC_AHBENR_GPIOAEN); // enable GPIOA (p.120) + SET_BIT(RCC->AHBENR, RCC_AHBENR_GPIOCEN); // enable GPIOC (p.120) +} + +void setupLed(const uint32_t ledPin) { + // LED + + GPIOA->MODER |= (0x1 << (ledPin * 2)); // Output mode (p.157) + CLEAR_BIT(GPIOA->OTYPER, (1 << ledPin)); // Push-pull output (p.157) +} + +void defaultAssert(const char* file, uint32_t line) { + SET_BIT(GPIOA->ODR, 1 << ledPin); +} + +class TaskA : public Task<> { + public: + TaskA() : Task("Task A") {} + + ISemaphore* ledSemaphore = SemaphoreList[0]; + + protected: + virtual void run() override { + for (;;) { + ledSemaphore->take(); + for (int i = 0; i < 2; i++) { + SET_BIT(GPIOA->ODR, 1 << ledPin); + Task::delayMs(500); + CLEAR_BIT(GPIOA->ODR, 1 << ledPin); + Task::delayMs(500); + } + ledSemaphore->give(); + Task::yield(); + } + } +}; + +class TaskB : public Task<> { + public: + TaskB() : Task("Task B") {} + + ISemaphore* ledSemaphore = SemaphoreList[0]; + + protected: + virtual void run() override { + for (;;) { + ledSemaphore->take(); + for (int i = 0; i < 5; i++) { + SET_BIT(GPIOA->ODR, 1 << ledPin); + Task::delayMs(200); + CLEAR_BIT(GPIOA->ODR, 1 << ledPin); + Task::delayMs(200); + } + ledSemaphore->give(); + Task::yield(); + } + } +}; + +class TaskC : public Task<> { + public: + TaskC() : Task("Task C") {} + + ISemaphore* ledSemaphore = SemaphoreList[0]; + + protected: + virtual void run() override { + for (;;) { + ledSemaphore->take(); + for (int i = 0; i < 20; i++) { + SET_BIT(GPIOA->ODR, 1 << ledPin); + Task::delayMs(50); + CLEAR_BIT(GPIOA->ODR, 1 << ledPin); + Task::delayMs(50); + } + ledSemaphore->give(); + Task::yield(); + } + } +}; + +int main() { + enableGpio(); + setupLed(ledPin); + + Mutex ledSemaphore = Mutex("Led Semaphore", false); + SemaphoreList[0] = &ledSemaphore; + + TaskA taskA; + taskA.start(); + + TaskB taskB; + taskB.start(); + + TaskC taskC; + taskC.start(); + + Rtos::startScheduler(); + + for (;;) { + } + + return 0; +} diff --git a/samples/subprojects/cmsis-core.wrap b/samples/subprojects/cmsis-core.wrap new file mode 100644 index 0000000000000000000000000000000000000000..fd051776d4a3df95ae7dfc7734fa31308a55775a --- /dev/null +++ b/samples/subprojects/cmsis-core.wrap @@ -0,0 +1,2 @@ +[wrap-redirect] +filename = hal-lib/subprojects/cmsis-core.wrap diff --git a/samples/subprojects/cmsis-f0.wrap b/samples/subprojects/cmsis-f0.wrap new file mode 100644 index 0000000000000000000000000000000000000000..ca56faeb584ce0421d16f72f92a127dbee399e3b --- /dev/null +++ b/samples/subprojects/cmsis-f0.wrap @@ -0,0 +1,2 @@ +[wrap-redirect] +filename = hal-lib/subprojects/cmsis-f0.wrap diff --git a/samples/subprojects/free_rtos.wrap b/samples/subprojects/free_rtos.wrap new file mode 100644 index 0000000000000000000000000000000000000000..c79b485335f2a12f3974a9f9b7f169a3b1eab4fb --- /dev/null +++ b/samples/subprojects/free_rtos.wrap @@ -0,0 +1,2 @@ +[wrap-redirect] +filename = osal-lib/subprojects/free_rtos.wrap diff --git a/samples/subprojects/hal-lib b/samples/subprojects/hal-lib new file mode 160000 index 0000000000000000000000000000000000000000..84d45b49eb503e13742f7bd3fa09eb6b88a90393 --- /dev/null +++ b/samples/subprojects/hal-lib @@ -0,0 +1 @@ +Subproject commit 84d45b49eb503e13742f7bd3fa09eb6b88a90393 diff --git a/samples/subprojects/hal-lib.wrap b/samples/subprojects/hal-lib.wrap new file mode 100644 index 0000000000000000000000000000000000000000..760c9a425a607e769049a54e3f1401fb915753ae --- /dev/null +++ b/samples/subprojects/hal-lib.wrap @@ -0,0 +1,3 @@ +[wrap-git] +url=https://git.step.polymtl.ca/machine-epm/unicorn-hal.git +revision=head diff --git a/samples/task/main.cpp b/samples/task/main.cpp new file mode 100644 index 0000000000000000000000000000000000000000..ae846238a70ce7b452573cade9d2b4b115ebe656 --- /dev/null +++ b/samples/task/main.cpp @@ -0,0 +1,93 @@ +#include <stdio.h> +#include <array> +#include <string> + +#include "FreeRTOS.h" +#include "queue.h" /* RTOS queue related API prototypes. */ +#include "semphr.h" /* Semaphore related API prototypes. */ +#include "task.h" /* RTOS task related API prototypes. */ +#include "timers.h" /* Software timer related API prototypes. */ + +#include <error-handler.hpp> +#include <rtos.hpp> +#include <task.hpp> + +#include <stm32f0xx.h> +#include <gpio.hpp> + +using namespace osal; +using namespace stm32f072xb; +// https://www.st.com/resource/en/reference_manual/dm00031936-stm32f0x1stm32f0x2stm32f0x8-advanced-armbased-32bit-mcus-stmicroelectronics.pdf + +constexpr uint32_t ledPin = 5; + +void enableGpio() { + // Gpio gpio = Gpio(); + SET_BIT(RCC->AHBENR, RCC_AHBENR_GPIOAEN); // enable GPIOA (p.120) + SET_BIT(RCC->AHBENR, RCC_AHBENR_GPIOCEN); // enable GPIOC (p.120) +} + +void setupLed(const uint32_t ledPin) { + // LED + CLEAR_BIT(GPIOA->MODER, (0x3 << ledPin * 2)); + GPIOA->MODER |= (0x1 << (ledPin * 2)); // Output mode (p.157) + CLEAR_BIT(GPIOA->OTYPER, (1 << ledPin)); // Push-pull output (p.157) +} + +#define mainQUEUE_LENGTH 1 +StaticSemaphore_t sem; +StaticSemaphore_t sem2; + +class LedOnTask : public Task<> { + public: + LedOnTask() : Task("Led On") {} + + bool active = true; + + protected: + virtual void run() override { + for (;;) { + active = !active; + vTaskDelay(2000 / portTICK_PERIOD_MS); + if (active) { + SET_BIT(GPIOA->ODR, 1 << ledPin); // turn on LED, p.159 + } + } + } +}; + +class LedOffTask : public Task<512> { + public: + LedOffTask() : Task("Led Off") {} + + bool active = false; + + protected: + virtual void run() override { + for (;;) { + active = !active; + vTaskDelay(2000 / portTICK_PERIOD_MS); + if (active) { + CLEAR_BIT(GPIOA->ODR, 1 << ledPin); // turn off LED, p.159 + } + } + } +}; + +int main(void) { + enableGpio(); + setupLed(ledPin); + + LedOnTask task1; + task1.start(); + + LedOffTask task2; + task2.start(); + + Rtos::startScheduler(); + + while (1) + ; + + return 0; +} diff --git a/subprojects/free_rtos.wrap b/subprojects/free_rtos.wrap new file mode 100644 index 0000000000000000000000000000000000000000..030290b1fe450c72d17f176a2b29f820591928c6 --- /dev/null +++ b/subprojects/free_rtos.wrap @@ -0,0 +1,4 @@ +[wrap-git] +url=https://github.com/FreeRTOS/FreeRTOS-Kernel.git +revision=head +patch_directory=free_rtos diff --git a/subprojects/packagefiles/free_rtos/meson.build b/subprojects/packagefiles/free_rtos/meson.build new file mode 100644 index 0000000000000000000000000000000000000000..0dd447c7fcbe5b89456f4bf4496f0ebb20f3bdb4 --- /dev/null +++ b/subprojects/packagefiles/free_rtos/meson.build @@ -0,0 +1,24 @@ + +project('FreeRTOS', 'c') + +includes = [] +sources = [] + +includes += include_directories('include') +includes += include_directories('portable/GCC/ARM_CM0') + +sources += ['portable/GCC/ARM_CM0/port.c'] +sources += ['croutine.c'] +sources += ['event_groups.c'] +sources += ['list.c'] +sources += ['queue.c'] +sources += ['stream_buffer.c'] +sources += ['tasks.c'] +sources += ['timers.c'] + +sources = files(sources) + +free_rtos_dep = declare_dependency( + include_directories : includes, + sources : sources +)