diff --git a/compteur/scripts/pnr.tcl b/compteur/scripts/pnr.tcl
index 0e3a0ceadb6e8e55c2c8a17205788cd7ec6b4002..66b3198c51c7f2c4926e417ef7e30779c5556bd1 100644
--- a/compteur/scripts/pnr.tcl
+++ b/compteur/scripts/pnr.tcl
@@ -10,6 +10,11 @@
# HOW-TO : source setup.csh && cd implementation/pnr && innovus
# : innovus -files ${SCRIPTS_DIR}/pnr.tcl
#-----------------------------------------------------------------------------
+package require Tcl 8.5
+
+if { ![info exist ::env(PROJECT_HOME)] } {
+ error "ERREUR: Configurer l'environnement (source setup.csh) avant d'utiliser ce script"
+}
#-----------------------------------------------------------------------------
# CONFIG
@@ -26,6 +31,9 @@ set DO_SAVE 1
set DESIGN compteur
+# Create directories if they do not exists
+file mkdir $::env(PNR_REP_DIR) $::env(PNR_NET_DIR)
+
#-----------------------------------------------------------------------------
# INIT
#-----------------------------------------------------------------------------
@@ -47,17 +55,17 @@ if { $DO_INIT } {
#-----------------------------------------------------------------------------
if { $DO_FP } {
- floorPlan -site CoreSite -r 0.9 0.6 1 1 1 1
+ floorPlan -site CoreSite -r 0.9 0.6 1 1 1 1
}
#-----------------------------------------------------------------------------
# ALIMENTATIONS
#-----------------------------------------------------------------------------
if { $DO_POWER } {
-
+
globalNetConnect VDD -type pgpin -pin VDD -inst * -override
globalNetConnect VSS -type pgpin -pin VSS -inst * -override
- globalNetConnect VDD -type tiehi -inst * -override
+ globalNetConnect VDD -type tiehi -inst * -override
globalNetConnect VSS -type tielo -inst * -override
addStripe -nets VDD \
@@ -67,7 +75,7 @@ if { $DO_POWER } {
-number_of_sets 1 \
-start_from left \
-start_offset -0.8
-
+
addStripe -nets VSS \
-layer Metal1 \
-direction vertical \
@@ -78,7 +86,7 @@ if { $DO_POWER } {
sroute -nets { VDD VSS } \
-connect { corePin floatingStripe } \
- -layerChangeRange { Metal1(1) Metal1(1) }
+ -layerChangeRange { Metal1(1) Metal1(1) }
}
#-----------------------------------------------------------------------------
@@ -86,20 +94,20 @@ if { $DO_POWER } {
#-----------------------------------------------------------------------------
if { $DO_IO } {
- # Nets
+ # Nets
set top_nets [list [get_nets -quiet "i_clk"] \
[get_nets -quiet "i_rstn"] \
[get_nets -quiet "i_en"]]
-
+
set bottom_nets [list [get_nets -quiet "o_cnt[*]"]]
- set top_n [list ]
- foreach nets $top_nets {foreach_in_collection n $nets {lappend top_n [get_object_name $n]}}
+ set top_n [list ]
+ foreach nets $top_nets {foreach_in_collection n $nets {lappend top_n [get_object_name $n]}}
+
+ set bottom_n [list ]
+ foreach nets $bottom_nets {foreach_in_collection n $nets {lappend bottom_n [get_object_name $n]}}
- set bottom_n [list ]
- foreach nets $bottom_nets {foreach_in_collection n $nets {lappend bottom_n [get_object_name $n]}}
-
- setPinAssignMode -pinEditInBatch true
+ setPinAssignMode -pinEditInBatch true
editPin -pin "${top_n}" -side Top -layer 2 \
-pinWidth 0.06 -pinDepth 0.335 \
@@ -109,18 +117,19 @@ if { $DO_IO } {
editPin -pin "${bottom_n}" -side Bottom -layer 2 \
-pinWidth 0.08 -pinDepth 0.25 \
-spreadDirection counterclockwise -spreadType range \
- -start 1 0 -end 11 0
-}
+ -start 1 0 -end 11 0
+}
#-----------------------------------------------------------------------------
# PLACEMENT
#-----------------------------------------------------------------------------
if { $DO_PLACE } {
-
+
setDesignMode -process 45
setPlaceMode -place_global_reorder_scan false
deleteAllScanCells
placeDesign
+ report_timing > $::env(PNR_REP_DIR)/${DESIGN}.place.timing.rpt
}
#-----------------------------------------------------------------------------
@@ -129,7 +138,7 @@ if { $DO_PLACE } {
if { $DO_CTS } {
optDesign -preCTS -outDir $::env(PNR_REP_DIR)/cts
-
+
set_ccopt_property buffer_cells \
[list CLKBUFX20 CLKBUFX16 CLKBUFX12 CLKBUFX8 CLKBUFX6 CLKBUFX4 CLKBUFX3 CLKBUFX2]
@@ -139,28 +148,29 @@ if { $DO_CTS } {
set_ccopt_property use_inverters true
ccopt_design -cts -outDir $::env(PNR_REP_DIR)/cts
-
- optDesign -postCTS -outDir $::env(PNR_REP_DIR)/cts
+ optDesign -postCTS -outDir $::env(PNR_REP_DIR)/cts
+
+ report_timing > $::env(PNR_REP_DIR)/${DESIGN}.cts.timing.rpt
}
-#-----------------------------------------------------------------------------#
-# ROUTE #
-#-----------------------------------------------------------------------------#
-if { $DO_ROUTE } {
-
+#-----------------------------------------------------------------------------
+# ROUTE
+#-----------------------------------------------------------------------------
+if { $DO_ROUTE } {
+
setNanoRouteMode -quiet -routeWithTimingDriven true
routeDesign -globalDetail
- addFiller -cell FILL32 FILL16 FILL8 FILL4 FILL2 FILL1 -prefix FILLER
+ addFiller -cell FILL32 FILL16 FILL8 FILL4 FILL2 FILL1 -prefix FILLER
}
-#-----------------------------------------------------------------------------#
-# CHECKS #
-#-----------------------------------------------------------------------------#
+#-----------------------------------------------------------------------------
+# CHECK
+#-----------------------------------------------------------------------------
if { $DO_CHECK } {
- # DRC
- set_verify_drc_mode -report $::env(PNR_REP_DIR)/${DESIGN}.drc.rpt
+ # DRC
+ set_verify_drc_mode -report $::env(PNR_REP_DIR)/${DESIGN}.drc.rpt
verify_drc
# Connectivity
@@ -178,17 +188,16 @@ if { $DO_CHECK } {
#-----------------------------------------------------------------------------
if { $DO_SAVE } {
- if {! [file isdirectory $::env(PNR_OA_LIB)] } {
+ if {! [file isdirectory $::env(PNR_OA_LIB)] } {
createLib $::env(PNR_OA_LIB) -attachTech gsclib045_tech
- }
+ }
saveDesign -cellview "$::env(PNR_OA_LIB) $DESIGN layout"
saveNetlist $::env(PNR_NET_DIR)/${DESIGN}.pnr.v
saveNetlist -phys $::env(PNR_NET_DIR)/${DESIGN}.pnr.phy.v
-
- write_sdf -view av_fast \
- -recompute_parallel_arcs \
- -interconn nooutport $::env(PNR_NET_DIR)/${DESIGN}.pnr.sdf
-}
+ write_sdf -view av_fast -target_application verilog -interconn noport \
+ -recrem split -setuphold split -adjust_setuphold_for_zero_hold_slack \
+ $::env(PNR_NET_DIR)/${DESIGN}.pnr.sdf
+}
diff --git a/compteur/scripts/pwr.tcl b/compteur/scripts/pwr.tcl
index d56452f24a46dc6dfb90c3937d516efd5cc7d585..be82ae3097e797358935920829319cdb8d0b2079 100644
--- a/compteur/scripts/pwr.tcl
+++ b/compteur/scripts/pwr.tcl
@@ -8,8 +8,13 @@
#-----------------------------------------------------------------------------
# Description: Estimation du puissance du compteur BCD avec Voltus
# HOW-TO : source setup.csh && cd implementation/pnr
-# : > voltus -files ${SCRIPTS_DIR}/pwr.tcl
+# : > voltus -files ${SCRIPTS_DIR}/pwr.tcl
#-----------------------------------------------------------------------------
+package require Tcl 8.5
+
+if { ![info exist ::env(PROJECT_HOME)] } {
+ error "ERREUR: Configurer l'environnement (source setup.csh) avant d'utiliser ce script"
+}
#-----------------------------------------------------------------------------
# CONFIG
@@ -26,15 +31,15 @@ set VCD_END 39
# INIT
#-----------------------------------------------------------------------------
if { $DO_INIT } {
-
- read_design -cellview "$::env(PNR_OA_LIB) $DESIGN layout" -physical_data
+
+ read_design -cellview "$::env(PNR_OA_LIB) $DESIGN layout" -physical_data
set_pg_library_mode -extraction_tech_file $::env(BE_QRC_LIB)/gpdk045.tch -celltype techonly \
- -default_area_cap 0.5 -power_pins {VDD 1.1} -ground_pins VSS \
+ -default_area_cap 0.5 -power_pins {VDD 1.1} -ground_pins VSS \
-decap_cells DECAP* -filler_cells FILL* \
- -current_distribution propagation
+ -current_distribution propagation
- generate_pg_library -output $::env(PNR_REP_DIR)/power
+ generate_pg_library -output $::env(PNR_REP_DIR)/power
}
#-----------------------------------------------------------------------------
@@ -42,8 +47,8 @@ if { $DO_INIT } {
#-----------------------------------------------------------------------------
if { $DO_STAT } {
- set rep ${DESIGN}.stat
-
+ set rep ${DESIGN}.stat
+
# Static mode
set_power_analysis_mode -reset
set_power_analysis_mode -method static \
@@ -55,8 +60,8 @@ if { $DO_STAT } {
-ignore_control_signals true
# Activity
- set_default_switching_activity -reset
- set_default_switching_activity -input_activity 0.2 -period 1.0
+ set_default_switching_activity -reset
+ set_default_switching_activity -input_activity 0.2 -period 1.0
}
#-----------------------------------------------------------------------------
@@ -64,8 +69,8 @@ if { $DO_STAT } {
#-----------------------------------------------------------------------------
if { $DO_DYN } {
- set rep ${DESIGN}.dyn
-
+ set rep ${DESIGN}.dyn
+
# Reset mode
set_power_analysis_mode -reset
set_default_switching_activity -reset
@@ -80,11 +85,11 @@ if { $DO_DYN } {
-disable_static false \
-write_static_currents true \
-report_missing_flop_outputs false
-
+
# Read VCD activity file
read_activity_file -reset
read_activity_file -format VCD $::env(SIM_PNR_DIR)/${DESIGN}.pnr.vcd \
- -scope ${DESIGN}_tb/dut -start $VCD_START -end $VCD_END
+ -scope ${DESIGN}_tb/dut -start $VCD_START -end $VCD_END
}
# Report power
diff --git a/compteur/scripts/sim.tcl b/compteur/scripts/sim.tcl
index 54dfe2fff115743faae3cd0527a07c65bb56dc7e..c2abd9ef44a6117705cc1aec517040742368cc70 100644
--- a/compteur/scripts/sim.tcl
+++ b/compteur/scripts/sim.tcl
@@ -11,75 +11,83 @@
# : (CLI) > vsim -c -do ${SCRIPTS_DIR}/sim.tcl
# : (GUI) > vsim -do ${SCRIPTS_DIR}/sim.tcl
#-----------------------------------------------------------------------------
+package require Tcl 8.5
+
+if { ![info exist ::env(PROJECT_HOME)] } {
+ error "ERREUR: Configurer l'environnement (source setup.csh) avant d'utiliser ce script"
+}
#-----------------------------------------------------------------------------
# CONFIG
#-----------------------------------------------------------------------------
-set DO_BEH 1; # Simulation du modèle comportemental
+set DO_BEH 0; # Simulation du modèle comportemental
set DO_SYN 0; # Smulation de la netlist post-synthèse
-set DO_PNR 0; # Simulation de la netlist post-implémentation
-set DO_RUN 0; # 0=Compilation; 1=Compilation + Simulation
+set DO_PNR 1; # Simulation de la netlist post-implémentation
+set DO_RUN 1; # 0=Compilation; 1=Compilation + Simulation
set DO_WAVE 0; # Chargement des chronogrammes
-set DO_VCD 0; # Enregistrement de l'activité dans un fichier vcd
+set DO_VCD 1; # Enregistrement de l'activité dans un fichier vcd
+
+set top compteur
+set tb ${top}_tb
+set dut dut
+set work work
+set lib gpdk45
+set srcD $::env(PROJECT_HOME)/sources
+
+if { $DO_BEH } { set workD $::env(SIM_DIR)/beh }
+if { $DO_SYN } { set workD $::env(SIM_DIR)/syn }
+if { $DO_PNR } { set workD $::env(SIM_DIR)/pnr }
+
+set log ${workD}/${top}.log
+set wlf ${workD}/${top}.wlf
+set vcd ${workD}/${top}.vcd
+set wave ${workD}/${top}.wave.do
+
+if { $DO_SYN } { set net $::env(SYN_NET_DIR)/${top}.syn }
+if { $DO_PNR } { set net $::env(PNR_NET_DIR)/${top}.pnr }
#-----------------------------------------------------------------------------
-# DEFAULTS
+# COMPILATION & SIMULATION
#-----------------------------------------------------------------------------
-set top "compteur"
-set tb "${top}_tb"
-set dut "dut"
-set srcD "$::env(PROJECT_HOME)/sources"
-set netLib "$::env(SIMLIB_VER)"
-if { $DO_BEH } {
- set work "$::env(SIM_BEH_DIR)/work"
- set wave "$::env(SIM_BEH_DIR)/${top}.beh.wave.do"
- set vcd "$::env(SIM_BEH_DIR)/${top}.beh.vcd"
-} elseif { $DO_SYN } {
- set work "$::env(SIM_SYN_DIR)/work"
- set wave "$::env(SIM_SYN_DIR)/${top}.syn.wave.do"
- set vcd "$::env(SIM_SYN_DIR)/${top}.syn.vcd"
- set net "$::env(SYN_NET_DIR)/${top}.syn.v"
- set sdf "$::env(SYN_NET_DIR)/${top}.syn.sdf"
-} elseif { $DO_PNR } {
- set work "$::env(SIM_PNR_DIR)/work"
- set wave "$::env(SIM_PNR_DIR)/${top}.pnr.wave.do"
- set vcd "$::env(SIM_PNR_DIR)/${top}.pnr.vcd"
- set net "$::env(PNR_NET_DIR)/${top}.pnr.v"
- set sdf "$::env(PNR_NET_DIR)/${top}.pnr.sdf"
-} else {
- error "Au moins une des trois options doit être spécifiée"
+# Create simulation directory if it does not exists
+if { ![file exist $workD] } {
+ file mkdir $workD
}
-#-----------------------------------------------------------------------------
-# WORK LIB
-#-----------------------------------------------------------------------------
-if { [file exist $work] } {
- vdel -all -lib $work
+# Copy the default modelsim.ini & Map the technology library
+if { ![file exist "./modelsim.ini"] } {
+ vmap -c
+ vmap $lib $::env(SIMLIB_VER)
}
-vlib $work
-#-----------------------------------------------------------------------------
-# COMPILATION/SIMULATION
-#-----------------------------------------------------------------------------
+# Update Work Library
+if { [file exist ${workD}/${work}] } {
+ vdel -all -lib ${workD}/${work}
+}
+vlib ${workD}/${work}
+vmap ${work} ${workD}/${work}
+
+# Behavioral
if { $DO_BEH } {
vcom -2008 -work $work ${srcD}/${top}.vhd
vcom -2008 -work $work ${srcD}/${tb}.vhd
- vsim -t ps ${work}.${tb}
-
+ vsim -t ps -voptargs=+acc -logfile $log -wlf $wlf ${work}.${tb}
+
+# Timing
} elseif { $DO_SYN || $DO_PNR } {
- vlog -work $work $net
+ vlog -work $work ${net}.v
vcom -2008 -work $work ${srcD}/${tb}.vhd
- vsim -L $netLib -t ps -sdfmax ${dut}=${sdf} ${work}.${tb}
+ vsim -t ps -voptargs=+acc -logfile $log -wlf $wlf -L $lib -sdfmax ${dut}=${net}.sdf ${work}.${tb}
}
#-----------------------------------------------------------------------------
# RUN
#-----------------------------------------------------------------------------
if { $DO_RUN } {
-
+
if { $DO_WAVE } { do $wave }
if { $DO_VCD } { vcd file $vcd; vcd add -r /${tb}/${dut}/* }
run -all
diff --git a/compteur/scripts/syn.tcl b/compteur/scripts/syn.tcl
index 9e742acddb439f4ab69a1d3a193121a2b82f457c..34a60684ef96d3343ed0b660b1cf83488f98e6d2 100644
--- a/compteur/scripts/syn.tcl
+++ b/compteur/scripts/syn.tcl
@@ -10,6 +10,11 @@
# HOW-TO : > source setup.csh && cd implementation/syn
# : > genus -files ${SCRIPTS_DIR}/syn.tcl
#-----------------------------------------------------------------------------
+package require Tcl 8.5
+
+if { ![info exist ::env(PROJECT_HOME)] } {
+ error "ERREUR: Configurer l'environnement (source setup.csh) avant d'utiliser ce script"
+}
#-----------------------------------------------------------------------------
# CONFIG
@@ -23,6 +28,9 @@ set DO_REPORTS 1
set DESIGN compteur
set SYN_EFFORT high; # low | medium | high | express
+# Create directories if they do not exists
+file mkdir $::env(SYN_REP_DIR) $::env(SYN_NET_DIR)
+
#-----------------------------------------------------------------------------
# INIT
#-----------------------------------------------------------------------------
@@ -30,12 +38,12 @@ if { $DO_INIT } {
# Paramètres de base
set_db / .information_level 9; # Verbosité: 1-11
- set_db / .hdl_vhdl_read_version 2008; # Standard VHDL
+ set_db / .hdl_vhdl_read_version 2008; # Standard VHDL
set_db / .max_cpus_per_server 4; # Numbre max de thread utilisable par genus
# Sources
set_db / .init_hdl_search_path [list $::env(SRC_DIR)]
-
+
# Librairies: Timing + Standard Cells + Interconnect
set_db / .init_lib_search_path [list $::env(FE_TIM_LIB) \
$::env(BE_QRC_LIB) \
@@ -45,7 +53,7 @@ if { $DO_INIT } {
read_libs "fast_vdd1v0_basicCells.lib"
read_physical -lef "gsclib045_tech.lef"
read_qrc "gpdk045.tch"
-
+
set_db / .interconnect_mode ple; # wireload ou ple (Physical Layout Estimators)
}
@@ -64,7 +72,7 @@ if { $DO_ELAB } {
foreach src $sources {
read_hdl -vhdl $src
}
-
+
# Élaboration
elaborate $DESIGN
@@ -81,7 +89,7 @@ if { $DO_SDC } {
read_sdc $::env(CONST_DIR)/timing.sdc
# Vérification des contraintes de timing
- report_timing -lint > $::env(SYN_REP_DIR)/${DESIGN}.syn.timing_lint.rpt
+ report_timing -lint > $::env(SYN_REP_DIR)/${DESIGN}.syn.timing_lint.rpt
}
#-----------------------------------------------------------------------------
@@ -91,9 +99,9 @@ if { $DO_SYN } {
# Ungroup
ungroup -all -simple
-
+
# Synthèse générique
- set_db / .syn_generic_effort ${SYN_EFFORT}
+ set_db / .syn_generic_effort ${SYN_EFFORT}
syn_generic $DESIGN
# Mapping des cellules standards
@@ -102,18 +110,18 @@ if { $DO_SYN } {
# Optimisations
set_db / .syn_opt_effort ${SYN_EFFORT}
- syn_opt $DESIGN
+ syn_opt $DESIGN
}
#-----------------------------------------------------------------------------
# RAPPORTS & NETLIST
#-----------------------------------------------------------------------------
if { $DO_REPORTS } {
-
+
# Rapports
report_timing > $::env(SYN_REP_DIR)/${DESIGN}.syn.timing.rpt
report_area > $::env(SYN_REP_DIR)/${DESIGN}.syn.area.rpt
- report_gates > $::env(SYN_REP_DIR)/${DESIGN}.syn.gates.rpt
+ report_gates > $::env(SYN_REP_DIR)/${DESIGN}.syn.gates.rpt
report_power > $::env(SYN_REP_DIR)/${DESIGN}.syn.power.rpt
# Netlist
diff --git a/compteur/setup.csh b/compteur/setup.csh
index 58e7155a99a72d5d5ce2eb291ed4b1c25a003709..56fd162d0261c4e964a399604d2881a6d25463e9 100644
--- a/compteur/setup.csh
+++ b/compteur/setup.csh
@@ -43,9 +43,6 @@ setenv SIM_DIR ${PROJECT_HOME}/simulation
setenv IMP_DIR ${PROJECT_HOME}/implementation
setenv DOC_DIR ${PROJECT_HOME}/../doc
setenv SCRIPTS_DIR ${PROJECT_HOME}/scripts
-setenv SIM_BEH_DIR ${SIM_DIR}/beh
-setenv SIM_SYN_DIR ${SIM_DIR}/syn
-setenv SIM_PNR_DIR ${SIM_DIR}/pnr
setenv SYN_DIR ${IMP_DIR}/syn
setenv SYN_NET_DIR ${SYN_DIR}/netlist
setenv SYN_REP_DIR ${SYN_DIR}/reports
@@ -63,10 +60,10 @@ setenv KIT_SCLIB ${KIT_HOME}/gsclib045
setenv KIT_IOLIB ${KIT_HOME}/giolib045
setenv KIT_GPDK ${KIT_HOME}/gpdk045
-# Librairies Modelsim
+# Simulations
setenv SIMLIB ${KIT_HOME}/simlib
-setenv SIMLIB_VHD fast_vdd1v0_basicCells
-setenv SIMLIB_VER gpdk45
+setenv SIMLIB_VHD ${SIMLIB}/gsclib045_vital
+setenv SIMLIB_VER ${SIMLIB}/gsclib045_verilog
# Front-End
setenv FE_DIR ${KIT_SCLIB}/gsclib045
@@ -99,7 +96,7 @@ source ${CMC_HOME}/scripts/mentor.2017.12.csh
# MODELSIM
source ${CMC_HOME}/scripts/mentor.modelsim.10.7c.csh
-alias vsim "vsim -64 -modelsimini ${SIMLIB}/modelsim.ini"
+alias vsim "vsim -64"
alias vsim_help "${MGC_HTML_BROWSER} ${CMC_MNT_MSIM_HOME}/docs/index.html"
# CADENCE
diff --git a/compteur/simulation/.gitignore b/compteur/simulation/.gitignore
index e63c85ec84980c61e8931bd365698dc81c8e76af..02a9691b59ff10b8b1a8f65cef266694b0d28c37 100644
--- a/compteur/simulation/.gitignore
+++ b/compteur/simulation/.gitignore
@@ -3,5 +3,6 @@ beh/work/
syn/work/
pnr/work/
transcript
-vsim.wlf
+*.wlf
*.vcd
+*.log
diff --git a/compteur/simulation/beh/compteur.beh.wave.do b/compteur/simulation/beh/compteur.wave.do
similarity index 100%
rename from compteur/simulation/beh/compteur.beh.wave.do
rename to compteur/simulation/beh/compteur.wave.do
diff --git a/compteur/simulation/pnr/compteur.pnr.wave.do b/compteur/simulation/pnr/compteur.wave.do
similarity index 100%
rename from compteur/simulation/pnr/compteur.pnr.wave.do
rename to compteur/simulation/pnr/compteur.wave.do
diff --git a/compteur/simulation/syn/compteur.syn.wave.do b/compteur/simulation/syn/compteur.wave.do
similarity index 100%
rename from compteur/simulation/syn/compteur.syn.wave.do
rename to compteur/simulation/syn/compteur.wave.do