diff --git a/PCB_Project/Carte.PcbDoc b/PCB_Project/Carte.PcbDoc
index 4773180581deb14460dc08f185e2b76f57062231..39c2d373e65f23dfa64f2c59a612e44a395e9e65 100644
Binary files a/PCB_Project/Carte.PcbDoc and b/PCB_Project/Carte.PcbDoc differ
diff --git a/PCB_Project/Doc/Plan de test.txt b/PCB_Project/Doc/Plan de test.txt
index ed3329308bd9f46da9638ba8e081eb749ad94013..a15391d202780acecb3cc5960d9508fb2e23d04b 100644
--- a/PCB_Project/Doc/Plan de test.txt	
+++ b/PCB_Project/Doc/Plan de test.txt	
@@ -16,7 +16,8 @@ Rapport de tests:
 - Alimentation 3.3V - VALIDÉ
 - Alimentation 2.0V: injecter 3.3V sur 2V_EN - VALIDÉ, 1.952V enregistré
 - 7-segments fixes - VALIDÉ
-- Microcontrôleur, programmabilité à travers le connecteur flex, reset - À FAIRE
+- Microcontrôleur, programmabilité à travers le connecteur flex, reset - ERREUR
+    -Broche 2 du débogueur connectée à la masse au lieu de VDD. Cause un court-circuit quand une sonde ST-LINK est connectée.
 - Bouton carré - À FAIRE
 - MOSFETs: injecter 3.3V à la base, 2V au collecteur, vérifier qu'on ait 2V à l'émetteur - À FAIRE
 - Contrôle des 7-segments programmables à travers les transistors - À FAIRE
diff --git "a/PCB_Project/Microcontr\303\264leur.SchDoc" "b/PCB_Project/Microcontr\303\264leur.SchDoc"
index 24fe40a160b1dea17db2f1a981d1a96dfa68d466..55adb68d64d35ed35668fc247ba03edfb144731a 100644
Binary files "a/PCB_Project/Microcontr\303\264leur.SchDoc" and "b/PCB_Project/Microcontr\303\264leur.SchDoc" differ
diff --git a/PCB_Project/Project Outputs for Testeur_de_cable/Design Rule Check - Carte.drc b/PCB_Project/Project Outputs for Testeur_de_cable/Design Rule Check - Carte.drc
index d121c3ba972084f48ff7079c7daf660bee776e40..e8ddfc3237d5ff01f5f8a2931cd4ed7b7bc6f61e 100644
--- a/PCB_Project/Project Outputs for Testeur_de_cable/Design Rule Check - Carte.drc	
+++ b/PCB_Project/Project Outputs for Testeur_de_cable/Design Rule Check - Carte.drc	
@@ -1,7 +1,7 @@
 Protel Design System Design Rule Check
 PCB File : C:\Users\Yann Roberge\Documents\Ingé\A2019\Testeur de câble\PCB_Project\Carte.PcbDoc
-Date     : 01/01/2020
-Time     : 01:15:59
+Date     : 11/03/2020
+Time     : 17:04:41
 
 Processing Rule : Clearance Constraint (Gap=0.152mm) (All),(All)
 Rule Violations :0
@@ -18,10 +18,10 @@ Rule Violations :0
 Processing Rule : Width Constraint (Min=0.2mm) (Max=0.5mm) (Preferred=0.254mm) (OnLayer('Top Layer'))
 Rule Violations :0
 
-Processing Rule : Width Constraint (Min=0.2mm) (Max=0.5mm) (Preferred=0.254mm) (OnLayer('Bottom Layer'))
+Processing Rule : Width Constraint (Min=0.1mm) (Max=0.4mm) (Preferred=0.254mm) (OnLayer('Top Overlay'))
 Rule Violations :0
 
-Processing Rule : Width Constraint (Min=0.1mm) (Max=0.4mm) (Preferred=0.254mm) (OnLayer('Top Overlay'))
+Processing Rule : Width Constraint (Min=0.2mm) (Max=0.5mm) (Preferred=0.254mm) (OnLayer('Bottom Layer'))
 Rule Violations :0
 
 Processing Rule : Width Constraint (Min=0.1mm) (Max=0.4mm) (Preferred=0.254mm) (OnLayer('Bottom Overlay'))
@@ -51,18 +51,18 @@ Rule Violations :0
 Processing Rule : Net Antennae (Tolerance=0mm) (All)
 Rule Violations :0
 
-Processing Rule : Board Clearance Constraint (Gap=0mm) (All)
-Rule Violations :0
-
 Processing Rule : Board Clearance Constraint (Gap=0mm) (OnLayer('Top Overlay'))
 Rule Violations :0
 
-Processing Rule : Room 7SB (Bounding Region = (79.6mm, 96.5mm, 94.6mm, 123.4mm) (InComponentClass('7SB'))
+Processing Rule : Board Clearance Constraint (Gap=0mm) (All)
 Rule Violations :0
 
 Processing Rule : Room 7SA (Bounding Region = (79.65mm, 123.1mm, 94.6mm, 149.8mm) (InComponentClass('7SA'))
 Rule Violations :0
 
+Processing Rule : Room 7SB (Bounding Region = (79.6mm, 96.5mm, 94.6mm, 123.4mm) (InComponentClass('7SB'))
+Rule Violations :0
+
 Processing Rule : Room 7SC (Bounding Region = (79.65mm, 70.15mm, 94.6mm, 96.85mm) (InComponentClass('7SC'))
 Rule Violations :0
 
@@ -73,12 +73,12 @@ Processing Rule : Height Constraint (Min=0mm) (Max=25.4mm) (Prefered=12.7mm) (Al
 Rule Violations :0
 
 Waived Violations Of Rule : Minimum Solder Mask Sliver (Gap=0.152mm) (All),(All)
-   Waived Violation between Minimum Solder Mask Sliver Constraint: (0.046mm < 0.152mm) Between Track (5.18mm,10.268mm)(9.058mm,10.278mm) on Top Solder And Track (5.637mm,10.716mm)(5.637mm,11.64mm) on Top Solder [Top Solder] Mask Sliver [0.046mm]Waived by  at 31/12/2019 17:22:05Logo exclu des vérifications
-   Waived Violation between Minimum Solder Mask Sliver Constraint: (0.088mm < 0.152mm) Between Track (8.581mm,10.765mm)(8.581mm,11.591mm) on Top Solder And Track (5.18mm,10.268mm)(9.058mm,10.278mm) on Top Solder [Top Solder] Mask Sliver [0.088mm]Waived by  at 31/12/2019 17:22:26Logo exclu des vérifications
-   Waived Violation between Minimum Solder Mask Sliver Constraint: (0.047mm < 0.152mm) Between Track (3.122mm,13.162mm)(5.717mm,13.162mm) on Top Solder And Track (5.717mm,13.609mm)(10.738mm,13.609mm) on Top Solder [Top Solder] Mask Sliver [0.047mm]Waived by  at 31/12/2019 17:22:31Logo exclu des vérifications
+   Waived Violation between Minimum Solder Mask Sliver Constraint: (0.047mm < 0.152mm) Between Track (5.717mm,13.609mm)(10.738mm,13.609mm) on Top Solder And Track (3.122mm,13.162mm)(5.717mm,13.162mm) on Top Solder [Top Solder] Mask Sliver [0.047mm]Waived by  at 31/12/2019 17:22:31Logo exclu des vérifications
+   Waived Violation between Minimum Solder Mask Sliver Constraint: (0.088mm < 0.152mm) Between Track (5.18mm,10.268mm)(9.058mm,10.278mm) on Top Solder And Track (8.581mm,10.765mm)(8.581mm,11.591mm) on Top Solder [Top Solder] Mask Sliver [0.088mm]Waived by  at 31/12/2019 17:22:26Logo exclu des vérifications
+   Waived Violation between Minimum Solder Mask Sliver Constraint: (0.046mm < 0.152mm) Between Track (5.637mm,10.716mm)(5.637mm,11.64mm) on Top Solder And Track (5.18mm,10.268mm)(9.058mm,10.278mm) on Top Solder [Top Solder] Mask Sliver [0.046mm]Waived by  at 31/12/2019 17:22:05Logo exclu des vérifications
 Waived Violations :3
 
 
 Violations Detected : 0
 Waived Violations : 3
-Time Elapsed        : 00:00:03
\ No newline at end of file
+Time Elapsed        : 00:00:02
\ No newline at end of file
diff --git a/PCB_Project/Project Outputs for Testeur_de_cable/Design Rule Check - Carte.html b/PCB_Project/Project Outputs for Testeur_de_cable/Design Rule Check - Carte.html
index 560fc5bd300cddbdf83ea60432274689ab3c0bd2..704e2674a9b82cccb444a99142dc64a3734fb365 100644
--- a/PCB_Project/Project Outputs for Testeur_de_cable/Design Rule Check - Carte.html	
+++ b/PCB_Project/Project Outputs for Testeur_de_cable/Design Rule Check - Carte.html	
@@ -219,17 +219,17 @@
 <tr class="front_matter">
 <td class="front_matter_column1">Date:</td>
 <td class="front_matter_column2"></td>
-<td class="front_matter_column3">01/01/2020</td>
+<td class="front_matter_column3">11/03/2020</td>
 </tr>
 <tr class="front_matter">
 <td class="front_matter_column1">Time:</td>
 <td class="front_matter_column2"></td>
-<td class="front_matter_column3">01:15:59</td>
+<td class="front_matter_column3">17:04:41</td>
 </tr>
 <tr class="front_matter">
 <td class="front_matter_column1">Elapsed Time:</td>
 <td class="front_matter_column2"></td>
-<td class="front_matter_column3">00:00:03</td>
+<td class="front_matter_column3">00:00:02</td>
 </tr>
 <tr class="front_matter">
 <td class="front_matter_column1">Filename:</td>
@@ -254,7 +254,7 @@
 <td class="DRC_summary_header_col3" style="color : red">3</td></tr>
 </table>
 </td>
-</table><a name="IDLNZYWUHAIOJSKACEC1DAE24LEOWQGC53WUSIFXK2GVTPWFUSPIWL"><h2>Summary</h2></a><table>
+</table><a name="IDOLJZU2QAH2DSBKA2DYILYCE1AN5FALYSGNWOPIX42FPYUWD3L4D"><h2>Summary</h2></a><table>
 <tr>
 <th class="column1">Warnings</th>
 <th class="column2">Count</th>
@@ -269,95 +269,95 @@
 <th class="column2">Count</th>
 </tr>
 <tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
-<td class="column1"><a href="#ID01GBJH2WHFBKICMV3Y3MBO330NGV5LZ1DEPLOFOCIZA03DHP1RRP">Clearance Constraint (Gap=0.152mm) (All),(All)</a></td>
+<td class="column1"><a href="#ID04DU4JLHYBSUCJ3BVCOAJBROYOAVAPIGLLVIA3EP5XINNT3R5LSN">Clearance Constraint (Gap=0.152mm) (All),(All)</a></td>
 <td class="column2">0</td>
 </tr>
 <tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
-<td class="column1"><a href="#IDHAYUVICA0BERC0YBINDLOXADCNXFUGU0IEO20CF34BNJFTVWLRRI">Short-Circuit Constraint (Allowed=No) (All),(All)</a></td>
+<td class="column1"><a href="#ID5HRZJFFRC2JLEGKH1WSSB3FNEKEBRO4X4KIDWCFNSS2LSPWOM4TO">Short-Circuit Constraint (Allowed=No) (All),(All)</a></td>
 <td class="column2">0</td>
 </tr>
 <tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
-<td class="column1"><a href="#IDPHPSNEEB1SVKEDPCD3T1DSHWIG35NOMTIBTKGYJLMWHHQG0AVQ0N">Un-Routed Net Constraint ( (All) )</a></td>
+<td class="column1"><a href="#IDMRMDCEPZVF3AGPKYBC4BMTHVJPZ04DCXA5FJTONGUSWYS4SESELM">Un-Routed Net Constraint ( (All) )</a></td>
 <td class="column2">0</td>
 </tr>
 <tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
-<td class="column1"><a href="#IDUHXL5KNJJTJQLQLA4RHTLZD3QBYKKXZ55WIMWNB3XP14LU1ZDX3C">Modified Polygon (Allow modified: No), (Allow shelved: No)</a></td>
+<td class="column1"><a href="#IDEUIRINHFLUDCBMXYTJ3J1124CNLVNLBLHR2LQYIDYZDLHJRVCZIG">Modified Polygon (Allow modified: No), (Allow shelved: No)</a></td>
 <td class="column2">0</td>
 </tr>
 <tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
-<td class="column1"><a href="#IDJ5C4QCPMVQOGMV4IX3RP4TIIGJ2TTSSFMJ1JACPFWCJWR2JTV0O">Width Constraint (Min=0.2mm) (Max=0.5mm) (Preferred=0.254mm) (OnLayer('Top Layer'))</a></td>
+<td class="column1"><a href="#IDDEO52QFJSDEFJGH5QRWB5BXHYISP3YY4KDWUW3JLFHYBNYQVRBN">Width Constraint (Min=0.2mm) (Max=0.5mm) (Preferred=0.254mm) (OnLayer('Top Layer'))</a></td>
 <td class="column2">0</td>
 </tr>
 <tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
-<td class="column1"><a href="#IDQ33T0GGCLU1AHVR1CFDVJCJ2UDSXIMA2IATRDDLAB5A3ODJZUEOM">Width Constraint (Min=0.2mm) (Max=0.5mm) (Preferred=0.254mm) (OnLayer('Bottom Layer'))</a></td>
+<td class="column1"><a href="#IDUN3S1K1L0M0QJAZN5QSBR5ZGRCE1BVPKZATMGYONKDU4XL0F0R1L">Width Constraint (Min=0.1mm) (Max=0.4mm) (Preferred=0.254mm) (OnLayer('Top Overlay'))</a></td>
 <td class="column2">0</td>
 </tr>
 <tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
-<td class="column1"><a href="#IDD35TZTZD5MKKDTEAIJIIBVWZABNZJCKC3BTDIJEIRI4JH0QAUCFB">Width Constraint (Min=0.1mm) (Max=0.4mm) (Preferred=0.254mm) (OnLayer('Top Overlay'))</a></td>
+<td class="column1"><a href="#IDSKY1MLIKFELYI4PW1TWQOSMLIEHLCAI4Z2YWKFIL4QBOGGYWRJFK">Width Constraint (Min=0.2mm) (Max=0.5mm) (Preferred=0.254mm) (OnLayer('Bottom Layer'))</a></td>
 <td class="column2">0</td>
 </tr>
 <tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
-<td class="column1"><a href="#IDFE5TFYD1NGANER3SX55L1MI0YNFTJN4LXSSKYAKAANDQXKSOMGKP">Width Constraint (Min=0.1mm) (Max=0.4mm) (Preferred=0.254mm) (OnLayer('Bottom Overlay'))</a></td>
+<td class="column1"><a href="#IDATIICCTQ1IVU1MLXW1Q0V4RBC1TR2XXB00ZI2DDWDSNPBGVK0SO">Width Constraint (Min=0.1mm) (Max=0.4mm) (Preferred=0.254mm) (OnLayer('Bottom Overlay'))</a></td>
 <td class="column2">0</td>
 </tr>
 <tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
-<td class="column1"><a href="#IDJWUHPA4B0JWXDVU1QCTC213T3GVW0WURF2B2RBB1PNI0YYDQQXEP">Power Plane Connect Rule(Relief Connect )(Expansion=0.508mm) (Conductor Width=0.254mm) (Air Gap=0.254mm) (Entries=4) (All)</a></td>
+<td class="column1"><a href="#IDN1CIQIQUS1FEHXC0FHA45CFNFJE3BJNVFLF1QEMHZW4HON5ZG2GP">Power Plane Connect Rule(Relief Connect )(Expansion=0.508mm) (Conductor Width=0.254mm) (Air Gap=0.254mm) (Entries=4) (All)</a></td>
 <td class="column2">0</td>
 </tr>
 <tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
-<td class="column1"><a href="#IDTYDHHHUX3AVGDJBTCQ4LR5Y3HFAGTZPSIQVHFADITUIRFDC5Y02O">Minimum Annular Ring (Minimum=0.128mm) (All)</a></td>
+<td class="column1"><a href="#IDLCDEIMHC0YBKMFQX45J5IHNNWMMMSYUNDOS1MHOXOFJNWAVOF1O">Minimum Annular Ring (Minimum=0.128mm) (All)</a></td>
 <td class="column2">0</td>
 </tr>
 <tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
-<td class="column1"><a href="#IDKHHSTFJQRUPZKPXHGQLGFT4DCEI4H1KHEHN2J4CEYOHNRPFCRO">Hole Size Constraint (Min=0.254mm) (Max=25.4mm) (All)</a></td>
+<td class="column1"><a href="#IDBXX5GFKVGKMVFLNGPXOC03K0FPFLYKDBDZ3ZEDGP2NLJXVDNTSSM">Hole Size Constraint (Min=0.254mm) (Max=25.4mm) (All)</a></td>
 <td class="column2">0</td>
 </tr>
 <tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
-<td class="column1"><a href="#IDMFVCZ0YPEPJ3KPINXC0CQTBYEN20JWUVN5VTSSBZXJGMSXUV1RPB">Hole To Hole Clearance (Gap=0.254mm) (All),(All)</a></td>
+<td class="column1"><a href="#IDCN3DAO2IMLLHDS5NYOMJZKWEMEFL2TV41PJXWFDB2DGAM5YPBGCI">Hole To Hole Clearance (Gap=0.254mm) (All),(All)</a></td>
 <td class="column2">0</td>
 </tr>
 <tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
-<td class="column1"><a href="#ID4411X1CTLJWTDUROBQQRYGDFYCG1KLA3CINRLQBDWXTOH55ZESXJ">Minimum Solder Mask Sliver (Gap=0.152mm) (All),(All)</a></td>
+<td class="column1"><a href="#IDXXAHXOIXPZS5MEXOXMC2EGNL2H2QPVHSOXK5CGUA40IX4Z2SH2I">Minimum Solder Mask Sliver (Gap=0.152mm) (All),(All)</a></td>
 <td class="column2">0</td>
 </tr>
 <tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
-<td class="column1"><a href="#IDVZYLN2IU3QOTM1MXDT2ANSQBVEQHNZF3QWKJGGJ23EF4E2WV2JPL">Silk To Solder Mask (Clearance=0.102mm) (Disabled)(IsPad),(All)</a></td>
+<td class="column1"><a href="#IDP4IF5U0GHQV2N1O1Y3L3KZSPKPGIF50GGF4E0UGOM3M1VORE22IL">Silk To Solder Mask (Clearance=0.102mm) (Disabled)(IsPad),(All)</a></td>
 <td class="column2">0</td>
 </tr>
 <tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
-<td class="column1"><a href="#IDB1CDZUL21GF2P12AVI02QW2BEOCSSXJ11KNY2ZDAXPDFO0MY4FCK">Silk to Silk (Clearance=0.254mm) (Disabled)(All),(All)</a></td>
+<td class="column1"><a href="#IDRGAOHRYDF3WUC3FT4WYRKM3EQL2ZLWFUIOTIGBPQWP15I2032HPD">Silk to Silk (Clearance=0.254mm) (Disabled)(All),(All)</a></td>
 <td class="column2">0</td>
 </tr>
 <tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
-<td class="column1"><a href="#IDT1FMKICV01PRBDJJ3NURHEMOGBUBVE2QFQODSTIJTZADDANBVDCF">Net Antennae (Tolerance=0mm) (All)</a></td>
+<td class="column1"><a href="#IDTBOV2XAAGKX2GIAI32UANOCP4L3MSIQHFIXDP5PCGNOHSH0XLKZE">Net Antennae (Tolerance=0mm) (All)</a></td>
 <td class="column2">0</td>
 </tr>
 <tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
-<td class="column1"><a href="#IDWR2RVSFD31D3MJ2ZEB2OM4ZYEM1U45JV51BRGNDVE0LU5TJBBXUJ">Board Clearance Constraint (Gap=0mm) (All)</a></td>
+<td class="column1"><a href="#IDB5I3LQ0DMCEXKSG1ZXCTBWW5BELKF3VWWBDD5CFFC2H4F0NNC4L">Board Clearance Constraint (Gap=0mm) (OnLayer('Top Overlay'))</a></td>
 <td class="column2">0</td>
 </tr>
 <tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
-<td class="column1"><a href="#IDLZQYOWS1DJYXOZVX14YKF2REEG3KWB4POSYDR3CIBN3L0LHGTD4C">Board Clearance Constraint (Gap=0mm) (OnLayer('Top Overlay'))</a></td>
+<td class="column1"><a href="#IDBGY4TYXSGFNJNIX3RYOME1BBCI1EAYAUH3CCA2BY2C2CJZTVMLEC">Board Clearance Constraint (Gap=0mm) (All)</a></td>
 <td class="column2">0</td>
 </tr>
 <tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
-<td class="column1"><a href="#IDJRPCBCTFJFAZDMFRRJJ3NSKB0BYWXSGQPELNWVFMXNT0FHLB3S">Room 7SB (Bounding Region = (79.6mm, 96.5mm, 94.6mm, 123.4mm) (InComponentClass('7SB'))</a></td>
+<td class="column1"><a href="#IDKZSXAEM3RMULC2X5ZERCCR25VHJFHDBWFYLK3TNSQ0SWGLZ2ZXLF">Room 7SA (Bounding Region = (79.65mm, 123.1mm, 94.6mm, 149.8mm) (InComponentClass('7SA'))</a></td>
 <td class="column2">0</td>
 </tr>
 <tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
-<td class="column1"><a href="#ID4424PSU03T0CCV1Y4GKZXHD44F43ND0O4DB0K3BFKHEDNO3N4APO">Room 7SA (Bounding Region = (79.65mm, 123.1mm, 94.6mm, 149.8mm) (InComponentClass('7SA'))</a></td>
+<td class="column1"><a href="#IDWVJWIY2XY5ZFLM2RGPMA33UAYN1K0EE414EVAZMPCULC44Q1VT0K">Room 7SB (Bounding Region = (79.6mm, 96.5mm, 94.6mm, 123.4mm) (InComponentClass('7SB'))</a></td>
 <td class="column2">0</td>
 </tr>
 <tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
-<td class="column1"><a href="#IDBFMCKNJTEC5LCXPBTNC0KL0APNFCSGW4DHUY3FMM3P5020SYRZR">Room 7SC (Bounding Region = (79.65mm, 70.15mm, 94.6mm, 96.85mm) (InComponentClass('7SC'))</a></td>
+<td class="column1"><a href="#IDF3BENTMVK0D5LKIM5UNCGXQZLF3KGRCSNADTSAHYW5NRGSTOATWF">Room 7SC (Bounding Region = (79.65mm, 70.15mm, 94.6mm, 96.85mm) (InComponentClass('7SC'))</a></td>
 <td class="column2">0</td>
 </tr>
 <tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
-<td class="column1"><a href="#IDSC1B5H0DOOHGIKZAWKQR4QPAFKOAM54MVNZO4OL3NJM1CJMXDTLL">Room 7SD (Bounding Region = (79.6mm, 43.55mm, 94.6mm, 70.3mm) (InComponentClass('7SD'))</a></td>
+<td class="column1"><a href="#IDVVJGAXCQ3YR2II3Y3WQTETPNVKBEGMORSP3IDDGFZNG4K3O254L">Room 7SD (Bounding Region = (79.6mm, 43.55mm, 94.6mm, 70.3mm) (InComponentClass('7SD'))</a></td>
 <td class="column2">0</td>
 </tr>
 <tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
-<td class="column1"><a href="#ID22JWITC2RESEDM2LVWCNMUQD4BY0XG0SDB3V3MK0T0X5HOBPOM2D">Height Constraint (Min=0mm) (Max=25.4mm) (Prefered=12.7mm) (All)</a></td>
+<td class="column1"><a href="#IDQQAOFQIOZJHMMCR5MTWGUITFAIURIZQFCVK3VGEOMEQ1WKQZXVWD">Height Constraint (Min=0mm) (Max=25.4mm) (Prefered=12.7mm) (All)</a></td>
 <td class="column2">0</td>
 </tr>
 <tr>
@@ -370,25 +370,25 @@
 <th class="column2">Count</th>
 </tr>
 <tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
-<td class="column1"><a href="#ID5AFZZ51CQRCJKDOKEA2XAS10YM01LE1IYPPNJLF1S2Q0KFVXFZMF">Minimum Solder Mask Sliver (Gap=0.152mm) (All),(All)</a></td>
+<td class="column1"><a href="#ID31UOD3YBOWZANXHFE0EBLOSQYMRPVQ12LHYJOROKBBTBX4SSLUTG">Minimum Solder Mask Sliver (Gap=0.152mm) (All),(All)</a></td>
 <td class="column2">3</td>
 </tr>
 <tr>
 <td style="font-weight : bold; text-align : right" class="column1">Total</td>
 <td style="font-weight : bold" class="column2">3</td>
 </tr>
-</table><br><a name="IDFU1JKD23C51UGW1YJUBM12RSVL3S0DB32YBJ1FCBL2O5SXAW5AM"><h2>Rule Violations</h2></a><a name="ID4DVZFEQC4PVWBAC1E5INXSTXUKQIGXIB0CBSS1IP2LZLHCSVBDOJ"><h2>Waived Violations</h2></a><a name="ID5AFZZ51CQRCJKDOKEA2XAS10YM01LE1IYPPNJLF1S2Q0KFVXFZMF"><table>
+</table><br><a name="IDHS1BQQQTDWVQBBOJLFJHWHQAIUYTRJIQFIOI3B5SK5MODHB4V1I"><h2>Rule Violations</h2></a><a name="IDWRHPJ0LLHQN41MQ3GMFUN2IYFLFQS4DCDXDBBLEQY42J3GG3IFM"><h2>Waived Violations</h2></a><a name="ID31UOD3YBOWZANXHFE0EBLOSQYMRPVQ12LHYJOROKBBTBX4SSLUTG"><table>
 <tr>
 <th style="text-align : left" colspan="1" class="waived">Minimum Solder Mask Sliver (Gap=0.152mm) (All),(All)</th>
 </tr>
 <tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
-<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\Yann Roberge\Documents\Ing%C3%A9\A2019\Testeur de c%C3%A2ble\PCB_Project\Carte.PcbDoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1202.595mil|Location2.X=1209.845mil|Location1.Y=1393.719mil|Location2.Y=1400.969mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\Yann Roberge\Documents\Ingé\A2019\Testeur de câble\PCB_Project\Carte.PcbDoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1202.595mil|Location2.X=1209.845mil|Location1.Y=1393.719mil|Location2.Y=1400.969mil|Absolute=True">Minimum Solder Mask Sliver Constraint: (0.046mm &lt; 0.152mm) Between Track (5.18mm,10.268mm)(9.058mm,10.278mm) on Top Solder And Track (5.637mm,10.716mm)(5.637mm,11.64mm) on Top Solder [Top Solder] Mask Sliver [0.046mm]</acronym></a><br>Waived by  at 31/12/2019 17:22:05<br>Logo exclu des vérifications</td>
+<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\Yann Roberge\Documents\Ing%C3%A9\A2019\Testeur de c%C3%A2ble\PCB_Project\Carte.PcbDoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1205.705mil|Location2.X=1212.955mil|Location1.Y=1507.616mil|Location2.Y=1514.866mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\Yann Roberge\Documents\Ingé\A2019\Testeur de câble\PCB_Project\Carte.PcbDoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1205.705mil|Location2.X=1212.955mil|Location1.Y=1507.616mil|Location2.Y=1514.866mil|Absolute=True">Minimum Solder Mask Sliver Constraint: (0.047mm &lt; 0.152mm) Between Track (5.717mm,13.609mm)(10.738mm,13.609mm) on Top Solder And Track (3.122mm,13.162mm)(5.717mm,13.162mm) on Top Solder [Top Solder] Mask Sliver [0.047mm]</acronym></a><br>Waived by  at 31/12/2019 17:22:31<br>Logo exclu des vérifications</td>
 </tr>
 <tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
-<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\Yann Roberge\Documents\Ing%C3%A9\A2019\Testeur de c%C3%A2ble\PCB_Project\Carte.PcbDoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1318.475mil|Location2.X=1325.725mil|Location1.Y=1394.847mil|Location2.Y=1402.097mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\Yann Roberge\Documents\Ingé\A2019\Testeur de câble\PCB_Project\Carte.PcbDoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1318.475mil|Location2.X=1325.725mil|Location1.Y=1394.847mil|Location2.Y=1402.097mil|Absolute=True">Minimum Solder Mask Sliver Constraint: (0.088mm &lt; 0.152mm) Between Track (8.581mm,10.765mm)(8.581mm,11.591mm) on Top Solder And Track (5.18mm,10.268mm)(9.058mm,10.278mm) on Top Solder [Top Solder] Mask Sliver [0.088mm]</acronym></a><br>Waived by  at 31/12/2019 17:22:26<br>Logo exclu des vérifications</td>
+<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\Yann Roberge\Documents\Ing%C3%A9\A2019\Testeur de c%C3%A2ble\PCB_Project\Carte.PcbDoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1318.475mil|Location2.X=1325.725mil|Location1.Y=1394.847mil|Location2.Y=1402.097mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\Yann Roberge\Documents\Ingé\A2019\Testeur de câble\PCB_Project\Carte.PcbDoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1318.475mil|Location2.X=1325.725mil|Location1.Y=1394.847mil|Location2.Y=1402.097mil|Absolute=True">Minimum Solder Mask Sliver Constraint: (0.088mm &lt; 0.152mm) Between Track (5.18mm,10.268mm)(9.058mm,10.278mm) on Top Solder And Track (8.581mm,10.765mm)(8.581mm,11.591mm) on Top Solder [Top Solder] Mask Sliver [0.088mm]</acronym></a><br>Waived by  at 31/12/2019 17:22:26<br>Logo exclu des vérifications</td>
 </tr>
 <tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
-<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\Yann Roberge\Documents\Ing%C3%A9\A2019\Testeur de c%C3%A2ble\PCB_Project\Carte.PcbDoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1205.705mil|Location2.X=1212.955mil|Location1.Y=1507.616mil|Location2.Y=1514.866mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\Yann Roberge\Documents\Ingé\A2019\Testeur de câble\PCB_Project\Carte.PcbDoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1205.705mil|Location2.X=1212.955mil|Location1.Y=1507.616mil|Location2.Y=1514.866mil|Absolute=True">Minimum Solder Mask Sliver Constraint: (0.047mm &lt; 0.152mm) Between Track (3.122mm,13.162mm)(5.717mm,13.162mm) on Top Solder And Track (5.717mm,13.609mm)(10.738mm,13.609mm) on Top Solder [Top Solder] Mask Sliver [0.047mm]</acronym></a><br>Waived by  at 31/12/2019 17:22:31<br>Logo exclu des vérifications</td>
+<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\Yann Roberge\Documents\Ing%C3%A9\A2019\Testeur de c%C3%A2ble\PCB_Project\Carte.PcbDoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1202.595mil|Location2.X=1209.845mil|Location1.Y=1393.719mil|Location2.Y=1400.969mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\Yann Roberge\Documents\Ingé\A2019\Testeur de câble\PCB_Project\Carte.PcbDoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1202.595mil|Location2.X=1209.845mil|Location1.Y=1393.719mil|Location2.Y=1400.969mil|Absolute=True">Minimum Solder Mask Sliver Constraint: (0.046mm &lt; 0.152mm) Between Track (5.637mm,10.716mm)(5.637mm,11.64mm) on Top Solder And Track (5.18mm,10.268mm)(9.058mm,10.278mm) on Top Solder [Top Solder] Mask Sliver [0.046mm]</acronym></a><br>Waived by  at 31/12/2019 17:22:05<br>Logo exclu des vérifications</td>
 </tr>
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